1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Bluetooth HCI UART driver for Intel devices
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2015 Intel Corporation
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <linux/skbuff.h>
12*4882a593Smuzhiyun #include <linux/firmware.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/wait.h>
15*4882a593Smuzhiyun #include <linux/tty.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
18*4882a593Smuzhiyun #include <linux/acpi.h>
19*4882a593Smuzhiyun #include <linux/interrupt.h>
20*4882a593Smuzhiyun #include <linux/pm_runtime.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <net/bluetooth/bluetooth.h>
23*4882a593Smuzhiyun #include <net/bluetooth/hci_core.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "hci_uart.h"
26*4882a593Smuzhiyun #include "btintel.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define STATE_BOOTLOADER 0
29*4882a593Smuzhiyun #define STATE_DOWNLOADING 1
30*4882a593Smuzhiyun #define STATE_FIRMWARE_LOADED 2
31*4882a593Smuzhiyun #define STATE_FIRMWARE_FAILED 3
32*4882a593Smuzhiyun #define STATE_BOOTING 4
33*4882a593Smuzhiyun #define STATE_LPM_ENABLED 5
34*4882a593Smuzhiyun #define STATE_TX_ACTIVE 6
35*4882a593Smuzhiyun #define STATE_SUSPENDED 7
36*4882a593Smuzhiyun #define STATE_LPM_TRANSACTION 8
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define HCI_LPM_WAKE_PKT 0xf0
39*4882a593Smuzhiyun #define HCI_LPM_PKT 0xf1
40*4882a593Smuzhiyun #define HCI_LPM_MAX_SIZE 10
41*4882a593Smuzhiyun #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define LPM_OP_TX_NOTIFY 0x00
44*4882a593Smuzhiyun #define LPM_OP_SUSPEND_ACK 0x02
45*4882a593Smuzhiyun #define LPM_OP_RESUME_ACK 0x03
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define LPM_SUSPEND_DELAY_MS 1000
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun struct hci_lpm_pkt {
50*4882a593Smuzhiyun __u8 opcode;
51*4882a593Smuzhiyun __u8 dlen;
52*4882a593Smuzhiyun __u8 data[];
53*4882a593Smuzhiyun } __packed;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct intel_device {
56*4882a593Smuzhiyun struct list_head list;
57*4882a593Smuzhiyun struct platform_device *pdev;
58*4882a593Smuzhiyun struct gpio_desc *reset;
59*4882a593Smuzhiyun struct hci_uart *hu;
60*4882a593Smuzhiyun struct mutex hu_lock;
61*4882a593Smuzhiyun int irq;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static LIST_HEAD(intel_device_list);
65*4882a593Smuzhiyun static DEFINE_MUTEX(intel_device_list_lock);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun struct intel_data {
68*4882a593Smuzhiyun struct sk_buff *rx_skb;
69*4882a593Smuzhiyun struct sk_buff_head txq;
70*4882a593Smuzhiyun struct work_struct busy_work;
71*4882a593Smuzhiyun struct hci_uart *hu;
72*4882a593Smuzhiyun unsigned long flags;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
intel_convert_speed(unsigned int speed)75*4882a593Smuzhiyun static u8 intel_convert_speed(unsigned int speed)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun switch (speed) {
78*4882a593Smuzhiyun case 9600:
79*4882a593Smuzhiyun return 0x00;
80*4882a593Smuzhiyun case 19200:
81*4882a593Smuzhiyun return 0x01;
82*4882a593Smuzhiyun case 38400:
83*4882a593Smuzhiyun return 0x02;
84*4882a593Smuzhiyun case 57600:
85*4882a593Smuzhiyun return 0x03;
86*4882a593Smuzhiyun case 115200:
87*4882a593Smuzhiyun return 0x04;
88*4882a593Smuzhiyun case 230400:
89*4882a593Smuzhiyun return 0x05;
90*4882a593Smuzhiyun case 460800:
91*4882a593Smuzhiyun return 0x06;
92*4882a593Smuzhiyun case 921600:
93*4882a593Smuzhiyun return 0x07;
94*4882a593Smuzhiyun case 1843200:
95*4882a593Smuzhiyun return 0x08;
96*4882a593Smuzhiyun case 3250000:
97*4882a593Smuzhiyun return 0x09;
98*4882a593Smuzhiyun case 2000000:
99*4882a593Smuzhiyun return 0x0a;
100*4882a593Smuzhiyun case 3000000:
101*4882a593Smuzhiyun return 0x0b;
102*4882a593Smuzhiyun default:
103*4882a593Smuzhiyun return 0xff;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
intel_wait_booting(struct hci_uart * hu)107*4882a593Smuzhiyun static int intel_wait_booting(struct hci_uart *hu)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
110*4882a593Smuzhiyun int err;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING,
113*4882a593Smuzhiyun TASK_INTERRUPTIBLE,
114*4882a593Smuzhiyun msecs_to_jiffies(1000));
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (err == -EINTR) {
117*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Device boot interrupted");
118*4882a593Smuzhiyun return -EINTR;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (err) {
122*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Device boot timeout");
123*4882a593Smuzhiyun return -ETIMEDOUT;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return err;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun #ifdef CONFIG_PM
intel_wait_lpm_transaction(struct hci_uart * hu)130*4882a593Smuzhiyun static int intel_wait_lpm_transaction(struct hci_uart *hu)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
133*4882a593Smuzhiyun int err;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION,
136*4882a593Smuzhiyun TASK_INTERRUPTIBLE,
137*4882a593Smuzhiyun msecs_to_jiffies(1000));
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (err == -EINTR) {
140*4882a593Smuzhiyun bt_dev_err(hu->hdev, "LPM transaction interrupted");
141*4882a593Smuzhiyun return -EINTR;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (err) {
145*4882a593Smuzhiyun bt_dev_err(hu->hdev, "LPM transaction timeout");
146*4882a593Smuzhiyun return -ETIMEDOUT;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun return err;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
intel_lpm_suspend(struct hci_uart * hu)152*4882a593Smuzhiyun static int intel_lpm_suspend(struct hci_uart *hu)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun static const u8 suspend[] = { 0x01, 0x01, 0x01 };
155*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
156*4882a593Smuzhiyun struct sk_buff *skb;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
159*4882a593Smuzhiyun test_bit(STATE_SUSPENDED, &intel->flags))
160*4882a593Smuzhiyun return 0;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (test_bit(STATE_TX_ACTIVE, &intel->flags))
163*4882a593Smuzhiyun return -EAGAIN;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun bt_dev_dbg(hu->hdev, "Suspending");
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL);
168*4882a593Smuzhiyun if (!skb) {
169*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
170*4882a593Smuzhiyun return -ENOMEM;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun skb_put_data(skb, suspend, sizeof(suspend));
174*4882a593Smuzhiyun hci_skb_pkt_type(skb) = HCI_LPM_PKT;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun set_bit(STATE_LPM_TRANSACTION, &intel->flags);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /* LPM flow is a priority, enqueue packet at list head */
179*4882a593Smuzhiyun skb_queue_head(&intel->txq, skb);
180*4882a593Smuzhiyun hci_uart_tx_wakeup(hu);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun intel_wait_lpm_transaction(hu);
183*4882a593Smuzhiyun /* Even in case of failure, continue and test the suspended flag */
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun if (!test_bit(STATE_SUSPENDED, &intel->flags)) {
188*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Device suspend error");
189*4882a593Smuzhiyun return -EINVAL;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun bt_dev_dbg(hu->hdev, "Suspended");
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun hci_uart_set_flow_control(hu, true);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun return 0;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
intel_lpm_resume(struct hci_uart * hu)199*4882a593Smuzhiyun static int intel_lpm_resume(struct hci_uart *hu)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
202*4882a593Smuzhiyun struct sk_buff *skb;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
205*4882a593Smuzhiyun !test_bit(STATE_SUSPENDED, &intel->flags))
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun bt_dev_dbg(hu->hdev, "Resuming");
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun hci_uart_set_flow_control(hu, false);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun skb = bt_skb_alloc(0, GFP_KERNEL);
213*4882a593Smuzhiyun if (!skb) {
214*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
215*4882a593Smuzhiyun return -ENOMEM;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun set_bit(STATE_LPM_TRANSACTION, &intel->flags);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* LPM flow is a priority, enqueue packet at list head */
223*4882a593Smuzhiyun skb_queue_head(&intel->txq, skb);
224*4882a593Smuzhiyun hci_uart_tx_wakeup(hu);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun intel_wait_lpm_transaction(hu);
227*4882a593Smuzhiyun /* Even in case of failure, continue and test the suspended flag */
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun if (test_bit(STATE_SUSPENDED, &intel->flags)) {
232*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Device resume error");
233*4882a593Smuzhiyun return -EINVAL;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun bt_dev_dbg(hu->hdev, "Resumed");
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun return 0;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun #endif /* CONFIG_PM */
241*4882a593Smuzhiyun
intel_lpm_host_wake(struct hci_uart * hu)242*4882a593Smuzhiyun static int intel_lpm_host_wake(struct hci_uart *hu)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 };
245*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
246*4882a593Smuzhiyun struct sk_buff *skb;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun hci_uart_set_flow_control(hu, false);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun clear_bit(STATE_SUSPENDED, &intel->flags);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL);
253*4882a593Smuzhiyun if (!skb) {
254*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
255*4882a593Smuzhiyun return -ENOMEM;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack));
259*4882a593Smuzhiyun hci_skb_pkt_type(skb) = HCI_LPM_PKT;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* LPM flow is a priority, enqueue packet at list head */
262*4882a593Smuzhiyun skb_queue_head(&intel->txq, skb);
263*4882a593Smuzhiyun hci_uart_tx_wakeup(hu);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun bt_dev_dbg(hu->hdev, "Resumed by controller");
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
intel_irq(int irq,void * dev_id)270*4882a593Smuzhiyun static irqreturn_t intel_irq(int irq, void *dev_id)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun struct intel_device *idev = dev_id;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun dev_info(&idev->pdev->dev, "hci_intel irq\n");
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun mutex_lock(&idev->hu_lock);
277*4882a593Smuzhiyun if (idev->hu)
278*4882a593Smuzhiyun intel_lpm_host_wake(idev->hu);
279*4882a593Smuzhiyun mutex_unlock(&idev->hu_lock);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* Host/Controller are now LPM resumed, trigger a new delayed suspend */
282*4882a593Smuzhiyun pm_runtime_get(&idev->pdev->dev);
283*4882a593Smuzhiyun pm_runtime_mark_last_busy(&idev->pdev->dev);
284*4882a593Smuzhiyun pm_runtime_put_autosuspend(&idev->pdev->dev);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return IRQ_HANDLED;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
intel_set_power(struct hci_uart * hu,bool powered)289*4882a593Smuzhiyun static int intel_set_power(struct hci_uart *hu, bool powered)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct intel_device *idev;
292*4882a593Smuzhiyun int err = -ENODEV;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (!hu->tty->dev)
295*4882a593Smuzhiyun return err;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun list_for_each_entry(idev, &intel_device_list, list) {
300*4882a593Smuzhiyun /* tty device and pdev device should share the same parent
301*4882a593Smuzhiyun * which is the UART port.
302*4882a593Smuzhiyun */
303*4882a593Smuzhiyun if (hu->tty->dev->parent != idev->pdev->dev.parent)
304*4882a593Smuzhiyun continue;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (!idev->reset) {
307*4882a593Smuzhiyun err = -ENOTSUPP;
308*4882a593Smuzhiyun break;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun BT_INFO("hu %p, Switching compatible pm device (%s) to %u",
312*4882a593Smuzhiyun hu, dev_name(&idev->pdev->dev), powered);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun gpiod_set_value(idev->reset, powered);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* Provide to idev a hu reference which is used to run LPM
317*4882a593Smuzhiyun * transactions (lpm suspend/resume) from PM callbacks.
318*4882a593Smuzhiyun * hu needs to be protected against concurrent removing during
319*4882a593Smuzhiyun * these PM ops.
320*4882a593Smuzhiyun */
321*4882a593Smuzhiyun mutex_lock(&idev->hu_lock);
322*4882a593Smuzhiyun idev->hu = powered ? hu : NULL;
323*4882a593Smuzhiyun mutex_unlock(&idev->hu_lock);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun if (idev->irq < 0)
326*4882a593Smuzhiyun break;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun if (powered && device_can_wakeup(&idev->pdev->dev)) {
329*4882a593Smuzhiyun err = devm_request_threaded_irq(&idev->pdev->dev,
330*4882a593Smuzhiyun idev->irq, NULL,
331*4882a593Smuzhiyun intel_irq,
332*4882a593Smuzhiyun IRQF_ONESHOT,
333*4882a593Smuzhiyun "bt-host-wake", idev);
334*4882a593Smuzhiyun if (err) {
335*4882a593Smuzhiyun BT_ERR("hu %p, unable to allocate irq-%d",
336*4882a593Smuzhiyun hu, idev->irq);
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun device_wakeup_enable(&idev->pdev->dev);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun pm_runtime_set_active(&idev->pdev->dev);
343*4882a593Smuzhiyun pm_runtime_use_autosuspend(&idev->pdev->dev);
344*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&idev->pdev->dev,
345*4882a593Smuzhiyun LPM_SUSPEND_DELAY_MS);
346*4882a593Smuzhiyun pm_runtime_enable(&idev->pdev->dev);
347*4882a593Smuzhiyun } else if (!powered && device_may_wakeup(&idev->pdev->dev)) {
348*4882a593Smuzhiyun devm_free_irq(&idev->pdev->dev, idev->irq, idev);
349*4882a593Smuzhiyun device_wakeup_disable(&idev->pdev->dev);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun pm_runtime_disable(&idev->pdev->dev);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun return err;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
intel_busy_work(struct work_struct * work)360*4882a593Smuzhiyun static void intel_busy_work(struct work_struct *work)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun struct intel_data *intel = container_of(work, struct intel_data,
363*4882a593Smuzhiyun busy_work);
364*4882a593Smuzhiyun struct intel_device *idev;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun if (!intel->hu->tty->dev)
367*4882a593Smuzhiyun return;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* Link is busy, delay the suspend */
370*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
371*4882a593Smuzhiyun list_for_each_entry(idev, &intel_device_list, list) {
372*4882a593Smuzhiyun if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) {
373*4882a593Smuzhiyun pm_runtime_get(&idev->pdev->dev);
374*4882a593Smuzhiyun pm_runtime_mark_last_busy(&idev->pdev->dev);
375*4882a593Smuzhiyun pm_runtime_put_autosuspend(&idev->pdev->dev);
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
intel_open(struct hci_uart * hu)382*4882a593Smuzhiyun static int intel_open(struct hci_uart *hu)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun struct intel_data *intel;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun BT_DBG("hu %p", hu);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun if (!hci_uart_has_flow_control(hu))
389*4882a593Smuzhiyun return -EOPNOTSUPP;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun intel = kzalloc(sizeof(*intel), GFP_KERNEL);
392*4882a593Smuzhiyun if (!intel)
393*4882a593Smuzhiyun return -ENOMEM;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun skb_queue_head_init(&intel->txq);
396*4882a593Smuzhiyun INIT_WORK(&intel->busy_work, intel_busy_work);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun intel->hu = hu;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun hu->priv = intel;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (!intel_set_power(hu, true))
403*4882a593Smuzhiyun set_bit(STATE_BOOTING, &intel->flags);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun return 0;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
intel_close(struct hci_uart * hu)408*4882a593Smuzhiyun static int intel_close(struct hci_uart *hu)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun BT_DBG("hu %p", hu);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun cancel_work_sync(&intel->busy_work);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun intel_set_power(hu, false);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun skb_queue_purge(&intel->txq);
419*4882a593Smuzhiyun kfree_skb(intel->rx_skb);
420*4882a593Smuzhiyun kfree(intel);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun hu->priv = NULL;
423*4882a593Smuzhiyun return 0;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
intel_flush(struct hci_uart * hu)426*4882a593Smuzhiyun static int intel_flush(struct hci_uart *hu)
427*4882a593Smuzhiyun {
428*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun BT_DBG("hu %p", hu);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun skb_queue_purge(&intel->txq);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun return 0;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
inject_cmd_complete(struct hci_dev * hdev,__u16 opcode)437*4882a593Smuzhiyun static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun struct sk_buff *skb;
440*4882a593Smuzhiyun struct hci_event_hdr *hdr;
441*4882a593Smuzhiyun struct hci_ev_cmd_complete *evt;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
444*4882a593Smuzhiyun if (!skb)
445*4882a593Smuzhiyun return -ENOMEM;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun hdr = skb_put(skb, sizeof(*hdr));
448*4882a593Smuzhiyun hdr->evt = HCI_EV_CMD_COMPLETE;
449*4882a593Smuzhiyun hdr->plen = sizeof(*evt) + 1;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun evt = skb_put(skb, sizeof(*evt));
452*4882a593Smuzhiyun evt->ncmd = 0x01;
453*4882a593Smuzhiyun evt->opcode = cpu_to_le16(opcode);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun skb_put_u8(skb, 0x00);
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun return hci_recv_frame(hdev, skb);
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
intel_set_baudrate(struct hci_uart * hu,unsigned int speed)462*4882a593Smuzhiyun static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
465*4882a593Smuzhiyun struct hci_dev *hdev = hu->hdev;
466*4882a593Smuzhiyun u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 };
467*4882a593Smuzhiyun struct sk_buff *skb;
468*4882a593Smuzhiyun int err;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun /* This can be the first command sent to the chip, check
471*4882a593Smuzhiyun * that the controller is ready.
472*4882a593Smuzhiyun */
473*4882a593Smuzhiyun err = intel_wait_booting(hu);
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun clear_bit(STATE_BOOTING, &intel->flags);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun /* In case of timeout, try to continue anyway */
478*4882a593Smuzhiyun if (err && err != -ETIMEDOUT)
479*4882a593Smuzhiyun return err;
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun bt_dev_info(hdev, "Change controller speed to %d", speed);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun speed_cmd[3] = intel_convert_speed(speed);
484*4882a593Smuzhiyun if (speed_cmd[3] == 0xff) {
485*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported speed");
486*4882a593Smuzhiyun return -EINVAL;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* Device will not accept speed change if Intel version has not been
490*4882a593Smuzhiyun * previously requested.
491*4882a593Smuzhiyun */
492*4882a593Smuzhiyun skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
493*4882a593Smuzhiyun if (IS_ERR(skb)) {
494*4882a593Smuzhiyun bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
495*4882a593Smuzhiyun PTR_ERR(skb));
496*4882a593Smuzhiyun return PTR_ERR(skb);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun kfree_skb(skb);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL);
501*4882a593Smuzhiyun if (!skb) {
502*4882a593Smuzhiyun bt_dev_err(hdev, "Failed to alloc memory for baudrate packet");
503*4882a593Smuzhiyun return -ENOMEM;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun skb_put_data(skb, speed_cmd, sizeof(speed_cmd));
507*4882a593Smuzhiyun hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun hci_uart_set_flow_control(hu, true);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun skb_queue_tail(&intel->txq, skb);
512*4882a593Smuzhiyun hci_uart_tx_wakeup(hu);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* wait 100ms to change baudrate on controller side */
515*4882a593Smuzhiyun msleep(100);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun hci_uart_set_baudrate(hu, speed);
518*4882a593Smuzhiyun hci_uart_set_flow_control(hu, false);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun return 0;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
intel_setup(struct hci_uart * hu)523*4882a593Smuzhiyun static int intel_setup(struct hci_uart *hu)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
526*4882a593Smuzhiyun struct hci_dev *hdev = hu->hdev;
527*4882a593Smuzhiyun struct sk_buff *skb;
528*4882a593Smuzhiyun struct intel_version ver;
529*4882a593Smuzhiyun struct intel_boot_params params;
530*4882a593Smuzhiyun struct intel_device *idev;
531*4882a593Smuzhiyun const struct firmware *fw;
532*4882a593Smuzhiyun char fwname[64];
533*4882a593Smuzhiyun u32 boot_param;
534*4882a593Smuzhiyun ktime_t calltime, delta, rettime;
535*4882a593Smuzhiyun unsigned long long duration;
536*4882a593Smuzhiyun unsigned int init_speed, oper_speed;
537*4882a593Smuzhiyun int speed_change = 0;
538*4882a593Smuzhiyun int err;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun bt_dev_dbg(hdev, "start intel_setup");
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun hu->hdev->set_diag = btintel_set_diag;
543*4882a593Smuzhiyun hu->hdev->set_bdaddr = btintel_set_bdaddr;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun /* Set the default boot parameter to 0x0 and it is updated to
546*4882a593Smuzhiyun * SKU specific boot parameter after reading Intel_Write_Boot_Params
547*4882a593Smuzhiyun * command while downloading the firmware.
548*4882a593Smuzhiyun */
549*4882a593Smuzhiyun boot_param = 0x00000000;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun calltime = ktime_get();
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun if (hu->init_speed)
554*4882a593Smuzhiyun init_speed = hu->init_speed;
555*4882a593Smuzhiyun else
556*4882a593Smuzhiyun init_speed = hu->proto->init_speed;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (hu->oper_speed)
559*4882a593Smuzhiyun oper_speed = hu->oper_speed;
560*4882a593Smuzhiyun else
561*4882a593Smuzhiyun oper_speed = hu->proto->oper_speed;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun if (oper_speed && init_speed && oper_speed != init_speed)
564*4882a593Smuzhiyun speed_change = 1;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* Check that the controller is ready */
567*4882a593Smuzhiyun err = intel_wait_booting(hu);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun clear_bit(STATE_BOOTING, &intel->flags);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /* In case of timeout, try to continue anyway */
572*4882a593Smuzhiyun if (err && err != -ETIMEDOUT)
573*4882a593Smuzhiyun return err;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun set_bit(STATE_BOOTLOADER, &intel->flags);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun /* Read the Intel version information to determine if the device
578*4882a593Smuzhiyun * is in bootloader mode or if it already has operational firmware
579*4882a593Smuzhiyun * loaded.
580*4882a593Smuzhiyun */
581*4882a593Smuzhiyun err = btintel_read_version(hdev, &ver);
582*4882a593Smuzhiyun if (err)
583*4882a593Smuzhiyun return err;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /* The hardware platform number has a fixed value of 0x37 and
586*4882a593Smuzhiyun * for now only accept this single value.
587*4882a593Smuzhiyun */
588*4882a593Smuzhiyun if (ver.hw_platform != 0x37) {
589*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)",
590*4882a593Smuzhiyun ver.hw_platform);
591*4882a593Smuzhiyun return -EINVAL;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun /* Check for supported iBT hardware variants of this firmware
595*4882a593Smuzhiyun * loading method.
596*4882a593Smuzhiyun *
597*4882a593Smuzhiyun * This check has been put in place to ensure correct forward
598*4882a593Smuzhiyun * compatibility options when newer hardware variants come along.
599*4882a593Smuzhiyun */
600*4882a593Smuzhiyun switch (ver.hw_variant) {
601*4882a593Smuzhiyun case 0x0b: /* LnP */
602*4882a593Smuzhiyun case 0x0c: /* WsP */
603*4882a593Smuzhiyun case 0x12: /* ThP */
604*4882a593Smuzhiyun break;
605*4882a593Smuzhiyun default:
606*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
607*4882a593Smuzhiyun ver.hw_variant);
608*4882a593Smuzhiyun return -EINVAL;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun btintel_version_info(hdev, &ver);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun /* The firmware variant determines if the device is in bootloader
614*4882a593Smuzhiyun * mode or is running operational firmware. The value 0x06 identifies
615*4882a593Smuzhiyun * the bootloader and the value 0x23 identifies the operational
616*4882a593Smuzhiyun * firmware.
617*4882a593Smuzhiyun *
618*4882a593Smuzhiyun * When the operational firmware is already present, then only
619*4882a593Smuzhiyun * the check for valid Bluetooth device address is needed. This
620*4882a593Smuzhiyun * determines if the device will be added as configured or
621*4882a593Smuzhiyun * unconfigured controller.
622*4882a593Smuzhiyun *
623*4882a593Smuzhiyun * It is not possible to use the Secure Boot Parameters in this
624*4882a593Smuzhiyun * case since that command is only available in bootloader mode.
625*4882a593Smuzhiyun */
626*4882a593Smuzhiyun if (ver.fw_variant == 0x23) {
627*4882a593Smuzhiyun clear_bit(STATE_BOOTLOADER, &intel->flags);
628*4882a593Smuzhiyun btintel_check_bdaddr(hdev);
629*4882a593Smuzhiyun return 0;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* If the device is not in bootloader mode, then the only possible
633*4882a593Smuzhiyun * choice is to return an error and abort the device initialization.
634*4882a593Smuzhiyun */
635*4882a593Smuzhiyun if (ver.fw_variant != 0x06) {
636*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)",
637*4882a593Smuzhiyun ver.fw_variant);
638*4882a593Smuzhiyun return -ENODEV;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun /* Read the secure boot parameters to identify the operating
642*4882a593Smuzhiyun * details of the bootloader.
643*4882a593Smuzhiyun */
644*4882a593Smuzhiyun err = btintel_read_boot_params(hdev, ¶ms);
645*4882a593Smuzhiyun if (err)
646*4882a593Smuzhiyun return err;
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun /* It is required that every single firmware fragment is acknowledged
649*4882a593Smuzhiyun * with a command complete event. If the boot parameters indicate
650*4882a593Smuzhiyun * that this bootloader does not send them, then abort the setup.
651*4882a593Smuzhiyun */
652*4882a593Smuzhiyun if (params.limited_cce != 0x00) {
653*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)",
654*4882a593Smuzhiyun params.limited_cce);
655*4882a593Smuzhiyun return -EINVAL;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun /* If the OTP has no valid Bluetooth device address, then there will
659*4882a593Smuzhiyun * also be no valid address for the operational firmware.
660*4882a593Smuzhiyun */
661*4882a593Smuzhiyun if (!bacmp(¶ms.otp_bdaddr, BDADDR_ANY)) {
662*4882a593Smuzhiyun bt_dev_info(hdev, "No device address configured");
663*4882a593Smuzhiyun set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /* With this Intel bootloader only the hardware variant and device
667*4882a593Smuzhiyun * revision information are used to select the right firmware for SfP
668*4882a593Smuzhiyun * and WsP.
669*4882a593Smuzhiyun *
670*4882a593Smuzhiyun * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi.
671*4882a593Smuzhiyun *
672*4882a593Smuzhiyun * Currently the supported hardware variants are:
673*4882a593Smuzhiyun * 11 (0x0b) for iBT 3.0 (LnP/SfP)
674*4882a593Smuzhiyun * 12 (0x0c) for iBT 3.5 (WsP)
675*4882a593Smuzhiyun *
676*4882a593Smuzhiyun * For ThP/JfP and for future SKU's, the FW name varies based on HW
677*4882a593Smuzhiyun * variant, HW revision and FW revision, as these are dependent on CNVi
678*4882a593Smuzhiyun * and RF Combination.
679*4882a593Smuzhiyun *
680*4882a593Smuzhiyun * 18 (0x12) for iBT3.5 (ThP/JfP)
681*4882a593Smuzhiyun *
682*4882a593Smuzhiyun * The firmware file name for these will be
683*4882a593Smuzhiyun * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi.
684*4882a593Smuzhiyun *
685*4882a593Smuzhiyun */
686*4882a593Smuzhiyun switch (ver.hw_variant) {
687*4882a593Smuzhiyun case 0x0b: /* SfP */
688*4882a593Smuzhiyun case 0x0c: /* WsP */
689*4882a593Smuzhiyun snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi",
690*4882a593Smuzhiyun ver.hw_variant, le16_to_cpu(params.dev_revid));
691*4882a593Smuzhiyun break;
692*4882a593Smuzhiyun case 0x12: /* ThP */
693*4882a593Smuzhiyun snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi",
694*4882a593Smuzhiyun ver.hw_variant, ver.hw_revision, ver.fw_revision);
695*4882a593Smuzhiyun break;
696*4882a593Smuzhiyun default:
697*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
698*4882a593Smuzhiyun ver.hw_variant);
699*4882a593Smuzhiyun return -EINVAL;
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun err = request_firmware(&fw, fwname, &hdev->dev);
703*4882a593Smuzhiyun if (err < 0) {
704*4882a593Smuzhiyun bt_dev_err(hdev, "Failed to load Intel firmware file (%d)",
705*4882a593Smuzhiyun err);
706*4882a593Smuzhiyun return err;
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun bt_dev_info(hdev, "Found device firmware: %s", fwname);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun /* Save the DDC file name for later */
712*4882a593Smuzhiyun switch (ver.hw_variant) {
713*4882a593Smuzhiyun case 0x0b: /* SfP */
714*4882a593Smuzhiyun case 0x0c: /* WsP */
715*4882a593Smuzhiyun snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc",
716*4882a593Smuzhiyun ver.hw_variant, le16_to_cpu(params.dev_revid));
717*4882a593Smuzhiyun break;
718*4882a593Smuzhiyun case 0x12: /* ThP */
719*4882a593Smuzhiyun snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc",
720*4882a593Smuzhiyun ver.hw_variant, ver.hw_revision, ver.fw_revision);
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun default:
723*4882a593Smuzhiyun bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
724*4882a593Smuzhiyun ver.hw_variant);
725*4882a593Smuzhiyun return -EINVAL;
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun if (fw->size < 644) {
729*4882a593Smuzhiyun bt_dev_err(hdev, "Invalid size of firmware file (%zu)",
730*4882a593Smuzhiyun fw->size);
731*4882a593Smuzhiyun err = -EBADF;
732*4882a593Smuzhiyun goto done;
733*4882a593Smuzhiyun }
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun set_bit(STATE_DOWNLOADING, &intel->flags);
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* Start firmware downloading and get boot parameter */
738*4882a593Smuzhiyun err = btintel_download_firmware(hdev, fw, &boot_param);
739*4882a593Smuzhiyun if (err < 0)
740*4882a593Smuzhiyun goto done;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun set_bit(STATE_FIRMWARE_LOADED, &intel->flags);
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun bt_dev_info(hdev, "Waiting for firmware download to complete");
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun /* Before switching the device into operational mode and with that
747*4882a593Smuzhiyun * booting the loaded firmware, wait for the bootloader notification
748*4882a593Smuzhiyun * that all fragments have been successfully received.
749*4882a593Smuzhiyun *
750*4882a593Smuzhiyun * When the event processing receives the notification, then the
751*4882a593Smuzhiyun * STATE_DOWNLOADING flag will be cleared.
752*4882a593Smuzhiyun *
753*4882a593Smuzhiyun * The firmware loading should not take longer than 5 seconds
754*4882a593Smuzhiyun * and thus just timeout if that happens and fail the setup
755*4882a593Smuzhiyun * of this device.
756*4882a593Smuzhiyun */
757*4882a593Smuzhiyun err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING,
758*4882a593Smuzhiyun TASK_INTERRUPTIBLE,
759*4882a593Smuzhiyun msecs_to_jiffies(5000));
760*4882a593Smuzhiyun if (err == -EINTR) {
761*4882a593Smuzhiyun bt_dev_err(hdev, "Firmware loading interrupted");
762*4882a593Smuzhiyun err = -EINTR;
763*4882a593Smuzhiyun goto done;
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun if (err) {
767*4882a593Smuzhiyun bt_dev_err(hdev, "Firmware loading timeout");
768*4882a593Smuzhiyun err = -ETIMEDOUT;
769*4882a593Smuzhiyun goto done;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) {
773*4882a593Smuzhiyun bt_dev_err(hdev, "Firmware loading failed");
774*4882a593Smuzhiyun err = -ENOEXEC;
775*4882a593Smuzhiyun goto done;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun rettime = ktime_get();
779*4882a593Smuzhiyun delta = ktime_sub(rettime, calltime);
780*4882a593Smuzhiyun duration = (unsigned long long) ktime_to_ns(delta) >> 10;
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun done:
785*4882a593Smuzhiyun release_firmware(fw);
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun if (err < 0)
788*4882a593Smuzhiyun return err;
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun /* We need to restore the default speed before Intel reset */
791*4882a593Smuzhiyun if (speed_change) {
792*4882a593Smuzhiyun err = intel_set_baudrate(hu, init_speed);
793*4882a593Smuzhiyun if (err)
794*4882a593Smuzhiyun return err;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun calltime = ktime_get();
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun set_bit(STATE_BOOTING, &intel->flags);
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun err = btintel_send_intel_reset(hdev, boot_param);
802*4882a593Smuzhiyun if (err)
803*4882a593Smuzhiyun return err;
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun /* The bootloader will not indicate when the device is ready. This
806*4882a593Smuzhiyun * is done by the operational firmware sending bootup notification.
807*4882a593Smuzhiyun *
808*4882a593Smuzhiyun * Booting into operational firmware should not take longer than
809*4882a593Smuzhiyun * 1 second. However if that happens, then just fail the setup
810*4882a593Smuzhiyun * since something went wrong.
811*4882a593Smuzhiyun */
812*4882a593Smuzhiyun bt_dev_info(hdev, "Waiting for device to boot");
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun err = intel_wait_booting(hu);
815*4882a593Smuzhiyun if (err)
816*4882a593Smuzhiyun return err;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun clear_bit(STATE_BOOTING, &intel->flags);
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun rettime = ktime_get();
821*4882a593Smuzhiyun delta = ktime_sub(rettime, calltime);
822*4882a593Smuzhiyun duration = (unsigned long long) ktime_to_ns(delta) >> 10;
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun bt_dev_info(hdev, "Device booted in %llu usecs", duration);
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun /* Enable LPM if matching pdev with wakeup enabled, set TX active
827*4882a593Smuzhiyun * until further LPM TX notification.
828*4882a593Smuzhiyun */
829*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
830*4882a593Smuzhiyun list_for_each_entry(idev, &intel_device_list, list) {
831*4882a593Smuzhiyun if (!hu->tty->dev)
832*4882a593Smuzhiyun break;
833*4882a593Smuzhiyun if (hu->tty->dev->parent == idev->pdev->dev.parent) {
834*4882a593Smuzhiyun if (device_may_wakeup(&idev->pdev->dev)) {
835*4882a593Smuzhiyun set_bit(STATE_LPM_ENABLED, &intel->flags);
836*4882a593Smuzhiyun set_bit(STATE_TX_ACTIVE, &intel->flags);
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun break;
839*4882a593Smuzhiyun }
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun /* Ignore errors, device can work without DDC parameters */
844*4882a593Smuzhiyun btintel_load_ddc_config(hdev, fwname);
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT);
847*4882a593Smuzhiyun if (IS_ERR(skb))
848*4882a593Smuzhiyun return PTR_ERR(skb);
849*4882a593Smuzhiyun kfree_skb(skb);
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun if (speed_change) {
852*4882a593Smuzhiyun err = intel_set_baudrate(hu, oper_speed);
853*4882a593Smuzhiyun if (err)
854*4882a593Smuzhiyun return err;
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun bt_dev_info(hdev, "Setup complete");
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun clear_bit(STATE_BOOTLOADER, &intel->flags);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun return 0;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
intel_recv_event(struct hci_dev * hdev,struct sk_buff * skb)864*4882a593Smuzhiyun static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun struct hci_uart *hu = hci_get_drvdata(hdev);
867*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
868*4882a593Smuzhiyun struct hci_event_hdr *hdr;
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun if (!test_bit(STATE_BOOTLOADER, &intel->flags) &&
871*4882a593Smuzhiyun !test_bit(STATE_BOOTING, &intel->flags))
872*4882a593Smuzhiyun goto recv;
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun hdr = (void *)skb->data;
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun /* When the firmware loading completes the device sends
877*4882a593Smuzhiyun * out a vendor specific event indicating the result of
878*4882a593Smuzhiyun * the firmware loading.
879*4882a593Smuzhiyun */
880*4882a593Smuzhiyun if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 &&
881*4882a593Smuzhiyun skb->data[2] == 0x06) {
882*4882a593Smuzhiyun if (skb->data[3] != 0x00)
883*4882a593Smuzhiyun set_bit(STATE_FIRMWARE_FAILED, &intel->flags);
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) &&
886*4882a593Smuzhiyun test_bit(STATE_FIRMWARE_LOADED, &intel->flags))
887*4882a593Smuzhiyun wake_up_bit(&intel->flags, STATE_DOWNLOADING);
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun /* When switching to the operational firmware the device
890*4882a593Smuzhiyun * sends a vendor specific event indicating that the bootup
891*4882a593Smuzhiyun * completed.
892*4882a593Smuzhiyun */
893*4882a593Smuzhiyun } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 &&
894*4882a593Smuzhiyun skb->data[2] == 0x02) {
895*4882a593Smuzhiyun if (test_and_clear_bit(STATE_BOOTING, &intel->flags))
896*4882a593Smuzhiyun wake_up_bit(&intel->flags, STATE_BOOTING);
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun recv:
899*4882a593Smuzhiyun return hci_recv_frame(hdev, skb);
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun
intel_recv_lpm_notify(struct hci_dev * hdev,int value)902*4882a593Smuzhiyun static void intel_recv_lpm_notify(struct hci_dev *hdev, int value)
903*4882a593Smuzhiyun {
904*4882a593Smuzhiyun struct hci_uart *hu = hci_get_drvdata(hdev);
905*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun bt_dev_dbg(hdev, "TX idle notification (%d)", value);
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun if (value) {
910*4882a593Smuzhiyun set_bit(STATE_TX_ACTIVE, &intel->flags);
911*4882a593Smuzhiyun schedule_work(&intel->busy_work);
912*4882a593Smuzhiyun } else {
913*4882a593Smuzhiyun clear_bit(STATE_TX_ACTIVE, &intel->flags);
914*4882a593Smuzhiyun }
915*4882a593Smuzhiyun }
916*4882a593Smuzhiyun
intel_recv_lpm(struct hci_dev * hdev,struct sk_buff * skb)917*4882a593Smuzhiyun static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun struct hci_lpm_pkt *lpm = (void *)skb->data;
920*4882a593Smuzhiyun struct hci_uart *hu = hci_get_drvdata(hdev);
921*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun switch (lpm->opcode) {
924*4882a593Smuzhiyun case LPM_OP_TX_NOTIFY:
925*4882a593Smuzhiyun if (lpm->dlen < 1) {
926*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Invalid LPM notification packet");
927*4882a593Smuzhiyun break;
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun intel_recv_lpm_notify(hdev, lpm->data[0]);
930*4882a593Smuzhiyun break;
931*4882a593Smuzhiyun case LPM_OP_SUSPEND_ACK:
932*4882a593Smuzhiyun set_bit(STATE_SUSPENDED, &intel->flags);
933*4882a593Smuzhiyun if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
934*4882a593Smuzhiyun wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
935*4882a593Smuzhiyun break;
936*4882a593Smuzhiyun case LPM_OP_RESUME_ACK:
937*4882a593Smuzhiyun clear_bit(STATE_SUSPENDED, &intel->flags);
938*4882a593Smuzhiyun if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
939*4882a593Smuzhiyun wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
940*4882a593Smuzhiyun break;
941*4882a593Smuzhiyun default:
942*4882a593Smuzhiyun bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode);
943*4882a593Smuzhiyun break;
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun kfree_skb(skb);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun return 0;
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun #define INTEL_RECV_LPM \
952*4882a593Smuzhiyun .type = HCI_LPM_PKT, \
953*4882a593Smuzhiyun .hlen = HCI_LPM_HDR_SIZE, \
954*4882a593Smuzhiyun .loff = 1, \
955*4882a593Smuzhiyun .lsize = 1, \
956*4882a593Smuzhiyun .maxlen = HCI_LPM_MAX_SIZE
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun static const struct h4_recv_pkt intel_recv_pkts[] = {
959*4882a593Smuzhiyun { H4_RECV_ACL, .recv = hci_recv_frame },
960*4882a593Smuzhiyun { H4_RECV_SCO, .recv = hci_recv_frame },
961*4882a593Smuzhiyun { H4_RECV_EVENT, .recv = intel_recv_event },
962*4882a593Smuzhiyun { INTEL_RECV_LPM, .recv = intel_recv_lpm },
963*4882a593Smuzhiyun };
964*4882a593Smuzhiyun
intel_recv(struct hci_uart * hu,const void * data,int count)965*4882a593Smuzhiyun static int intel_recv(struct hci_uart *hu, const void *data, int count)
966*4882a593Smuzhiyun {
967*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
970*4882a593Smuzhiyun return -EUNATCH;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count,
973*4882a593Smuzhiyun intel_recv_pkts,
974*4882a593Smuzhiyun ARRAY_SIZE(intel_recv_pkts));
975*4882a593Smuzhiyun if (IS_ERR(intel->rx_skb)) {
976*4882a593Smuzhiyun int err = PTR_ERR(intel->rx_skb);
977*4882a593Smuzhiyun bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
978*4882a593Smuzhiyun intel->rx_skb = NULL;
979*4882a593Smuzhiyun return err;
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun return count;
983*4882a593Smuzhiyun }
984*4882a593Smuzhiyun
intel_enqueue(struct hci_uart * hu,struct sk_buff * skb)985*4882a593Smuzhiyun static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
988*4882a593Smuzhiyun struct intel_device *idev;
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun BT_DBG("hu %p skb %p", hu, skb);
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun if (!hu->tty->dev)
993*4882a593Smuzhiyun goto out_enqueue;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun /* Be sure our controller is resumed and potential LPM transaction
996*4882a593Smuzhiyun * completed before enqueuing any packet.
997*4882a593Smuzhiyun */
998*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
999*4882a593Smuzhiyun list_for_each_entry(idev, &intel_device_list, list) {
1000*4882a593Smuzhiyun if (hu->tty->dev->parent == idev->pdev->dev.parent) {
1001*4882a593Smuzhiyun pm_runtime_get_sync(&idev->pdev->dev);
1002*4882a593Smuzhiyun pm_runtime_mark_last_busy(&idev->pdev->dev);
1003*4882a593Smuzhiyun pm_runtime_put_autosuspend(&idev->pdev->dev);
1004*4882a593Smuzhiyun break;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun }
1007*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
1008*4882a593Smuzhiyun out_enqueue:
1009*4882a593Smuzhiyun skb_queue_tail(&intel->txq, skb);
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun return 0;
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun
intel_dequeue(struct hci_uart * hu)1014*4882a593Smuzhiyun static struct sk_buff *intel_dequeue(struct hci_uart *hu)
1015*4882a593Smuzhiyun {
1016*4882a593Smuzhiyun struct intel_data *intel = hu->priv;
1017*4882a593Smuzhiyun struct sk_buff *skb;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun skb = skb_dequeue(&intel->txq);
1020*4882a593Smuzhiyun if (!skb)
1021*4882a593Smuzhiyun return skb;
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun if (test_bit(STATE_BOOTLOADER, &intel->flags) &&
1024*4882a593Smuzhiyun (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) {
1025*4882a593Smuzhiyun struct hci_command_hdr *cmd = (void *)skb->data;
1026*4882a593Smuzhiyun __u16 opcode = le16_to_cpu(cmd->opcode);
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun /* When the 0xfc01 command is issued to boot into
1029*4882a593Smuzhiyun * the operational firmware, it will actually not
1030*4882a593Smuzhiyun * send a command complete event. To keep the flow
1031*4882a593Smuzhiyun * control working inject that event here.
1032*4882a593Smuzhiyun */
1033*4882a593Smuzhiyun if (opcode == 0xfc01)
1034*4882a593Smuzhiyun inject_cmd_complete(hu->hdev, opcode);
1035*4882a593Smuzhiyun }
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun /* Prepend skb with frame type */
1038*4882a593Smuzhiyun memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun return skb;
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun static const struct hci_uart_proto intel_proto = {
1044*4882a593Smuzhiyun .id = HCI_UART_INTEL,
1045*4882a593Smuzhiyun .name = "Intel",
1046*4882a593Smuzhiyun .manufacturer = 2,
1047*4882a593Smuzhiyun .init_speed = 115200,
1048*4882a593Smuzhiyun .oper_speed = 3000000,
1049*4882a593Smuzhiyun .open = intel_open,
1050*4882a593Smuzhiyun .close = intel_close,
1051*4882a593Smuzhiyun .flush = intel_flush,
1052*4882a593Smuzhiyun .setup = intel_setup,
1053*4882a593Smuzhiyun .set_baudrate = intel_set_baudrate,
1054*4882a593Smuzhiyun .recv = intel_recv,
1055*4882a593Smuzhiyun .enqueue = intel_enqueue,
1056*4882a593Smuzhiyun .dequeue = intel_dequeue,
1057*4882a593Smuzhiyun };
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun #ifdef CONFIG_ACPI
1060*4882a593Smuzhiyun static const struct acpi_device_id intel_acpi_match[] = {
1061*4882a593Smuzhiyun { "INT33E1", 0 },
1062*4882a593Smuzhiyun { "INT33E3", 0 },
1063*4882a593Smuzhiyun { }
1064*4882a593Smuzhiyun };
1065*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
1066*4882a593Smuzhiyun #endif
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun #ifdef CONFIG_PM
intel_suspend_device(struct device * dev)1069*4882a593Smuzhiyun static int intel_suspend_device(struct device *dev)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun struct intel_device *idev = dev_get_drvdata(dev);
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun mutex_lock(&idev->hu_lock);
1074*4882a593Smuzhiyun if (idev->hu)
1075*4882a593Smuzhiyun intel_lpm_suspend(idev->hu);
1076*4882a593Smuzhiyun mutex_unlock(&idev->hu_lock);
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun return 0;
1079*4882a593Smuzhiyun }
1080*4882a593Smuzhiyun
intel_resume_device(struct device * dev)1081*4882a593Smuzhiyun static int intel_resume_device(struct device *dev)
1082*4882a593Smuzhiyun {
1083*4882a593Smuzhiyun struct intel_device *idev = dev_get_drvdata(dev);
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun mutex_lock(&idev->hu_lock);
1086*4882a593Smuzhiyun if (idev->hu)
1087*4882a593Smuzhiyun intel_lpm_resume(idev->hu);
1088*4882a593Smuzhiyun mutex_unlock(&idev->hu_lock);
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun return 0;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun #endif
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
intel_suspend(struct device * dev)1095*4882a593Smuzhiyun static int intel_suspend(struct device *dev)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun struct intel_device *idev = dev_get_drvdata(dev);
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun if (device_may_wakeup(dev))
1100*4882a593Smuzhiyun enable_irq_wake(idev->irq);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun return intel_suspend_device(dev);
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun
intel_resume(struct device * dev)1105*4882a593Smuzhiyun static int intel_resume(struct device *dev)
1106*4882a593Smuzhiyun {
1107*4882a593Smuzhiyun struct intel_device *idev = dev_get_drvdata(dev);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun if (device_may_wakeup(dev))
1110*4882a593Smuzhiyun disable_irq_wake(idev->irq);
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun return intel_resume_device(dev);
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun #endif
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun static const struct dev_pm_ops intel_pm_ops = {
1117*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
1118*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL)
1119*4882a593Smuzhiyun };
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
1122*4882a593Smuzhiyun static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false };
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = {
1125*4882a593Smuzhiyun { "reset-gpios", &reset_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
1126*4882a593Smuzhiyun { "host-wake-gpios", &host_wake_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
1127*4882a593Smuzhiyun { }
1128*4882a593Smuzhiyun };
1129*4882a593Smuzhiyun
intel_probe(struct platform_device * pdev)1130*4882a593Smuzhiyun static int intel_probe(struct platform_device *pdev)
1131*4882a593Smuzhiyun {
1132*4882a593Smuzhiyun struct intel_device *idev;
1133*4882a593Smuzhiyun int ret;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
1136*4882a593Smuzhiyun if (!idev)
1137*4882a593Smuzhiyun return -ENOMEM;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun mutex_init(&idev->hu_lock);
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun idev->pdev = pdev;
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios);
1144*4882a593Smuzhiyun if (ret)
1145*4882a593Smuzhiyun dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n");
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
1148*4882a593Smuzhiyun if (IS_ERR(idev->reset)) {
1149*4882a593Smuzhiyun dev_err(&pdev->dev, "Unable to retrieve gpio\n");
1150*4882a593Smuzhiyun return PTR_ERR(idev->reset);
1151*4882a593Smuzhiyun }
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun idev->irq = platform_get_irq(pdev, 0);
1154*4882a593Smuzhiyun if (idev->irq < 0) {
1155*4882a593Smuzhiyun struct gpio_desc *host_wake;
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n");
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN);
1160*4882a593Smuzhiyun if (IS_ERR(host_wake)) {
1161*4882a593Smuzhiyun dev_err(&pdev->dev, "Unable to retrieve IRQ\n");
1162*4882a593Smuzhiyun goto no_irq;
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun idev->irq = gpiod_to_irq(host_wake);
1166*4882a593Smuzhiyun if (idev->irq < 0) {
1167*4882a593Smuzhiyun dev_err(&pdev->dev, "No corresponding irq for gpio\n");
1168*4882a593Smuzhiyun goto no_irq;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun }
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun /* Only enable wake-up/irq when controller is powered */
1173*4882a593Smuzhiyun device_set_wakeup_capable(&pdev->dev, true);
1174*4882a593Smuzhiyun device_wakeup_disable(&pdev->dev);
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun no_irq:
1177*4882a593Smuzhiyun platform_set_drvdata(pdev, idev);
1178*4882a593Smuzhiyun
1179*4882a593Smuzhiyun /* Place this instance on the device list */
1180*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
1181*4882a593Smuzhiyun list_add_tail(&idev->list, &intel_device_list);
1182*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n",
1185*4882a593Smuzhiyun desc_to_gpio(idev->reset), idev->irq);
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun return 0;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
intel_remove(struct platform_device * pdev)1190*4882a593Smuzhiyun static int intel_remove(struct platform_device *pdev)
1191*4882a593Smuzhiyun {
1192*4882a593Smuzhiyun struct intel_device *idev = platform_get_drvdata(pdev);
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun device_wakeup_disable(&pdev->dev);
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun mutex_lock(&intel_device_list_lock);
1197*4882a593Smuzhiyun list_del(&idev->list);
1198*4882a593Smuzhiyun mutex_unlock(&intel_device_list_lock);
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun dev_info(&pdev->dev, "unregistered.\n");
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun return 0;
1203*4882a593Smuzhiyun }
1204*4882a593Smuzhiyun
1205*4882a593Smuzhiyun static struct platform_driver intel_driver = {
1206*4882a593Smuzhiyun .probe = intel_probe,
1207*4882a593Smuzhiyun .remove = intel_remove,
1208*4882a593Smuzhiyun .driver = {
1209*4882a593Smuzhiyun .name = "hci_intel",
1210*4882a593Smuzhiyun .acpi_match_table = ACPI_PTR(intel_acpi_match),
1211*4882a593Smuzhiyun .pm = &intel_pm_ops,
1212*4882a593Smuzhiyun },
1213*4882a593Smuzhiyun };
1214*4882a593Smuzhiyun
intel_init(void)1215*4882a593Smuzhiyun int __init intel_init(void)
1216*4882a593Smuzhiyun {
1217*4882a593Smuzhiyun int err;
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun err = platform_driver_register(&intel_driver);
1220*4882a593Smuzhiyun if (err)
1221*4882a593Smuzhiyun return err;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun return hci_uart_register_proto(&intel_proto);
1224*4882a593Smuzhiyun }
1225*4882a593Smuzhiyun
intel_deinit(void)1226*4882a593Smuzhiyun int __exit intel_deinit(void)
1227*4882a593Smuzhiyun {
1228*4882a593Smuzhiyun platform_driver_unregister(&intel_driver);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun return hci_uart_unregister_proto(&intel_proto);
1231*4882a593Smuzhiyun }
1232