1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun on20.c (c) 1996-8 Grant R. Guenther <grant@torque.net>
3*4882a593Smuzhiyun Under the terms of the GNU General Public License.
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun on20.c is a low-level protocol driver for the
6*4882a593Smuzhiyun Onspec 90c20 parallel to IDE adapter.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun /* Changes:
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun 1.01 GRG 1998.05.06 init_proto, release_proto
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define ON20_VERSION "1.01"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/types.h>
22*4882a593Smuzhiyun #include <linux/wait.h>
23*4882a593Smuzhiyun #include <asm/io.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "paride.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define op(f) w2(4);w0(f);w2(5);w2(0xd);w2(5);w2(0xd);w2(5);w2(4);
28*4882a593Smuzhiyun #define vl(v) w2(4);w0(v);w2(5);w2(7);w2(5);w2(4);
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0))
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* cont = 0 - access the IDE register file
33*4882a593Smuzhiyun cont = 1 - access the IDE command set
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun
on20_read_regr(PIA * pi,int cont,int regr)36*4882a593Smuzhiyun static int on20_read_regr( PIA *pi, int cont, int regr )
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun { int h,l, r ;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun r = (regr<<2) + 1 + cont;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun op(1); vl(r); op(0);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun switch (pi->mode) {
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun case 0: w2(4); w2(6); l = r1();
47*4882a593Smuzhiyun w2(4); w2(6); h = r1();
48*4882a593Smuzhiyun w2(4); w2(6); w2(4); w2(6); w2(4);
49*4882a593Smuzhiyun return j44(l,h);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun case 1: w2(4); w2(0x26); r = r0();
52*4882a593Smuzhiyun w2(4); w2(0x26); w2(4);
53*4882a593Smuzhiyun return r;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun return -1;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
on20_write_regr(PIA * pi,int cont,int regr,int val)59*4882a593Smuzhiyun static void on20_write_regr( PIA *pi, int cont, int regr, int val )
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun { int r;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun r = (regr<<2) + 1 + cont;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun op(1); vl(r);
66*4882a593Smuzhiyun op(0); vl(val);
67*4882a593Smuzhiyun op(0); vl(val);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
on20_connect(PIA * pi)70*4882a593Smuzhiyun static void on20_connect ( PIA *pi)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun { pi->saved_r0 = r0();
73*4882a593Smuzhiyun pi->saved_r2 = r2();
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun w2(4);w0(0);w2(0xc);w2(4);w2(6);w2(4);w2(6);w2(4);
76*4882a593Smuzhiyun if (pi->mode) { op(2); vl(8); op(2); vl(9); }
77*4882a593Smuzhiyun else { op(2); vl(0); op(2); vl(8); }
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
on20_disconnect(PIA * pi)80*4882a593Smuzhiyun static void on20_disconnect ( PIA *pi )
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun { w2(4);w0(7);w2(4);w2(0xc);w2(4);
83*4882a593Smuzhiyun w0(pi->saved_r0);
84*4882a593Smuzhiyun w2(pi->saved_r2);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
on20_read_block(PIA * pi,char * buf,int count)87*4882a593Smuzhiyun static void on20_read_block( PIA *pi, char * buf, int count )
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun { int k, l, h;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun op(1); vl(1); op(0);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun for (k=0;k<count;k++)
94*4882a593Smuzhiyun if (pi->mode) {
95*4882a593Smuzhiyun w2(4); w2(0x26); buf[k] = r0();
96*4882a593Smuzhiyun } else {
97*4882a593Smuzhiyun w2(6); l = r1(); w2(4);
98*4882a593Smuzhiyun w2(6); h = r1(); w2(4);
99*4882a593Smuzhiyun buf[k] = j44(l,h);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun w2(4);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
on20_write_block(PIA * pi,char * buf,int count)104*4882a593Smuzhiyun static void on20_write_block( PIA *pi, char * buf, int count )
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun { int k;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun op(1); vl(1); op(0);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun for (k=0;k<count;k++) { w2(5); w0(buf[k]); w2(7); }
111*4882a593Smuzhiyun w2(4);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
on20_log_adapter(PIA * pi,char * scratch,int verbose)114*4882a593Smuzhiyun static void on20_log_adapter( PIA *pi, char * scratch, int verbose )
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun { char *mode_string[2] = {"4-bit","8-bit"};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun printk("%s: on20 %s, OnSpec 90c20 at 0x%x, ",
119*4882a593Smuzhiyun pi->device,ON20_VERSION,pi->port);
120*4882a593Smuzhiyun printk("mode %d (%s), delay %d\n",pi->mode,
121*4882a593Smuzhiyun mode_string[pi->mode],pi->delay);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static struct pi_protocol on20 = {
126*4882a593Smuzhiyun .owner = THIS_MODULE,
127*4882a593Smuzhiyun .name = "on20",
128*4882a593Smuzhiyun .max_mode = 2,
129*4882a593Smuzhiyun .epp_first = 2,
130*4882a593Smuzhiyun .default_delay = 1,
131*4882a593Smuzhiyun .max_units = 1,
132*4882a593Smuzhiyun .write_regr = on20_write_regr,
133*4882a593Smuzhiyun .read_regr = on20_read_regr,
134*4882a593Smuzhiyun .write_block = on20_write_block,
135*4882a593Smuzhiyun .read_block = on20_read_block,
136*4882a593Smuzhiyun .connect = on20_connect,
137*4882a593Smuzhiyun .disconnect = on20_disconnect,
138*4882a593Smuzhiyun .log_adapter = on20_log_adapter,
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun
on20_init(void)141*4882a593Smuzhiyun static int __init on20_init(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun return paride_register(&on20);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
on20_exit(void)146*4882a593Smuzhiyun static void __exit on20_exit(void)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun paride_unregister(&on20);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun MODULE_LICENSE("GPL");
152*4882a593Smuzhiyun module_init(on20_init)
153*4882a593Smuzhiyun module_exit(on20_exit)
154