1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Broadcom specific AMBA
3*4882a593Smuzhiyun * ChipCommon B Unit driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2014, Hauke Mehrtens <hauke@hauke-m.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Licensed under the GNU/GPL. See COPYING for details.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "bcma_private.h"
11*4882a593Smuzhiyun #include <linux/export.h>
12*4882a593Smuzhiyun #include <linux/bcma/bcma.h>
13*4882a593Smuzhiyun
bcma_wait_reg(struct bcma_bus * bus,void __iomem * addr,u32 mask,u32 value,int timeout)14*4882a593Smuzhiyun static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
15*4882a593Smuzhiyun u32 value, int timeout)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun unsigned long deadline = jiffies + timeout;
18*4882a593Smuzhiyun u32 val;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun do {
21*4882a593Smuzhiyun val = readl(addr);
22*4882a593Smuzhiyun if ((val & mask) == value)
23*4882a593Smuzhiyun return true;
24*4882a593Smuzhiyun cpu_relax();
25*4882a593Smuzhiyun udelay(10);
26*4882a593Smuzhiyun } while (!time_after_eq(jiffies, deadline));
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun bcma_err(bus, "Timeout waiting for register %p\n", addr);
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun return false;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
bcma_chipco_b_mii_write(struct bcma_drv_cc_b * ccb,u32 offset,u32 value)33*4882a593Smuzhiyun void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun struct bcma_bus *bus = ccb->core->bus;
36*4882a593Smuzhiyun void __iomem *mii = ccb->mii;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
39*4882a593Smuzhiyun bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
40*4882a593Smuzhiyun writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
41*4882a593Smuzhiyun bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
44*4882a593Smuzhiyun
bcma_core_chipcommon_b_init(struct bcma_drv_cc_b * ccb)45*4882a593Smuzhiyun int bcma_core_chipcommon_b_init(struct bcma_drv_cc_b *ccb)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun if (ccb->setup_done)
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun ccb->setup_done = 1;
51*4882a593Smuzhiyun ccb->mii = ioremap(ccb->core->addr_s[1], BCMA_CORE_SIZE);
52*4882a593Smuzhiyun if (!ccb->mii)
53*4882a593Smuzhiyun return -ENOMEM;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun return 0;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
bcma_core_chipcommon_b_free(struct bcma_drv_cc_b * ccb)58*4882a593Smuzhiyun void bcma_core_chipcommon_b_free(struct bcma_drv_cc_b *ccb)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun if (ccb->mii)
61*4882a593Smuzhiyun iounmap(ccb->mii);
62*4882a593Smuzhiyun }
63