1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Register map access API - I2C support
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright 2011 Wolfson Microelectronics plc
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/regmap.h>
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "internal.h"
14*4882a593Smuzhiyun
regmap_smbus_byte_reg_read(void * context,unsigned int reg,unsigned int * val)15*4882a593Smuzhiyun static int regmap_smbus_byte_reg_read(void *context, unsigned int reg,
16*4882a593Smuzhiyun unsigned int *val)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun struct device *dev = context;
19*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
20*4882a593Smuzhiyun int ret;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun if (reg > 0xff)
23*4882a593Smuzhiyun return -EINVAL;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun ret = i2c_smbus_read_byte_data(i2c, reg);
26*4882a593Smuzhiyun if (ret < 0)
27*4882a593Smuzhiyun return ret;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun *val = ret;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun return 0;
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
regmap_smbus_byte_reg_write(void * context,unsigned int reg,unsigned int val)34*4882a593Smuzhiyun static int regmap_smbus_byte_reg_write(void *context, unsigned int reg,
35*4882a593Smuzhiyun unsigned int val)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun struct device *dev = context;
38*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (val > 0xff || reg > 0xff)
41*4882a593Smuzhiyun return -EINVAL;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun return i2c_smbus_write_byte_data(i2c, reg, val);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static const struct regmap_bus regmap_smbus_byte = {
47*4882a593Smuzhiyun .reg_write = regmap_smbus_byte_reg_write,
48*4882a593Smuzhiyun .reg_read = regmap_smbus_byte_reg_read,
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
regmap_smbus_word_reg_read(void * context,unsigned int reg,unsigned int * val)51*4882a593Smuzhiyun static int regmap_smbus_word_reg_read(void *context, unsigned int reg,
52*4882a593Smuzhiyun unsigned int *val)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct device *dev = context;
55*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (reg > 0xff)
59*4882a593Smuzhiyun return -EINVAL;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun ret = i2c_smbus_read_word_data(i2c, reg);
62*4882a593Smuzhiyun if (ret < 0)
63*4882a593Smuzhiyun return ret;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun *val = ret;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
regmap_smbus_word_reg_write(void * context,unsigned int reg,unsigned int val)70*4882a593Smuzhiyun static int regmap_smbus_word_reg_write(void *context, unsigned int reg,
71*4882a593Smuzhiyun unsigned int val)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun struct device *dev = context;
74*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (val > 0xffff || reg > 0xff)
77*4882a593Smuzhiyun return -EINVAL;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return i2c_smbus_write_word_data(i2c, reg, val);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const struct regmap_bus regmap_smbus_word = {
83*4882a593Smuzhiyun .reg_write = regmap_smbus_word_reg_write,
84*4882a593Smuzhiyun .reg_read = regmap_smbus_word_reg_read,
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
regmap_smbus_word_read_swapped(void * context,unsigned int reg,unsigned int * val)87*4882a593Smuzhiyun static int regmap_smbus_word_read_swapped(void *context, unsigned int reg,
88*4882a593Smuzhiyun unsigned int *val)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun struct device *dev = context;
91*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
92*4882a593Smuzhiyun int ret;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun if (reg > 0xff)
95*4882a593Smuzhiyun return -EINVAL;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = i2c_smbus_read_word_swapped(i2c, reg);
98*4882a593Smuzhiyun if (ret < 0)
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun *val = ret;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
regmap_smbus_word_write_swapped(void * context,unsigned int reg,unsigned int val)106*4882a593Smuzhiyun static int regmap_smbus_word_write_swapped(void *context, unsigned int reg,
107*4882a593Smuzhiyun unsigned int val)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct device *dev = context;
110*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (val > 0xffff || reg > 0xff)
113*4882a593Smuzhiyun return -EINVAL;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun return i2c_smbus_write_word_swapped(i2c, reg, val);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun static const struct regmap_bus regmap_smbus_word_swapped = {
119*4882a593Smuzhiyun .reg_write = regmap_smbus_word_write_swapped,
120*4882a593Smuzhiyun .reg_read = regmap_smbus_word_read_swapped,
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
regmap_i2c_write(void * context,const void * data,size_t count)123*4882a593Smuzhiyun static int regmap_i2c_write(void *context, const void *data, size_t count)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun struct device *dev = context;
126*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
127*4882a593Smuzhiyun int ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = i2c_master_send(i2c, data, count);
130*4882a593Smuzhiyun if (ret == count)
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun else if (ret < 0)
133*4882a593Smuzhiyun return ret;
134*4882a593Smuzhiyun else
135*4882a593Smuzhiyun return -EIO;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
regmap_i2c_gather_write(void * context,const void * reg,size_t reg_size,const void * val,size_t val_size)138*4882a593Smuzhiyun static int regmap_i2c_gather_write(void *context,
139*4882a593Smuzhiyun const void *reg, size_t reg_size,
140*4882a593Smuzhiyun const void *val, size_t val_size)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct device *dev = context;
143*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
144*4882a593Smuzhiyun struct i2c_msg xfer[2];
145*4882a593Smuzhiyun int ret;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* If the I2C controller can't do a gather tell the core, it
148*4882a593Smuzhiyun * will substitute in a linear write for us.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_NOSTART))
151*4882a593Smuzhiyun return -ENOTSUPP;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun xfer[0].addr = i2c->addr;
154*4882a593Smuzhiyun xfer[0].flags = 0;
155*4882a593Smuzhiyun xfer[0].len = reg_size;
156*4882a593Smuzhiyun xfer[0].buf = (void *)reg;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun xfer[1].addr = i2c->addr;
159*4882a593Smuzhiyun xfer[1].flags = I2C_M_NOSTART;
160*4882a593Smuzhiyun xfer[1].len = val_size;
161*4882a593Smuzhiyun xfer[1].buf = (void *)val;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun ret = i2c_transfer(i2c->adapter, xfer, 2);
164*4882a593Smuzhiyun if (ret == 2)
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun if (ret < 0)
167*4882a593Smuzhiyun return ret;
168*4882a593Smuzhiyun else
169*4882a593Smuzhiyun return -EIO;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
regmap_i2c_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)172*4882a593Smuzhiyun static int regmap_i2c_read(void *context,
173*4882a593Smuzhiyun const void *reg, size_t reg_size,
174*4882a593Smuzhiyun void *val, size_t val_size)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct device *dev = context;
177*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
178*4882a593Smuzhiyun struct i2c_msg xfer[2];
179*4882a593Smuzhiyun int ret;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun xfer[0].addr = i2c->addr;
182*4882a593Smuzhiyun xfer[0].flags = 0;
183*4882a593Smuzhiyun xfer[0].len = reg_size;
184*4882a593Smuzhiyun xfer[0].buf = (void *)reg;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun xfer[1].addr = i2c->addr;
187*4882a593Smuzhiyun xfer[1].flags = I2C_M_RD;
188*4882a593Smuzhiyun xfer[1].len = val_size;
189*4882a593Smuzhiyun xfer[1].buf = val;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun ret = i2c_transfer(i2c->adapter, xfer, 2);
192*4882a593Smuzhiyun if (ret == 2)
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun else if (ret < 0)
195*4882a593Smuzhiyun return ret;
196*4882a593Smuzhiyun else
197*4882a593Smuzhiyun return -EIO;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const struct regmap_bus regmap_i2c = {
201*4882a593Smuzhiyun .write = regmap_i2c_write,
202*4882a593Smuzhiyun .gather_write = regmap_i2c_gather_write,
203*4882a593Smuzhiyun .read = regmap_i2c_read,
204*4882a593Smuzhiyun .reg_format_endian_default = REGMAP_ENDIAN_BIG,
205*4882a593Smuzhiyun .val_format_endian_default = REGMAP_ENDIAN_BIG,
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun
regmap_i2c_smbus_i2c_write(void * context,const void * data,size_t count)208*4882a593Smuzhiyun static int regmap_i2c_smbus_i2c_write(void *context, const void *data,
209*4882a593Smuzhiyun size_t count)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun struct device *dev = context;
212*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (count < 1)
215*4882a593Smuzhiyun return -EINVAL;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun --count;
218*4882a593Smuzhiyun return i2c_smbus_write_i2c_block_data(i2c, ((u8 *)data)[0], count,
219*4882a593Smuzhiyun ((u8 *)data + 1));
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
regmap_i2c_smbus_i2c_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)222*4882a593Smuzhiyun static int regmap_i2c_smbus_i2c_read(void *context, const void *reg,
223*4882a593Smuzhiyun size_t reg_size, void *val,
224*4882a593Smuzhiyun size_t val_size)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun struct device *dev = context;
227*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
228*4882a593Smuzhiyun int ret;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (reg_size != 1 || val_size < 1)
231*4882a593Smuzhiyun return -EINVAL;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun ret = i2c_smbus_read_i2c_block_data(i2c, ((u8 *)reg)[0], val_size, val);
234*4882a593Smuzhiyun if (ret == val_size)
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun else if (ret < 0)
237*4882a593Smuzhiyun return ret;
238*4882a593Smuzhiyun else
239*4882a593Smuzhiyun return -EIO;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct regmap_bus regmap_i2c_smbus_i2c_block = {
243*4882a593Smuzhiyun .write = regmap_i2c_smbus_i2c_write,
244*4882a593Smuzhiyun .read = regmap_i2c_smbus_i2c_read,
245*4882a593Smuzhiyun .max_raw_read = I2C_SMBUS_BLOCK_MAX,
246*4882a593Smuzhiyun .max_raw_write = I2C_SMBUS_BLOCK_MAX,
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun
regmap_i2c_smbus_i2c_write_reg16(void * context,const void * data,size_t count)249*4882a593Smuzhiyun static int regmap_i2c_smbus_i2c_write_reg16(void *context, const void *data,
250*4882a593Smuzhiyun size_t count)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun struct device *dev = context;
253*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (count < 2)
256*4882a593Smuzhiyun return -EINVAL;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun count--;
259*4882a593Smuzhiyun return i2c_smbus_write_i2c_block_data(i2c, ((u8 *)data)[0], count,
260*4882a593Smuzhiyun (u8 *)data + 1);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
regmap_i2c_smbus_i2c_read_reg16(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)263*4882a593Smuzhiyun static int regmap_i2c_smbus_i2c_read_reg16(void *context, const void *reg,
264*4882a593Smuzhiyun size_t reg_size, void *val,
265*4882a593Smuzhiyun size_t val_size)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct device *dev = context;
268*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
269*4882a593Smuzhiyun int ret, count, len = val_size;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun if (reg_size != 2)
272*4882a593Smuzhiyun return -EINVAL;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(i2c, ((u16 *)reg)[0] & 0xff,
275*4882a593Smuzhiyun ((u16 *)reg)[0] >> 8);
276*4882a593Smuzhiyun if (ret < 0)
277*4882a593Smuzhiyun return ret;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun count = 0;
280*4882a593Smuzhiyun do {
281*4882a593Smuzhiyun /* Current Address Read */
282*4882a593Smuzhiyun ret = i2c_smbus_read_byte(i2c);
283*4882a593Smuzhiyun if (ret < 0)
284*4882a593Smuzhiyun break;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun *((u8 *)val++) = ret;
287*4882a593Smuzhiyun count++;
288*4882a593Smuzhiyun len--;
289*4882a593Smuzhiyun } while (len > 0);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (count == val_size)
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun else if (ret < 0)
294*4882a593Smuzhiyun return ret;
295*4882a593Smuzhiyun else
296*4882a593Smuzhiyun return -EIO;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun static const struct regmap_bus regmap_i2c_smbus_i2c_block_reg16 = {
300*4882a593Smuzhiyun .write = regmap_i2c_smbus_i2c_write_reg16,
301*4882a593Smuzhiyun .read = regmap_i2c_smbus_i2c_read_reg16,
302*4882a593Smuzhiyun .max_raw_read = I2C_SMBUS_BLOCK_MAX,
303*4882a593Smuzhiyun .max_raw_write = I2C_SMBUS_BLOCK_MAX,
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun
regmap_get_i2c_bus(struct i2c_client * i2c,const struct regmap_config * config)306*4882a593Smuzhiyun static const struct regmap_bus *regmap_get_i2c_bus(struct i2c_client *i2c,
307*4882a593Smuzhiyun const struct regmap_config *config)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun if (i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C))
310*4882a593Smuzhiyun return ®map_i2c;
311*4882a593Smuzhiyun else if (config->val_bits == 8 && config->reg_bits == 8 &&
312*4882a593Smuzhiyun i2c_check_functionality(i2c->adapter,
313*4882a593Smuzhiyun I2C_FUNC_SMBUS_I2C_BLOCK))
314*4882a593Smuzhiyun return ®map_i2c_smbus_i2c_block;
315*4882a593Smuzhiyun else if (config->val_bits == 8 && config->reg_bits == 16 &&
316*4882a593Smuzhiyun i2c_check_functionality(i2c->adapter,
317*4882a593Smuzhiyun I2C_FUNC_SMBUS_I2C_BLOCK))
318*4882a593Smuzhiyun return ®map_i2c_smbus_i2c_block_reg16;
319*4882a593Smuzhiyun else if (config->val_bits == 16 && config->reg_bits == 8 &&
320*4882a593Smuzhiyun i2c_check_functionality(i2c->adapter,
321*4882a593Smuzhiyun I2C_FUNC_SMBUS_WORD_DATA))
322*4882a593Smuzhiyun switch (regmap_get_val_endian(&i2c->dev, NULL, config)) {
323*4882a593Smuzhiyun case REGMAP_ENDIAN_LITTLE:
324*4882a593Smuzhiyun return ®map_smbus_word;
325*4882a593Smuzhiyun case REGMAP_ENDIAN_BIG:
326*4882a593Smuzhiyun return ®map_smbus_word_swapped;
327*4882a593Smuzhiyun default: /* everything else is not supported */
328*4882a593Smuzhiyun break;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun else if (config->val_bits == 8 && config->reg_bits == 8 &&
331*4882a593Smuzhiyun i2c_check_functionality(i2c->adapter,
332*4882a593Smuzhiyun I2C_FUNC_SMBUS_BYTE_DATA))
333*4882a593Smuzhiyun return ®map_smbus_byte;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun return ERR_PTR(-ENOTSUPP);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
__regmap_init_i2c(struct i2c_client * i2c,const struct regmap_config * config,struct lock_class_key * lock_key,const char * lock_name)338*4882a593Smuzhiyun struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
339*4882a593Smuzhiyun const struct regmap_config *config,
340*4882a593Smuzhiyun struct lock_class_key *lock_key,
341*4882a593Smuzhiyun const char *lock_name)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun const struct regmap_bus *bus = regmap_get_i2c_bus(i2c, config);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun if (IS_ERR(bus))
346*4882a593Smuzhiyun return ERR_CAST(bus);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun return __regmap_init(&i2c->dev, bus, &i2c->dev, config,
349*4882a593Smuzhiyun lock_key, lock_name);
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__regmap_init_i2c);
352*4882a593Smuzhiyun
__devm_regmap_init_i2c(struct i2c_client * i2c,const struct regmap_config * config,struct lock_class_key * lock_key,const char * lock_name)353*4882a593Smuzhiyun struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
354*4882a593Smuzhiyun const struct regmap_config *config,
355*4882a593Smuzhiyun struct lock_class_key *lock_key,
356*4882a593Smuzhiyun const char *lock_name)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun const struct regmap_bus *bus = regmap_get_i2c_bus(i2c, config);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun if (IS_ERR(bus))
361*4882a593Smuzhiyun return ERR_CAST(bus);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun return __devm_regmap_init(&i2c->dev, bus, &i2c->dev, config,
364*4882a593Smuzhiyun lock_key, lock_name);
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__devm_regmap_init_i2c);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun MODULE_LICENSE("GPL");
369