1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
4*4882a593Smuzhiyun * Traverse Technologies -- https://www.traverse.com.au/
5*4882a593Smuzhiyun * Xrio Limited -- http://www.xrio.com/
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright © 2008 Traverse Technologies
8*4882a593Smuzhiyun * Copyright © 2008 Intel Corporation
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Authors: Nathan Williams <nathan@traverse.com.au>
11*4882a593Smuzhiyun * David Woodhouse <dwmw2@infradead.org>
12*4882a593Smuzhiyun * Treker Chen <treker@xrio.com>
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define DEBUG
16*4882a593Smuzhiyun #define VERBOSE_DEBUG
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/interrupt.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/errno.h>
22*4882a593Smuzhiyun #include <linux/ioport.h>
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun #include <linux/pci.h>
25*4882a593Smuzhiyun #include <linux/atm.h>
26*4882a593Smuzhiyun #include <linux/atmdev.h>
27*4882a593Smuzhiyun #include <linux/skbuff.h>
28*4882a593Smuzhiyun #include <linux/sysfs.h>
29*4882a593Smuzhiyun #include <linux/device.h>
30*4882a593Smuzhiyun #include <linux/kobject.h>
31*4882a593Smuzhiyun #include <linux/firmware.h>
32*4882a593Smuzhiyun #include <linux/ctype.h>
33*4882a593Smuzhiyun #include <linux/swab.h>
34*4882a593Smuzhiyun #include <linux/slab.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define VERSION "1.04"
37*4882a593Smuzhiyun #define DRIVER_VERSION 0x01
38*4882a593Smuzhiyun #define PTAG "solos-pci"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define CONFIG_RAM_SIZE 128
41*4882a593Smuzhiyun #define FLAGS_ADDR 0x7C
42*4882a593Smuzhiyun #define IRQ_EN_ADDR 0x78
43*4882a593Smuzhiyun #define FPGA_VER 0x74
44*4882a593Smuzhiyun #define IRQ_CLEAR 0x70
45*4882a593Smuzhiyun #define WRITE_FLASH 0x6C
46*4882a593Smuzhiyun #define PORTS 0x68
47*4882a593Smuzhiyun #define FLASH_BLOCK 0x64
48*4882a593Smuzhiyun #define FLASH_BUSY 0x60
49*4882a593Smuzhiyun #define FPGA_MODE 0x5C
50*4882a593Smuzhiyun #define FLASH_MODE 0x58
51*4882a593Smuzhiyun #define GPIO_STATUS 0x54
52*4882a593Smuzhiyun #define DRIVER_VER 0x50
53*4882a593Smuzhiyun #define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
54*4882a593Smuzhiyun #define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define DATA_RAM_SIZE 32768
57*4882a593Smuzhiyun #define BUF_SIZE 2048
58*4882a593Smuzhiyun #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
59*4882a593Smuzhiyun /* Old boards use ATMEL AD45DB161D flash */
60*4882a593Smuzhiyun #define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
61*4882a593Smuzhiyun #define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
62*4882a593Smuzhiyun #define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
63*4882a593Smuzhiyun #define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
64*4882a593Smuzhiyun /* Current boards use M25P/M25PE SPI flash */
65*4882a593Smuzhiyun #define SPI_FLASH_BLOCK (256 * 64)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
68*4882a593Smuzhiyun #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
69*4882a593Smuzhiyun #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #define RX_DMA_SIZE 2048
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define FPGA_VERSION(a,b) (((a) << 8) + (b))
74*4882a593Smuzhiyun #define LEGACY_BUFFERS 2
75*4882a593Smuzhiyun #define DMA_SUPPORTED 4
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static int reset = 0;
78*4882a593Smuzhiyun static int atmdebug = 0;
79*4882a593Smuzhiyun static int firmware_upgrade = 0;
80*4882a593Smuzhiyun static int fpga_upgrade = 0;
81*4882a593Smuzhiyun static int db_firmware_upgrade = 0;
82*4882a593Smuzhiyun static int db_fpga_upgrade = 0;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun struct pkt_hdr {
85*4882a593Smuzhiyun __le16 size;
86*4882a593Smuzhiyun __le16 vpi;
87*4882a593Smuzhiyun __le16 vci;
88*4882a593Smuzhiyun __le16 type;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct solos_skb_cb {
92*4882a593Smuzhiyun struct atm_vcc *vcc;
93*4882a593Smuzhiyun uint32_t dma_addr;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #define PKT_DATA 0
100*4882a593Smuzhiyun #define PKT_COMMAND 1
101*4882a593Smuzhiyun #define PKT_POPEN 3
102*4882a593Smuzhiyun #define PKT_PCLOSE 4
103*4882a593Smuzhiyun #define PKT_STATUS 5
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct solos_card {
106*4882a593Smuzhiyun void __iomem *config_regs;
107*4882a593Smuzhiyun void __iomem *buffers;
108*4882a593Smuzhiyun int nr_ports;
109*4882a593Smuzhiyun int tx_mask;
110*4882a593Smuzhiyun struct pci_dev *dev;
111*4882a593Smuzhiyun struct atm_dev *atmdev[4];
112*4882a593Smuzhiyun struct tasklet_struct tlet;
113*4882a593Smuzhiyun spinlock_t tx_lock;
114*4882a593Smuzhiyun spinlock_t tx_queue_lock;
115*4882a593Smuzhiyun spinlock_t cli_queue_lock;
116*4882a593Smuzhiyun spinlock_t param_queue_lock;
117*4882a593Smuzhiyun struct list_head param_queue;
118*4882a593Smuzhiyun struct sk_buff_head tx_queue[4];
119*4882a593Smuzhiyun struct sk_buff_head cli_queue[4];
120*4882a593Smuzhiyun struct sk_buff *tx_skb[4];
121*4882a593Smuzhiyun struct sk_buff *rx_skb[4];
122*4882a593Smuzhiyun unsigned char *dma_bounce;
123*4882a593Smuzhiyun wait_queue_head_t param_wq;
124*4882a593Smuzhiyun wait_queue_head_t fw_wq;
125*4882a593Smuzhiyun int using_dma;
126*4882a593Smuzhiyun int dma_alignment;
127*4882a593Smuzhiyun int fpga_version;
128*4882a593Smuzhiyun int buffer_size;
129*4882a593Smuzhiyun int atmel_flash;
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun struct solos_param {
134*4882a593Smuzhiyun struct list_head list;
135*4882a593Smuzhiyun pid_t pid;
136*4882a593Smuzhiyun int port;
137*4882a593Smuzhiyun struct sk_buff *response;
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
143*4882a593Smuzhiyun MODULE_DESCRIPTION("Solos PCI driver");
144*4882a593Smuzhiyun MODULE_VERSION(VERSION);
145*4882a593Smuzhiyun MODULE_LICENSE("GPL");
146*4882a593Smuzhiyun MODULE_FIRMWARE("solos-FPGA.bin");
147*4882a593Smuzhiyun MODULE_FIRMWARE("solos-Firmware.bin");
148*4882a593Smuzhiyun MODULE_FIRMWARE("solos-db-FPGA.bin");
149*4882a593Smuzhiyun MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
150*4882a593Smuzhiyun MODULE_PARM_DESC(atmdebug, "Print ATM data");
151*4882a593Smuzhiyun MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
152*4882a593Smuzhiyun MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
153*4882a593Smuzhiyun MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
154*4882a593Smuzhiyun MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
155*4882a593Smuzhiyun module_param(reset, int, 0444);
156*4882a593Smuzhiyun module_param(atmdebug, int, 0644);
157*4882a593Smuzhiyun module_param(firmware_upgrade, int, 0444);
158*4882a593Smuzhiyun module_param(fpga_upgrade, int, 0444);
159*4882a593Smuzhiyun module_param(db_firmware_upgrade, int, 0444);
160*4882a593Smuzhiyun module_param(db_fpga_upgrade, int, 0444);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
163*4882a593Smuzhiyun struct atm_vcc *vcc);
164*4882a593Smuzhiyun static uint32_t fpga_tx(struct solos_card *);
165*4882a593Smuzhiyun static irqreturn_t solos_irq(int irq, void *dev_id);
166*4882a593Smuzhiyun static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
167*4882a593Smuzhiyun static int atm_init(struct solos_card *, struct device *);
168*4882a593Smuzhiyun static void atm_remove(struct solos_card *);
169*4882a593Smuzhiyun static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
170*4882a593Smuzhiyun static void solos_bh(unsigned long);
171*4882a593Smuzhiyun static int print_buffer(struct sk_buff *buf);
172*4882a593Smuzhiyun
solos_pop(struct atm_vcc * vcc,struct sk_buff * skb)173*4882a593Smuzhiyun static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun if (vcc->pop)
176*4882a593Smuzhiyun vcc->pop(vcc, skb);
177*4882a593Smuzhiyun else
178*4882a593Smuzhiyun dev_kfree_skb_any(skb);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
solos_param_show(struct device * dev,struct device_attribute * attr,char * buf)181*4882a593Smuzhiyun static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
182*4882a593Smuzhiyun char *buf)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
185*4882a593Smuzhiyun struct solos_card *card = atmdev->dev_data;
186*4882a593Smuzhiyun struct solos_param prm;
187*4882a593Smuzhiyun struct sk_buff *skb;
188*4882a593Smuzhiyun struct pkt_hdr *header;
189*4882a593Smuzhiyun int buflen;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun buflen = strlen(attr->attr.name) + 10;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
194*4882a593Smuzhiyun if (!skb) {
195*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
196*4882a593Smuzhiyun return -ENOMEM;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun buflen = snprintf((void *)&header[1], buflen - 1,
202*4882a593Smuzhiyun "L%05d\n%s\n", current->pid, attr->attr.name);
203*4882a593Smuzhiyun skb_put(skb, buflen);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun header->size = cpu_to_le16(buflen);
206*4882a593Smuzhiyun header->vpi = cpu_to_le16(0);
207*4882a593Smuzhiyun header->vci = cpu_to_le16(0);
208*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_COMMAND);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun prm.pid = current->pid;
211*4882a593Smuzhiyun prm.response = NULL;
212*4882a593Smuzhiyun prm.port = SOLOS_CHAN(atmdev);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun spin_lock_irq(&card->param_queue_lock);
215*4882a593Smuzhiyun list_add(&prm.list, &card->param_queue);
216*4882a593Smuzhiyun spin_unlock_irq(&card->param_queue_lock);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun fpga_queue(card, prm.port, skb, NULL);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun spin_lock_irq(&card->param_queue_lock);
223*4882a593Smuzhiyun list_del(&prm.list);
224*4882a593Smuzhiyun spin_unlock_irq(&card->param_queue_lock);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (!prm.response)
227*4882a593Smuzhiyun return -EIO;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun buflen = prm.response->len;
230*4882a593Smuzhiyun memcpy(buf, prm.response->data, buflen);
231*4882a593Smuzhiyun kfree_skb(prm.response);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun return buflen;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
solos_param_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)236*4882a593Smuzhiyun static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
237*4882a593Smuzhiyun const char *buf, size_t count)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
240*4882a593Smuzhiyun struct solos_card *card = atmdev->dev_data;
241*4882a593Smuzhiyun struct solos_param prm;
242*4882a593Smuzhiyun struct sk_buff *skb;
243*4882a593Smuzhiyun struct pkt_hdr *header;
244*4882a593Smuzhiyun int buflen;
245*4882a593Smuzhiyun ssize_t ret;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun buflen = strlen(attr->attr.name) + 11 + count;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
250*4882a593Smuzhiyun if (!skb) {
251*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
252*4882a593Smuzhiyun return -ENOMEM;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun buflen = snprintf((void *)&header[1], buflen - 1,
258*4882a593Smuzhiyun "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun skb_put(skb, buflen);
261*4882a593Smuzhiyun header->size = cpu_to_le16(buflen);
262*4882a593Smuzhiyun header->vpi = cpu_to_le16(0);
263*4882a593Smuzhiyun header->vci = cpu_to_le16(0);
264*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_COMMAND);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun prm.pid = current->pid;
267*4882a593Smuzhiyun prm.response = NULL;
268*4882a593Smuzhiyun prm.port = SOLOS_CHAN(atmdev);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun spin_lock_irq(&card->param_queue_lock);
271*4882a593Smuzhiyun list_add(&prm.list, &card->param_queue);
272*4882a593Smuzhiyun spin_unlock_irq(&card->param_queue_lock);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun fpga_queue(card, prm.port, skb, NULL);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun spin_lock_irq(&card->param_queue_lock);
279*4882a593Smuzhiyun list_del(&prm.list);
280*4882a593Smuzhiyun spin_unlock_irq(&card->param_queue_lock);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun skb = prm.response;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun if (!skb)
285*4882a593Smuzhiyun return -EIO;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun buflen = skb->len;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun /* Sometimes it has a newline, sometimes it doesn't. */
290*4882a593Smuzhiyun if (skb->data[buflen - 1] == '\n')
291*4882a593Smuzhiyun buflen--;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (buflen == 2 && !strncmp(skb->data, "OK", 2))
294*4882a593Smuzhiyun ret = count;
295*4882a593Smuzhiyun else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
296*4882a593Smuzhiyun ret = -EIO;
297*4882a593Smuzhiyun else {
298*4882a593Smuzhiyun /* We know we have enough space allocated for this; we allocated
299*4882a593Smuzhiyun it ourselves */
300*4882a593Smuzhiyun skb->data[buflen] = 0;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
303*4882a593Smuzhiyun skb->data);
304*4882a593Smuzhiyun ret = -EIO;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun kfree_skb(skb);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun return ret;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
next_string(struct sk_buff * skb)311*4882a593Smuzhiyun static char *next_string(struct sk_buff *skb)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun int i = 0;
314*4882a593Smuzhiyun char *this = skb->data;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun for (i = 0; i < skb->len; i++) {
317*4882a593Smuzhiyun if (this[i] == '\n') {
318*4882a593Smuzhiyun this[i] = 0;
319*4882a593Smuzhiyun skb_pull(skb, i + 1);
320*4882a593Smuzhiyun return this;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun if (!isprint(this[i]))
323*4882a593Smuzhiyun return NULL;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun return NULL;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /*
329*4882a593Smuzhiyun * Status packet has fields separated by \n, starting with a version number
330*4882a593Smuzhiyun * for the information therein. Fields are....
331*4882a593Smuzhiyun *
332*4882a593Smuzhiyun * packet version
333*4882a593Smuzhiyun * RxBitRate (version >= 1)
334*4882a593Smuzhiyun * TxBitRate (version >= 1)
335*4882a593Smuzhiyun * State (version >= 1)
336*4882a593Smuzhiyun * LocalSNRMargin (version >= 1)
337*4882a593Smuzhiyun * LocalLineAttn (version >= 1)
338*4882a593Smuzhiyun */
process_status(struct solos_card * card,int port,struct sk_buff * skb)339*4882a593Smuzhiyun static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun char *str, *state_str, *snr, *attn;
342*4882a593Smuzhiyun int ver, rate_up, rate_down, err;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (!card->atmdev[port])
345*4882a593Smuzhiyun return -ENODEV;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun str = next_string(skb);
348*4882a593Smuzhiyun if (!str)
349*4882a593Smuzhiyun return -EIO;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun err = kstrtoint(str, 10, &ver);
352*4882a593Smuzhiyun if (err) {
353*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Unexpected status interrupt version\n");
354*4882a593Smuzhiyun return err;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun if (ver < 1) {
357*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
358*4882a593Smuzhiyun ver);
359*4882a593Smuzhiyun return -EIO;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun str = next_string(skb);
363*4882a593Smuzhiyun if (!str)
364*4882a593Smuzhiyun return -EIO;
365*4882a593Smuzhiyun if (!strcmp(str, "ERROR")) {
366*4882a593Smuzhiyun dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
367*4882a593Smuzhiyun port);
368*4882a593Smuzhiyun return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun err = kstrtoint(str, 10, &rate_down);
372*4882a593Smuzhiyun if (err)
373*4882a593Smuzhiyun return err;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun str = next_string(skb);
376*4882a593Smuzhiyun if (!str)
377*4882a593Smuzhiyun return -EIO;
378*4882a593Smuzhiyun err = kstrtoint(str, 10, &rate_up);
379*4882a593Smuzhiyun if (err)
380*4882a593Smuzhiyun return err;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun state_str = next_string(skb);
383*4882a593Smuzhiyun if (!state_str)
384*4882a593Smuzhiyun return -EIO;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* Anything but 'Showtime' is down */
387*4882a593Smuzhiyun if (strcmp(state_str, "Showtime")) {
388*4882a593Smuzhiyun atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
389*4882a593Smuzhiyun dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun snr = next_string(skb);
394*4882a593Smuzhiyun if (!snr)
395*4882a593Smuzhiyun return -EIO;
396*4882a593Smuzhiyun attn = next_string(skb);
397*4882a593Smuzhiyun if (!attn)
398*4882a593Smuzhiyun return -EIO;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
401*4882a593Smuzhiyun port, state_str, rate_down/1000, rate_up/1000,
402*4882a593Smuzhiyun snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun card->atmdev[port]->link_rate = rate_down / 424;
405*4882a593Smuzhiyun atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun return 0;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
process_command(struct solos_card * card,int port,struct sk_buff * skb)410*4882a593Smuzhiyun static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun struct solos_param *prm;
413*4882a593Smuzhiyun unsigned long flags;
414*4882a593Smuzhiyun int cmdpid;
415*4882a593Smuzhiyun int found = 0, err;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun if (skb->len < 7)
418*4882a593Smuzhiyun return 0;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
421*4882a593Smuzhiyun !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
422*4882a593Smuzhiyun !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
423*4882a593Smuzhiyun skb->data[6] != '\n')
424*4882a593Smuzhiyun return 0;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun err = kstrtoint(&skb->data[1], 10, &cmdpid);
427*4882a593Smuzhiyun if (err)
428*4882a593Smuzhiyun return err;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun spin_lock_irqsave(&card->param_queue_lock, flags);
431*4882a593Smuzhiyun list_for_each_entry(prm, &card->param_queue, list) {
432*4882a593Smuzhiyun if (prm->port == port && prm->pid == cmdpid) {
433*4882a593Smuzhiyun prm->response = skb;
434*4882a593Smuzhiyun skb_pull(skb, 7);
435*4882a593Smuzhiyun wake_up(&card->param_wq);
436*4882a593Smuzhiyun found = 1;
437*4882a593Smuzhiyun break;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun spin_unlock_irqrestore(&card->param_queue_lock, flags);
441*4882a593Smuzhiyun return found;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
console_show(struct device * dev,struct device_attribute * attr,char * buf)444*4882a593Smuzhiyun static ssize_t console_show(struct device *dev, struct device_attribute *attr,
445*4882a593Smuzhiyun char *buf)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
448*4882a593Smuzhiyun struct solos_card *card = atmdev->dev_data;
449*4882a593Smuzhiyun struct sk_buff *skb;
450*4882a593Smuzhiyun unsigned int len;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun spin_lock(&card->cli_queue_lock);
453*4882a593Smuzhiyun skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
454*4882a593Smuzhiyun spin_unlock(&card->cli_queue_lock);
455*4882a593Smuzhiyun if(skb == NULL)
456*4882a593Smuzhiyun return sprintf(buf, "No data.\n");
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun len = skb->len;
459*4882a593Smuzhiyun memcpy(buf, skb->data, len);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun kfree_skb(skb);
462*4882a593Smuzhiyun return len;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
send_command(struct solos_card * card,int dev,const char * buf,size_t size)465*4882a593Smuzhiyun static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct sk_buff *skb;
468*4882a593Smuzhiyun struct pkt_hdr *header;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun if (size > (BUF_SIZE - sizeof(*header))) {
471*4882a593Smuzhiyun dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
472*4882a593Smuzhiyun return 0;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
475*4882a593Smuzhiyun if (!skb) {
476*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
477*4882a593Smuzhiyun return 0;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun header->size = cpu_to_le16(size);
483*4882a593Smuzhiyun header->vpi = cpu_to_le16(0);
484*4882a593Smuzhiyun header->vci = cpu_to_le16(0);
485*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_COMMAND);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun skb_put_data(skb, buf, size);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun fpga_queue(card, dev, skb, NULL);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun return 0;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
console_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)494*4882a593Smuzhiyun static ssize_t console_store(struct device *dev, struct device_attribute *attr,
495*4882a593Smuzhiyun const char *buf, size_t count)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
498*4882a593Smuzhiyun struct solos_card *card = atmdev->dev_data;
499*4882a593Smuzhiyun int err;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun return err?:count;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun struct geos_gpio_attr {
507*4882a593Smuzhiyun struct device_attribute attr;
508*4882a593Smuzhiyun int offset;
509*4882a593Smuzhiyun };
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \
512*4882a593Smuzhiyun struct geos_gpio_attr gpio_attr_##_name = { \
513*4882a593Smuzhiyun .attr = __ATTR(_name, _mode, _show, _store), \
514*4882a593Smuzhiyun .offset = _offset }
515*4882a593Smuzhiyun
geos_gpio_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)516*4882a593Smuzhiyun static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
517*4882a593Smuzhiyun const char *buf, size_t count)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
520*4882a593Smuzhiyun struct solos_card *card = dev_get_drvdata(dev);
521*4882a593Smuzhiyun uint32_t data32;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun if (count != 1 && (count != 2 || buf[1] != '\n'))
524*4882a593Smuzhiyun return -EINVAL;
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun spin_lock_irq(&card->param_queue_lock);
527*4882a593Smuzhiyun data32 = ioread32(card->config_regs + GPIO_STATUS);
528*4882a593Smuzhiyun if (buf[0] == '1') {
529*4882a593Smuzhiyun data32 |= 1 << gattr->offset;
530*4882a593Smuzhiyun iowrite32(data32, card->config_regs + GPIO_STATUS);
531*4882a593Smuzhiyun } else if (buf[0] == '0') {
532*4882a593Smuzhiyun data32 &= ~(1 << gattr->offset);
533*4882a593Smuzhiyun iowrite32(data32, card->config_regs + GPIO_STATUS);
534*4882a593Smuzhiyun } else {
535*4882a593Smuzhiyun count = -EINVAL;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun spin_unlock_irq(&card->param_queue_lock);
538*4882a593Smuzhiyun return count;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
geos_gpio_show(struct device * dev,struct device_attribute * attr,char * buf)541*4882a593Smuzhiyun static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
542*4882a593Smuzhiyun char *buf)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
545*4882a593Smuzhiyun struct solos_card *card = dev_get_drvdata(dev);
546*4882a593Smuzhiyun uint32_t data32;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun data32 = ioread32(card->config_regs + GPIO_STATUS);
549*4882a593Smuzhiyun data32 = (data32 >> gattr->offset) & 1;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun return sprintf(buf, "%d\n", data32);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
hardware_show(struct device * dev,struct device_attribute * attr,char * buf)554*4882a593Smuzhiyun static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
555*4882a593Smuzhiyun char *buf)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
558*4882a593Smuzhiyun struct solos_card *card = dev_get_drvdata(dev);
559*4882a593Smuzhiyun uint32_t data32;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun data32 = ioread32(card->config_regs + GPIO_STATUS);
562*4882a593Smuzhiyun switch (gattr->offset) {
563*4882a593Smuzhiyun case 0:
564*4882a593Smuzhiyun /* HardwareVersion */
565*4882a593Smuzhiyun data32 = data32 & 0x1F;
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun case 1:
568*4882a593Smuzhiyun /* HardwareVariant */
569*4882a593Smuzhiyun data32 = (data32 >> 5) & 0x0F;
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun return sprintf(buf, "%d\n", data32);
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun static DEVICE_ATTR_RW(console);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
579*4882a593Smuzhiyun #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun #include "solos-attrlist.c"
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
584*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
585*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
586*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
587*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
588*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
589*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
590*4882a593Smuzhiyun static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
591*4882a593Smuzhiyun #undef SOLOS_ATTR_RO
592*4882a593Smuzhiyun #undef SOLOS_ATTR_RW
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
595*4882a593Smuzhiyun #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun static struct attribute *solos_attrs[] = {
598*4882a593Smuzhiyun #include "solos-attrlist.c"
599*4882a593Smuzhiyun NULL
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun static const struct attribute_group solos_attr_group = {
603*4882a593Smuzhiyun .attrs = solos_attrs,
604*4882a593Smuzhiyun .name = "parameters",
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun static struct attribute *gpio_attrs[] = {
608*4882a593Smuzhiyun &gpio_attr_GPIO1.attr.attr,
609*4882a593Smuzhiyun &gpio_attr_GPIO2.attr.attr,
610*4882a593Smuzhiyun &gpio_attr_GPIO3.attr.attr,
611*4882a593Smuzhiyun &gpio_attr_GPIO4.attr.attr,
612*4882a593Smuzhiyun &gpio_attr_GPIO5.attr.attr,
613*4882a593Smuzhiyun &gpio_attr_PushButton.attr.attr,
614*4882a593Smuzhiyun &gpio_attr_HardwareVersion.attr.attr,
615*4882a593Smuzhiyun &gpio_attr_HardwareVariant.attr.attr,
616*4882a593Smuzhiyun NULL
617*4882a593Smuzhiyun };
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun static const struct attribute_group gpio_attr_group = {
620*4882a593Smuzhiyun .attrs = gpio_attrs,
621*4882a593Smuzhiyun .name = "gpio",
622*4882a593Smuzhiyun };
623*4882a593Smuzhiyun
flash_upgrade(struct solos_card * card,int chip)624*4882a593Smuzhiyun static int flash_upgrade(struct solos_card *card, int chip)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun const struct firmware *fw;
627*4882a593Smuzhiyun const char *fw_name;
628*4882a593Smuzhiyun int blocksize = 0;
629*4882a593Smuzhiyun int numblocks = 0;
630*4882a593Smuzhiyun int offset;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun switch (chip) {
633*4882a593Smuzhiyun case 0:
634*4882a593Smuzhiyun fw_name = "solos-FPGA.bin";
635*4882a593Smuzhiyun if (card->atmel_flash)
636*4882a593Smuzhiyun blocksize = ATMEL_FPGA_BLOCK;
637*4882a593Smuzhiyun else
638*4882a593Smuzhiyun blocksize = SPI_FLASH_BLOCK;
639*4882a593Smuzhiyun break;
640*4882a593Smuzhiyun case 1:
641*4882a593Smuzhiyun fw_name = "solos-Firmware.bin";
642*4882a593Smuzhiyun if (card->atmel_flash)
643*4882a593Smuzhiyun blocksize = ATMEL_SOLOS_BLOCK;
644*4882a593Smuzhiyun else
645*4882a593Smuzhiyun blocksize = SPI_FLASH_BLOCK;
646*4882a593Smuzhiyun break;
647*4882a593Smuzhiyun case 2:
648*4882a593Smuzhiyun if (card->fpga_version > LEGACY_BUFFERS){
649*4882a593Smuzhiyun fw_name = "solos-db-FPGA.bin";
650*4882a593Smuzhiyun if (card->atmel_flash)
651*4882a593Smuzhiyun blocksize = ATMEL_FPGA_BLOCK;
652*4882a593Smuzhiyun else
653*4882a593Smuzhiyun blocksize = SPI_FLASH_BLOCK;
654*4882a593Smuzhiyun } else {
655*4882a593Smuzhiyun dev_info(&card->dev->dev, "FPGA version doesn't support"
656*4882a593Smuzhiyun " daughter board upgrades\n");
657*4882a593Smuzhiyun return -EPERM;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun break;
660*4882a593Smuzhiyun case 3:
661*4882a593Smuzhiyun if (card->fpga_version > LEGACY_BUFFERS){
662*4882a593Smuzhiyun fw_name = "solos-Firmware.bin";
663*4882a593Smuzhiyun if (card->atmel_flash)
664*4882a593Smuzhiyun blocksize = ATMEL_SOLOS_BLOCK;
665*4882a593Smuzhiyun else
666*4882a593Smuzhiyun blocksize = SPI_FLASH_BLOCK;
667*4882a593Smuzhiyun } else {
668*4882a593Smuzhiyun dev_info(&card->dev->dev, "FPGA version doesn't support"
669*4882a593Smuzhiyun " daughter board upgrades\n");
670*4882a593Smuzhiyun return -EPERM;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun break;
673*4882a593Smuzhiyun default:
674*4882a593Smuzhiyun return -ENODEV;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun if (request_firmware(&fw, fw_name, &card->dev->dev))
678*4882a593Smuzhiyun return -ENOENT;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun dev_info(&card->dev->dev, "Flash upgrade starting\n");
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun /* New FPGAs require driver version before permitting flash upgrades */
683*4882a593Smuzhiyun iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun numblocks = fw->size / blocksize;
686*4882a593Smuzhiyun dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
687*4882a593Smuzhiyun dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
690*4882a593Smuzhiyun iowrite32(1, card->config_regs + FPGA_MODE);
691*4882a593Smuzhiyun (void) ioread32(card->config_regs + FPGA_MODE);
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun /* Set mode to Chip Erase */
694*4882a593Smuzhiyun if(chip == 0 || chip == 2)
695*4882a593Smuzhiyun dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
696*4882a593Smuzhiyun if(chip == 1 || chip == 3)
697*4882a593Smuzhiyun dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
698*4882a593Smuzhiyun iowrite32((chip * 2), card->config_regs + FLASH_MODE);
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun iowrite32(1, card->config_regs + WRITE_FLASH);
702*4882a593Smuzhiyun wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun for (offset = 0; offset < fw->size; offset += blocksize) {
705*4882a593Smuzhiyun int i;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun /* Clear write flag */
708*4882a593Smuzhiyun iowrite32(0, card->config_regs + WRITE_FLASH);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun /* Set mode to Block Write */
711*4882a593Smuzhiyun /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
712*4882a593Smuzhiyun iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun /* Copy block to buffer, swapping each 16 bits for Atmel flash */
715*4882a593Smuzhiyun for(i = 0; i < blocksize; i += 4) {
716*4882a593Smuzhiyun uint32_t word;
717*4882a593Smuzhiyun if (card->atmel_flash)
718*4882a593Smuzhiyun word = swahb32p((uint32_t *)(fw->data + offset + i));
719*4882a593Smuzhiyun else
720*4882a593Smuzhiyun word = *(uint32_t *)(fw->data + offset + i);
721*4882a593Smuzhiyun if(card->fpga_version > LEGACY_BUFFERS)
722*4882a593Smuzhiyun iowrite32(word, FLASH_BUF + i);
723*4882a593Smuzhiyun else
724*4882a593Smuzhiyun iowrite32(word, RX_BUF(card, 3) + i);
725*4882a593Smuzhiyun }
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun /* Specify block number and then trigger flash write */
728*4882a593Smuzhiyun iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
729*4882a593Smuzhiyun iowrite32(1, card->config_regs + WRITE_FLASH);
730*4882a593Smuzhiyun wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun release_firmware(fw);
734*4882a593Smuzhiyun iowrite32(0, card->config_regs + WRITE_FLASH);
735*4882a593Smuzhiyun iowrite32(0, card->config_regs + FPGA_MODE);
736*4882a593Smuzhiyun iowrite32(0, card->config_regs + FLASH_MODE);
737*4882a593Smuzhiyun dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
738*4882a593Smuzhiyun return 0;
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun
solos_irq(int irq,void * dev_id)741*4882a593Smuzhiyun static irqreturn_t solos_irq(int irq, void *dev_id)
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun struct solos_card *card = dev_id;
744*4882a593Smuzhiyun int handled = 1;
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun iowrite32(0, card->config_regs + IRQ_CLEAR);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun /* If we're up and running, just kick the tasklet to process TX/RX */
749*4882a593Smuzhiyun if (card->atmdev[0])
750*4882a593Smuzhiyun tasklet_schedule(&card->tlet);
751*4882a593Smuzhiyun else
752*4882a593Smuzhiyun wake_up(&card->fw_wq);
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun return IRQ_RETVAL(handled);
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun
solos_bh(unsigned long card_arg)757*4882a593Smuzhiyun static void solos_bh(unsigned long card_arg)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun struct solos_card *card = (void *)card_arg;
760*4882a593Smuzhiyun uint32_t card_flags;
761*4882a593Smuzhiyun uint32_t rx_done = 0;
762*4882a593Smuzhiyun int port;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun /*
765*4882a593Smuzhiyun * Since fpga_tx() is going to need to read the flags under its lock,
766*4882a593Smuzhiyun * it can return them to us so that we don't have to hit PCI MMIO
767*4882a593Smuzhiyun * again for the same information
768*4882a593Smuzhiyun */
769*4882a593Smuzhiyun card_flags = fpga_tx(card);
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun for (port = 0; port < card->nr_ports; port++) {
772*4882a593Smuzhiyun if (card_flags & (0x10 << port)) {
773*4882a593Smuzhiyun struct pkt_hdr _hdr, *header;
774*4882a593Smuzhiyun struct sk_buff *skb;
775*4882a593Smuzhiyun struct atm_vcc *vcc;
776*4882a593Smuzhiyun int size;
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun if (card->using_dma) {
779*4882a593Smuzhiyun skb = card->rx_skb[port];
780*4882a593Smuzhiyun card->rx_skb[port] = NULL;
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
783*4882a593Smuzhiyun RX_DMA_SIZE, DMA_FROM_DEVICE);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun header = (void *)skb->data;
786*4882a593Smuzhiyun size = le16_to_cpu(header->size);
787*4882a593Smuzhiyun skb_put(skb, size + sizeof(*header));
788*4882a593Smuzhiyun skb_pull(skb, sizeof(*header));
789*4882a593Smuzhiyun } else {
790*4882a593Smuzhiyun header = &_hdr;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun rx_done |= 0x10 << port;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun size = le16_to_cpu(header->size);
797*4882a593Smuzhiyun if (size > (card->buffer_size - sizeof(*header))){
798*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Invalid buffer size\n");
799*4882a593Smuzhiyun continue;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of
803*4882a593Smuzhiyun * headroom, and ensures we can route packets back out an
804*4882a593Smuzhiyun * Ethernet interface (for example) without having to
805*4882a593Smuzhiyun * reallocate. Adding NET_IP_ALIGN also ensures that both
806*4882a593Smuzhiyun * PPPoATM and PPPoEoBR2684 packets end up aligned. */
807*4882a593Smuzhiyun skb = netdev_alloc_skb_ip_align(NULL, size + 1);
808*4882a593Smuzhiyun if (!skb) {
809*4882a593Smuzhiyun if (net_ratelimit())
810*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
811*4882a593Smuzhiyun continue;
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun memcpy_fromio(skb_put(skb, size),
815*4882a593Smuzhiyun RX_BUF(card, port) + sizeof(*header),
816*4882a593Smuzhiyun size);
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun if (atmdebug) {
819*4882a593Smuzhiyun dev_info(&card->dev->dev, "Received: port %d\n", port);
820*4882a593Smuzhiyun dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
821*4882a593Smuzhiyun size, le16_to_cpu(header->vpi),
822*4882a593Smuzhiyun le16_to_cpu(header->vci));
823*4882a593Smuzhiyun print_buffer(skb);
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun switch (le16_to_cpu(header->type)) {
827*4882a593Smuzhiyun case PKT_DATA:
828*4882a593Smuzhiyun vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
829*4882a593Smuzhiyun le16_to_cpu(header->vci));
830*4882a593Smuzhiyun if (!vcc) {
831*4882a593Smuzhiyun if (net_ratelimit())
832*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
833*4882a593Smuzhiyun le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
834*4882a593Smuzhiyun port);
835*4882a593Smuzhiyun dev_kfree_skb_any(skb);
836*4882a593Smuzhiyun break;
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun atm_charge(vcc, skb->truesize);
839*4882a593Smuzhiyun vcc->push(vcc, skb);
840*4882a593Smuzhiyun atomic_inc(&vcc->stats->rx);
841*4882a593Smuzhiyun break;
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun case PKT_STATUS:
844*4882a593Smuzhiyun if (process_status(card, port, skb) &&
845*4882a593Smuzhiyun net_ratelimit()) {
846*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
847*4882a593Smuzhiyun print_buffer(skb);
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun dev_kfree_skb_any(skb);
850*4882a593Smuzhiyun break;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun case PKT_COMMAND:
853*4882a593Smuzhiyun default: /* FIXME: Not really, surely? */
854*4882a593Smuzhiyun if (process_command(card, port, skb))
855*4882a593Smuzhiyun break;
856*4882a593Smuzhiyun spin_lock(&card->cli_queue_lock);
857*4882a593Smuzhiyun if (skb_queue_len(&card->cli_queue[port]) > 10) {
858*4882a593Smuzhiyun if (net_ratelimit())
859*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
860*4882a593Smuzhiyun port);
861*4882a593Smuzhiyun dev_kfree_skb_any(skb);
862*4882a593Smuzhiyun } else
863*4882a593Smuzhiyun skb_queue_tail(&card->cli_queue[port], skb);
864*4882a593Smuzhiyun spin_unlock(&card->cli_queue_lock);
865*4882a593Smuzhiyun break;
866*4882a593Smuzhiyun }
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun /* Allocate RX skbs for any ports which need them */
869*4882a593Smuzhiyun if (card->using_dma && card->atmdev[port] &&
870*4882a593Smuzhiyun !card->rx_skb[port]) {
871*4882a593Smuzhiyun /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN
872*4882a593Smuzhiyun * here; the FPGA can only DMA to addresses which are
873*4882a593Smuzhiyun * aligned to 4 bytes. */
874*4882a593Smuzhiyun struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE);
875*4882a593Smuzhiyun if (skb) {
876*4882a593Smuzhiyun SKB_CB(skb)->dma_addr =
877*4882a593Smuzhiyun dma_map_single(&card->dev->dev, skb->data,
878*4882a593Smuzhiyun RX_DMA_SIZE, DMA_FROM_DEVICE);
879*4882a593Smuzhiyun iowrite32(SKB_CB(skb)->dma_addr,
880*4882a593Smuzhiyun card->config_regs + RX_DMA_ADDR(port));
881*4882a593Smuzhiyun card->rx_skb[port] = skb;
882*4882a593Smuzhiyun } else {
883*4882a593Smuzhiyun if (net_ratelimit())
884*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate RX skb");
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun /* We'll have to try again later */
887*4882a593Smuzhiyun tasklet_schedule(&card->tlet);
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun if (rx_done)
892*4882a593Smuzhiyun iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun return;
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun
find_vcc(struct atm_dev * dev,short vpi,int vci)897*4882a593Smuzhiyun static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
898*4882a593Smuzhiyun {
899*4882a593Smuzhiyun struct hlist_head *head;
900*4882a593Smuzhiyun struct atm_vcc *vcc = NULL;
901*4882a593Smuzhiyun struct sock *s;
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun read_lock(&vcc_sklist_lock);
904*4882a593Smuzhiyun head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
905*4882a593Smuzhiyun sk_for_each(s, head) {
906*4882a593Smuzhiyun vcc = atm_sk(s);
907*4882a593Smuzhiyun if (vcc->dev == dev && vcc->vci == vci &&
908*4882a593Smuzhiyun vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
909*4882a593Smuzhiyun test_bit(ATM_VF_READY, &vcc->flags))
910*4882a593Smuzhiyun goto out;
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun vcc = NULL;
913*4882a593Smuzhiyun out:
914*4882a593Smuzhiyun read_unlock(&vcc_sklist_lock);
915*4882a593Smuzhiyun return vcc;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun
popen(struct atm_vcc * vcc)918*4882a593Smuzhiyun static int popen(struct atm_vcc *vcc)
919*4882a593Smuzhiyun {
920*4882a593Smuzhiyun struct solos_card *card = vcc->dev->dev_data;
921*4882a593Smuzhiyun struct sk_buff *skb;
922*4882a593Smuzhiyun struct pkt_hdr *header;
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun if (vcc->qos.aal != ATM_AAL5) {
925*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
926*4882a593Smuzhiyun vcc->qos.aal);
927*4882a593Smuzhiyun return -EINVAL;
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun skb = alloc_skb(sizeof(*header), GFP_KERNEL);
931*4882a593Smuzhiyun if (!skb) {
932*4882a593Smuzhiyun if (net_ratelimit())
933*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
934*4882a593Smuzhiyun return -ENOMEM;
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun header->size = cpu_to_le16(0);
939*4882a593Smuzhiyun header->vpi = cpu_to_le16(vcc->vpi);
940*4882a593Smuzhiyun header->vci = cpu_to_le16(vcc->vci);
941*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_POPEN);
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun set_bit(ATM_VF_ADDR, &vcc->flags);
946*4882a593Smuzhiyun set_bit(ATM_VF_READY, &vcc->flags);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun return 0;
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun
pclose(struct atm_vcc * vcc)951*4882a593Smuzhiyun static void pclose(struct atm_vcc *vcc)
952*4882a593Smuzhiyun {
953*4882a593Smuzhiyun struct solos_card *card = vcc->dev->dev_data;
954*4882a593Smuzhiyun unsigned char port = SOLOS_CHAN(vcc->dev);
955*4882a593Smuzhiyun struct sk_buff *skb, *tmpskb;
956*4882a593Smuzhiyun struct pkt_hdr *header;
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun /* Remove any yet-to-be-transmitted packets from the pending queue */
959*4882a593Smuzhiyun spin_lock(&card->tx_queue_lock);
960*4882a593Smuzhiyun skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
961*4882a593Smuzhiyun if (SKB_CB(skb)->vcc == vcc) {
962*4882a593Smuzhiyun skb_unlink(skb, &card->tx_queue[port]);
963*4882a593Smuzhiyun solos_pop(vcc, skb);
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun spin_unlock(&card->tx_queue_lock);
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun skb = alloc_skb(sizeof(*header), GFP_KERNEL);
969*4882a593Smuzhiyun if (!skb) {
970*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
971*4882a593Smuzhiyun return;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun header->size = cpu_to_le16(0);
976*4882a593Smuzhiyun header->vpi = cpu_to_le16(vcc->vpi);
977*4882a593Smuzhiyun header->vci = cpu_to_le16(vcc->vci);
978*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_PCLOSE);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun skb_get(skb);
981*4882a593Smuzhiyun fpga_queue(card, port, skb, NULL);
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
984*4882a593Smuzhiyun dev_warn(&card->dev->dev,
985*4882a593Smuzhiyun "Timeout waiting for VCC close on port %d\n", port);
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun dev_kfree_skb(skb);
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
990*4882a593Smuzhiyun tasklet has finished processing any incoming packets (and, more to
991*4882a593Smuzhiyun the point, using the vcc pointer). */
992*4882a593Smuzhiyun tasklet_unlock_wait(&card->tlet);
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun clear_bit(ATM_VF_ADDR, &vcc->flags);
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun return;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun
print_buffer(struct sk_buff * buf)999*4882a593Smuzhiyun static int print_buffer(struct sk_buff *buf)
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun int len,i;
1002*4882a593Smuzhiyun char msg[500];
1003*4882a593Smuzhiyun char item[10];
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun len = buf->len;
1006*4882a593Smuzhiyun for (i = 0; i < len; i++){
1007*4882a593Smuzhiyun if(i % 8 == 0)
1008*4882a593Smuzhiyun sprintf(msg, "%02X: ", i);
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun sprintf(item,"%02X ",*(buf->data + i));
1011*4882a593Smuzhiyun strcat(msg, item);
1012*4882a593Smuzhiyun if(i % 8 == 7) {
1013*4882a593Smuzhiyun sprintf(item, "\n");
1014*4882a593Smuzhiyun strcat(msg, item);
1015*4882a593Smuzhiyun printk(KERN_DEBUG "%s", msg);
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun if (i % 8 != 0) {
1019*4882a593Smuzhiyun sprintf(item, "\n");
1020*4882a593Smuzhiyun strcat(msg, item);
1021*4882a593Smuzhiyun printk(KERN_DEBUG "%s", msg);
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun printk(KERN_DEBUG "\n");
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun return 0;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun
fpga_queue(struct solos_card * card,int port,struct sk_buff * skb,struct atm_vcc * vcc)1028*4882a593Smuzhiyun static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
1029*4882a593Smuzhiyun struct atm_vcc *vcc)
1030*4882a593Smuzhiyun {
1031*4882a593Smuzhiyun int old_len;
1032*4882a593Smuzhiyun unsigned long flags;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun SKB_CB(skb)->vcc = vcc;
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun spin_lock_irqsave(&card->tx_queue_lock, flags);
1037*4882a593Smuzhiyun old_len = skb_queue_len(&card->tx_queue[port]);
1038*4882a593Smuzhiyun skb_queue_tail(&card->tx_queue[port], skb);
1039*4882a593Smuzhiyun if (!old_len)
1040*4882a593Smuzhiyun card->tx_mask |= (1 << port);
1041*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_queue_lock, flags);
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun /* Theoretically we could just schedule the tasklet here, but
1044*4882a593Smuzhiyun that introduces latency we don't want -- it's noticeable */
1045*4882a593Smuzhiyun if (!old_len)
1046*4882a593Smuzhiyun fpga_tx(card);
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun
fpga_tx(struct solos_card * card)1049*4882a593Smuzhiyun static uint32_t fpga_tx(struct solos_card *card)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun uint32_t tx_pending, card_flags;
1052*4882a593Smuzhiyun uint32_t tx_started = 0;
1053*4882a593Smuzhiyun struct sk_buff *skb;
1054*4882a593Smuzhiyun struct atm_vcc *vcc;
1055*4882a593Smuzhiyun unsigned char port;
1056*4882a593Smuzhiyun unsigned long flags;
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun spin_lock_irqsave(&card->tx_lock, flags);
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun card_flags = ioread32(card->config_regs + FLAGS_ADDR);
1061*4882a593Smuzhiyun /*
1062*4882a593Smuzhiyun * The queue lock is required for _writing_ to tx_mask, but we're
1063*4882a593Smuzhiyun * OK to read it here without locking. The only potential update
1064*4882a593Smuzhiyun * that we could race with is in fpga_queue() where it sets a bit
1065*4882a593Smuzhiyun * for a new port... but it's going to call this function again if
1066*4882a593Smuzhiyun * it's doing that, anyway.
1067*4882a593Smuzhiyun */
1068*4882a593Smuzhiyun tx_pending = card->tx_mask & ~card_flags;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun for (port = 0; tx_pending; tx_pending >>= 1, port++) {
1071*4882a593Smuzhiyun if (tx_pending & 1) {
1072*4882a593Smuzhiyun struct sk_buff *oldskb = card->tx_skb[port];
1073*4882a593Smuzhiyun if (oldskb) {
1074*4882a593Smuzhiyun dma_unmap_single(&card->dev->dev, SKB_CB(oldskb)->dma_addr,
1075*4882a593Smuzhiyun oldskb->len, DMA_TO_DEVICE);
1076*4882a593Smuzhiyun card->tx_skb[port] = NULL;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun spin_lock(&card->tx_queue_lock);
1079*4882a593Smuzhiyun skb = skb_dequeue(&card->tx_queue[port]);
1080*4882a593Smuzhiyun if (!skb)
1081*4882a593Smuzhiyun card->tx_mask &= ~(1 << port);
1082*4882a593Smuzhiyun spin_unlock(&card->tx_queue_lock);
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun if (skb && !card->using_dma) {
1085*4882a593Smuzhiyun memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
1086*4882a593Smuzhiyun tx_started |= 1 << port;
1087*4882a593Smuzhiyun oldskb = skb; /* We're done with this skb already */
1088*4882a593Smuzhiyun } else if (skb && card->using_dma) {
1089*4882a593Smuzhiyun unsigned char *data = skb->data;
1090*4882a593Smuzhiyun if ((unsigned long)data & card->dma_alignment) {
1091*4882a593Smuzhiyun data = card->dma_bounce + (BUF_SIZE * port);
1092*4882a593Smuzhiyun memcpy(data, skb->data, skb->len);
1093*4882a593Smuzhiyun }
1094*4882a593Smuzhiyun SKB_CB(skb)->dma_addr = dma_map_single(&card->dev->dev, data,
1095*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
1096*4882a593Smuzhiyun card->tx_skb[port] = skb;
1097*4882a593Smuzhiyun iowrite32(SKB_CB(skb)->dma_addr,
1098*4882a593Smuzhiyun card->config_regs + TX_DMA_ADDR(port));
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun if (!oldskb)
1102*4882a593Smuzhiyun continue;
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun /* Clean up and free oldskb now it's gone */
1105*4882a593Smuzhiyun if (atmdebug) {
1106*4882a593Smuzhiyun struct pkt_hdr *header = (void *)oldskb->data;
1107*4882a593Smuzhiyun int size = le16_to_cpu(header->size);
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun skb_pull(oldskb, sizeof(*header));
1110*4882a593Smuzhiyun dev_info(&card->dev->dev, "Transmitted: port %d\n",
1111*4882a593Smuzhiyun port);
1112*4882a593Smuzhiyun dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
1113*4882a593Smuzhiyun size, le16_to_cpu(header->vpi),
1114*4882a593Smuzhiyun le16_to_cpu(header->vci));
1115*4882a593Smuzhiyun print_buffer(oldskb);
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun vcc = SKB_CB(oldskb)->vcc;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun if (vcc) {
1121*4882a593Smuzhiyun atomic_inc(&vcc->stats->tx);
1122*4882a593Smuzhiyun solos_pop(vcc, oldskb);
1123*4882a593Smuzhiyun } else {
1124*4882a593Smuzhiyun dev_kfree_skb_irq(oldskb);
1125*4882a593Smuzhiyun wake_up(&card->param_wq);
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun }
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
1130*4882a593Smuzhiyun if (tx_started)
1131*4882a593Smuzhiyun iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun spin_unlock_irqrestore(&card->tx_lock, flags);
1134*4882a593Smuzhiyun return card_flags;
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun
psend(struct atm_vcc * vcc,struct sk_buff * skb)1137*4882a593Smuzhiyun static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun struct solos_card *card = vcc->dev->dev_data;
1140*4882a593Smuzhiyun struct pkt_hdr *header;
1141*4882a593Smuzhiyun int pktlen;
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun pktlen = skb->len;
1144*4882a593Smuzhiyun if (pktlen > (BUF_SIZE - sizeof(*header))) {
1145*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1146*4882a593Smuzhiyun solos_pop(vcc, skb);
1147*4882a593Smuzhiyun return 0;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun if (!skb_clone_writable(skb, sizeof(*header))) {
1151*4882a593Smuzhiyun int expand_by = 0;
1152*4882a593Smuzhiyun int ret;
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun if (skb_headroom(skb) < sizeof(*header))
1155*4882a593Smuzhiyun expand_by = sizeof(*header) - skb_headroom(skb);
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1158*4882a593Smuzhiyun if (ret) {
1159*4882a593Smuzhiyun dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
1160*4882a593Smuzhiyun solos_pop(vcc, skb);
1161*4882a593Smuzhiyun return ret;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun header = skb_push(skb, sizeof(*header));
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun /* This does _not_ include the size of the header */
1168*4882a593Smuzhiyun header->size = cpu_to_le16(pktlen);
1169*4882a593Smuzhiyun header->vpi = cpu_to_le16(vcc->vpi);
1170*4882a593Smuzhiyun header->vci = cpu_to_le16(vcc->vci);
1171*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_DATA);
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun return 0;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun static const struct atmdev_ops fpga_ops = {
1179*4882a593Smuzhiyun .open = popen,
1180*4882a593Smuzhiyun .close = pclose,
1181*4882a593Smuzhiyun .ioctl = NULL,
1182*4882a593Smuzhiyun .send = psend,
1183*4882a593Smuzhiyun .send_oam = NULL,
1184*4882a593Smuzhiyun .phy_put = NULL,
1185*4882a593Smuzhiyun .phy_get = NULL,
1186*4882a593Smuzhiyun .change_qos = NULL,
1187*4882a593Smuzhiyun .proc_read = NULL,
1188*4882a593Smuzhiyun .owner = THIS_MODULE
1189*4882a593Smuzhiyun };
1190*4882a593Smuzhiyun
fpga_probe(struct pci_dev * dev,const struct pci_device_id * id)1191*4882a593Smuzhiyun static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1192*4882a593Smuzhiyun {
1193*4882a593Smuzhiyun int err;
1194*4882a593Smuzhiyun uint16_t fpga_ver;
1195*4882a593Smuzhiyun uint8_t major_ver, minor_ver;
1196*4882a593Smuzhiyun uint32_t data32;
1197*4882a593Smuzhiyun struct solos_card *card;
1198*4882a593Smuzhiyun
1199*4882a593Smuzhiyun card = kzalloc(sizeof(*card), GFP_KERNEL);
1200*4882a593Smuzhiyun if (!card)
1201*4882a593Smuzhiyun return -ENOMEM;
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun card->dev = dev;
1204*4882a593Smuzhiyun init_waitqueue_head(&card->fw_wq);
1205*4882a593Smuzhiyun init_waitqueue_head(&card->param_wq);
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun err = pci_enable_device(dev);
1208*4882a593Smuzhiyun if (err) {
1209*4882a593Smuzhiyun dev_warn(&dev->dev, "Failed to enable PCI device\n");
1210*4882a593Smuzhiyun goto out;
1211*4882a593Smuzhiyun }
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun err = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
1214*4882a593Smuzhiyun if (err) {
1215*4882a593Smuzhiyun dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1216*4882a593Smuzhiyun goto out;
1217*4882a593Smuzhiyun }
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun err = pci_request_regions(dev, "solos");
1220*4882a593Smuzhiyun if (err) {
1221*4882a593Smuzhiyun dev_warn(&dev->dev, "Failed to request regions\n");
1222*4882a593Smuzhiyun goto out;
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1226*4882a593Smuzhiyun if (!card->config_regs) {
1227*4882a593Smuzhiyun dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1228*4882a593Smuzhiyun err = -ENOMEM;
1229*4882a593Smuzhiyun goto out_release_regions;
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1232*4882a593Smuzhiyun if (!card->buffers) {
1233*4882a593Smuzhiyun dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1234*4882a593Smuzhiyun err = -ENOMEM;
1235*4882a593Smuzhiyun goto out_unmap_config;
1236*4882a593Smuzhiyun }
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun if (reset) {
1239*4882a593Smuzhiyun iowrite32(1, card->config_regs + FPGA_MODE);
1240*4882a593Smuzhiyun ioread32(card->config_regs + FPGA_MODE);
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun iowrite32(0, card->config_regs + FPGA_MODE);
1243*4882a593Smuzhiyun ioread32(card->config_regs + FPGA_MODE);
1244*4882a593Smuzhiyun }
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun data32 = ioread32(card->config_regs + FPGA_VER);
1247*4882a593Smuzhiyun fpga_ver = (data32 & 0x0000FFFF);
1248*4882a593Smuzhiyun major_ver = ((data32 & 0xFF000000) >> 24);
1249*4882a593Smuzhiyun minor_ver = ((data32 & 0x00FF0000) >> 16);
1250*4882a593Smuzhiyun card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1251*4882a593Smuzhiyun if (card->fpga_version > LEGACY_BUFFERS)
1252*4882a593Smuzhiyun card->buffer_size = BUF_SIZE;
1253*4882a593Smuzhiyun else
1254*4882a593Smuzhiyun card->buffer_size = OLD_BUF_SIZE;
1255*4882a593Smuzhiyun dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1256*4882a593Smuzhiyun major_ver, minor_ver, fpga_ver);
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
1259*4882a593Smuzhiyun db_fpga_upgrade || db_firmware_upgrade)) {
1260*4882a593Smuzhiyun dev_warn(&dev->dev,
1261*4882a593Smuzhiyun "FPGA too old; cannot upgrade flash. Use JTAG.\n");
1262*4882a593Smuzhiyun fpga_upgrade = firmware_upgrade = 0;
1263*4882a593Smuzhiyun db_fpga_upgrade = db_firmware_upgrade = 0;
1264*4882a593Smuzhiyun }
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun /* Stopped using Atmel flash after 0.03-38 */
1267*4882a593Smuzhiyun if (fpga_ver < 39)
1268*4882a593Smuzhiyun card->atmel_flash = 1;
1269*4882a593Smuzhiyun else
1270*4882a593Smuzhiyun card->atmel_flash = 0;
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun data32 = ioread32(card->config_regs + PORTS);
1273*4882a593Smuzhiyun card->nr_ports = (data32 & 0x000000FF);
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun if (card->fpga_version >= DMA_SUPPORTED) {
1276*4882a593Smuzhiyun pci_set_master(dev);
1277*4882a593Smuzhiyun card->using_dma = 1;
1278*4882a593Smuzhiyun if (1) { /* All known FPGA versions so far */
1279*4882a593Smuzhiyun card->dma_alignment = 3;
1280*4882a593Smuzhiyun card->dma_bounce = kmalloc_array(card->nr_ports,
1281*4882a593Smuzhiyun BUF_SIZE, GFP_KERNEL);
1282*4882a593Smuzhiyun if (!card->dma_bounce) {
1283*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
1284*4882a593Smuzhiyun err = -ENOMEM;
1285*4882a593Smuzhiyun /* Fallback to MMIO doesn't work */
1286*4882a593Smuzhiyun goto out_unmap_both;
1287*4882a593Smuzhiyun }
1288*4882a593Smuzhiyun }
1289*4882a593Smuzhiyun } else {
1290*4882a593Smuzhiyun card->using_dma = 0;
1291*4882a593Smuzhiyun /* Set RX empty flag for all ports */
1292*4882a593Smuzhiyun iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun pci_set_drvdata(dev, card);
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1298*4882a593Smuzhiyun spin_lock_init(&card->tx_lock);
1299*4882a593Smuzhiyun spin_lock_init(&card->tx_queue_lock);
1300*4882a593Smuzhiyun spin_lock_init(&card->cli_queue_lock);
1301*4882a593Smuzhiyun spin_lock_init(&card->param_queue_lock);
1302*4882a593Smuzhiyun INIT_LIST_HEAD(&card->param_queue);
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
1305*4882a593Smuzhiyun "solos-pci", card);
1306*4882a593Smuzhiyun if (err) {
1307*4882a593Smuzhiyun dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
1308*4882a593Smuzhiyun goto out_unmap_both;
1309*4882a593Smuzhiyun }
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun if (fpga_upgrade)
1314*4882a593Smuzhiyun flash_upgrade(card, 0);
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun if (firmware_upgrade)
1317*4882a593Smuzhiyun flash_upgrade(card, 1);
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun if (db_fpga_upgrade)
1320*4882a593Smuzhiyun flash_upgrade(card, 2);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun if (db_firmware_upgrade)
1323*4882a593Smuzhiyun flash_upgrade(card, 3);
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun err = atm_init(card, &dev->dev);
1326*4882a593Smuzhiyun if (err)
1327*4882a593Smuzhiyun goto out_free_irq;
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun if (card->fpga_version >= DMA_SUPPORTED &&
1330*4882a593Smuzhiyun sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
1331*4882a593Smuzhiyun dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
1332*4882a593Smuzhiyun
1333*4882a593Smuzhiyun return 0;
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun out_free_irq:
1336*4882a593Smuzhiyun iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1337*4882a593Smuzhiyun free_irq(dev->irq, card);
1338*4882a593Smuzhiyun tasklet_kill(&card->tlet);
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun out_unmap_both:
1341*4882a593Smuzhiyun kfree(card->dma_bounce);
1342*4882a593Smuzhiyun pci_iounmap(dev, card->buffers);
1343*4882a593Smuzhiyun out_unmap_config:
1344*4882a593Smuzhiyun pci_iounmap(dev, card->config_regs);
1345*4882a593Smuzhiyun out_release_regions:
1346*4882a593Smuzhiyun pci_release_regions(dev);
1347*4882a593Smuzhiyun out:
1348*4882a593Smuzhiyun kfree(card);
1349*4882a593Smuzhiyun return err;
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun
atm_init(struct solos_card * card,struct device * parent)1352*4882a593Smuzhiyun static int atm_init(struct solos_card *card, struct device *parent)
1353*4882a593Smuzhiyun {
1354*4882a593Smuzhiyun int i;
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun for (i = 0; i < card->nr_ports; i++) {
1357*4882a593Smuzhiyun struct sk_buff *skb;
1358*4882a593Smuzhiyun struct pkt_hdr *header;
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun skb_queue_head_init(&card->tx_queue[i]);
1361*4882a593Smuzhiyun skb_queue_head_init(&card->cli_queue[i]);
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
1364*4882a593Smuzhiyun if (!card->atmdev[i]) {
1365*4882a593Smuzhiyun dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1366*4882a593Smuzhiyun atm_remove(card);
1367*4882a593Smuzhiyun return -ENODEV;
1368*4882a593Smuzhiyun }
1369*4882a593Smuzhiyun if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1370*4882a593Smuzhiyun dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
1371*4882a593Smuzhiyun if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1372*4882a593Smuzhiyun dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun card->atmdev[i]->ci_range.vpi_bits = 8;
1377*4882a593Smuzhiyun card->atmdev[i]->ci_range.vci_bits = 16;
1378*4882a593Smuzhiyun card->atmdev[i]->dev_data = card;
1379*4882a593Smuzhiyun card->atmdev[i]->phy_data = (void *)(unsigned long)i;
1380*4882a593Smuzhiyun atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun skb = alloc_skb(sizeof(*header), GFP_KERNEL);
1383*4882a593Smuzhiyun if (!skb) {
1384*4882a593Smuzhiyun dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1385*4882a593Smuzhiyun continue;
1386*4882a593Smuzhiyun }
1387*4882a593Smuzhiyun
1388*4882a593Smuzhiyun header = skb_put(skb, sizeof(*header));
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun header->size = cpu_to_le16(0);
1391*4882a593Smuzhiyun header->vpi = cpu_to_le16(0);
1392*4882a593Smuzhiyun header->vci = cpu_to_le16(0);
1393*4882a593Smuzhiyun header->type = cpu_to_le16(PKT_STATUS);
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun fpga_queue(card, i, skb, NULL);
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun return 0;
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun
atm_remove(struct solos_card * card)1400*4882a593Smuzhiyun static void atm_remove(struct solos_card *card)
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun int i;
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun for (i = 0; i < card->nr_ports; i++) {
1405*4882a593Smuzhiyun if (card->atmdev[i]) {
1406*4882a593Smuzhiyun struct sk_buff *skb;
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
1411*4882a593Smuzhiyun atm_dev_deregister(card->atmdev[i]);
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun skb = card->rx_skb[i];
1414*4882a593Smuzhiyun if (skb) {
1415*4882a593Smuzhiyun dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1416*4882a593Smuzhiyun RX_DMA_SIZE, DMA_FROM_DEVICE);
1417*4882a593Smuzhiyun dev_kfree_skb(skb);
1418*4882a593Smuzhiyun }
1419*4882a593Smuzhiyun skb = card->tx_skb[i];
1420*4882a593Smuzhiyun if (skb) {
1421*4882a593Smuzhiyun dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1422*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
1423*4882a593Smuzhiyun dev_kfree_skb(skb);
1424*4882a593Smuzhiyun }
1425*4882a593Smuzhiyun while ((skb = skb_dequeue(&card->tx_queue[i])))
1426*4882a593Smuzhiyun dev_kfree_skb(skb);
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun }
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
fpga_remove(struct pci_dev * dev)1432*4882a593Smuzhiyun static void fpga_remove(struct pci_dev *dev)
1433*4882a593Smuzhiyun {
1434*4882a593Smuzhiyun struct solos_card *card = pci_get_drvdata(dev);
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun /* Disable IRQs */
1437*4882a593Smuzhiyun iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun /* Reset FPGA */
1440*4882a593Smuzhiyun iowrite32(1, card->config_regs + FPGA_MODE);
1441*4882a593Smuzhiyun (void)ioread32(card->config_regs + FPGA_MODE);
1442*4882a593Smuzhiyun
1443*4882a593Smuzhiyun if (card->fpga_version >= DMA_SUPPORTED)
1444*4882a593Smuzhiyun sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun atm_remove(card);
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun free_irq(dev->irq, card);
1449*4882a593Smuzhiyun tasklet_kill(&card->tlet);
1450*4882a593Smuzhiyun
1451*4882a593Smuzhiyun kfree(card->dma_bounce);
1452*4882a593Smuzhiyun
1453*4882a593Smuzhiyun /* Release device from reset */
1454*4882a593Smuzhiyun iowrite32(0, card->config_regs + FPGA_MODE);
1455*4882a593Smuzhiyun (void)ioread32(card->config_regs + FPGA_MODE);
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun pci_iounmap(dev, card->buffers);
1458*4882a593Smuzhiyun pci_iounmap(dev, card->config_regs);
1459*4882a593Smuzhiyun
1460*4882a593Smuzhiyun pci_release_regions(dev);
1461*4882a593Smuzhiyun pci_disable_device(dev);
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun kfree(card);
1464*4882a593Smuzhiyun }
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun static const struct pci_device_id fpga_pci_tbl[] = {
1467*4882a593Smuzhiyun { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1468*4882a593Smuzhiyun { 0, }
1469*4882a593Smuzhiyun };
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun static struct pci_driver fpga_driver = {
1474*4882a593Smuzhiyun .name = "solos",
1475*4882a593Smuzhiyun .id_table = fpga_pci_tbl,
1476*4882a593Smuzhiyun .probe = fpga_probe,
1477*4882a593Smuzhiyun .remove = fpga_remove,
1478*4882a593Smuzhiyun };
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun
solos_pci_init(void)1481*4882a593Smuzhiyun static int __init solos_pci_init(void)
1482*4882a593Smuzhiyun {
1483*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
1484*4882a593Smuzhiyun
1485*4882a593Smuzhiyun printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1486*4882a593Smuzhiyun return pci_register_driver(&fpga_driver);
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
solos_pci_exit(void)1489*4882a593Smuzhiyun static void __exit solos_pci_exit(void)
1490*4882a593Smuzhiyun {
1491*4882a593Smuzhiyun pci_unregister_driver(&fpga_driver);
1492*4882a593Smuzhiyun printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1493*4882a593Smuzhiyun }
1494*4882a593Smuzhiyun
1495*4882a593Smuzhiyun module_init(solos_pci_init);
1496*4882a593Smuzhiyun module_exit(solos_pci_exit);
1497