xref: /OK3568_Linux_fs/kernel/drivers/atm/eni.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* drivers/atm/eni.c - Efficient Networks ENI155P device driver */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/mm.h>
10*4882a593Smuzhiyun #include <linux/pci.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/atm.h>
13*4882a593Smuzhiyun #include <linux/atmdev.h>
14*4882a593Smuzhiyun #include <linux/sonet.h>
15*4882a593Smuzhiyun #include <linux/skbuff.h>
16*4882a593Smuzhiyun #include <linux/time.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/uio.h>
19*4882a593Smuzhiyun #include <linux/init.h>
20*4882a593Smuzhiyun #include <linux/atm_eni.h>
21*4882a593Smuzhiyun #include <linux/bitops.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <asm/io.h>
24*4882a593Smuzhiyun #include <linux/atomic.h>
25*4882a593Smuzhiyun #include <linux/uaccess.h>
26*4882a593Smuzhiyun #include <asm/string.h>
27*4882a593Smuzhiyun #include <asm/byteorder.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include "tonga.h"
30*4882a593Smuzhiyun #include "midway.h"
31*4882a593Smuzhiyun #include "suni.h"
32*4882a593Smuzhiyun #include "eni.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun  * TODO:
36*4882a593Smuzhiyun  *
37*4882a593Smuzhiyun  * Show stoppers
38*4882a593Smuzhiyun  *  none
39*4882a593Smuzhiyun  *
40*4882a593Smuzhiyun  * Minor
41*4882a593Smuzhiyun  *  - OAM support
42*4882a593Smuzhiyun  *  - fix bugs listed below
43*4882a593Smuzhiyun  */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun  * KNOWN BUGS:
47*4882a593Smuzhiyun  *
48*4882a593Smuzhiyun  * - may run into JK-JK bug and deadlock
49*4882a593Smuzhiyun  * - should allocate UBR channel first
50*4882a593Smuzhiyun  * - buffer space allocation algorithm is stupid
51*4882a593Smuzhiyun  *   (RX: should be maxSDU+maxdelay*rate
52*4882a593Smuzhiyun  *    TX: should be maxSDU+min(maxSDU,maxdelay*rate) )
53*4882a593Smuzhiyun  * - doesn't support OAM cells
54*4882a593Smuzhiyun  * - eni_put_free may hang if not putting memory fragments that _complete_
55*4882a593Smuzhiyun  *   2^n block (never happens in real life, though)
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #if 0
60*4882a593Smuzhiyun #define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
61*4882a593Smuzhiyun #else
62*4882a593Smuzhiyun #define DPRINTK(format,args...)
63*4882a593Smuzhiyun #endif
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #ifndef CONFIG_ATM_ENI_TUNE_BURST
67*4882a593Smuzhiyun #define CONFIG_ATM_ENI_BURST_TX_8W
68*4882a593Smuzhiyun #define CONFIG_ATM_ENI_BURST_RX_4W
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #ifndef CONFIG_ATM_ENI_DEBUG
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define NULLCHECK(x)
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #define EVENT(s,a,b)
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 
event_dump(void)80*4882a593Smuzhiyun static void event_dump(void)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #else
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun  * NULL pointer checking
90*4882a593Smuzhiyun  */
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define NULLCHECK(x) \
93*4882a593Smuzhiyun 	if ((unsigned long) (x) < 0x30) \
94*4882a593Smuzhiyun 		printk(KERN_CRIT #x "==0x%lx\n",(unsigned long) (x))
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun  * Very extensive activity logging. Greatly improves bug detection speed but
98*4882a593Smuzhiyun  * costs a few Mbps if enabled.
99*4882a593Smuzhiyun  */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define EV 64
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun static const char *ev[EV];
104*4882a593Smuzhiyun static unsigned long ev_a[EV],ev_b[EV];
105*4882a593Smuzhiyun static int ec = 0;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 
EVENT(const char * s,unsigned long a,unsigned long b)108*4882a593Smuzhiyun static void EVENT(const char *s,unsigned long a,unsigned long b)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	ev[ec] = s;
111*4882a593Smuzhiyun 	ev_a[ec] = a;
112*4882a593Smuzhiyun 	ev_b[ec] = b;
113*4882a593Smuzhiyun 	ec = (ec+1) % EV;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 
event_dump(void)117*4882a593Smuzhiyun static void event_dump(void)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	int n,i;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	for (n = 0; n < EV; n++) {
122*4882a593Smuzhiyun 		i = (ec+n) % EV;
123*4882a593Smuzhiyun 		printk(KERN_NOTICE);
124*4882a593Smuzhiyun 		printk(ev[i] ? ev[i] : "(null)",ev_a[i],ev_b[i]);
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #endif /* CONFIG_ATM_ENI_DEBUG */
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun  * NExx   must not be equal at end
134*4882a593Smuzhiyun  * EExx   may be equal at end
135*4882a593Smuzhiyun  * xxPJOK verify validity of pointer jumps
136*4882a593Smuzhiyun  * xxPMOK operating on a circular buffer of "c" words
137*4882a593Smuzhiyun  */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define NEPJOK(a0,a1,b) \
140*4882a593Smuzhiyun     ((a0) < (a1) ? (b) <= (a0) || (b) > (a1) : (b) <= (a0) && (b) > (a1))
141*4882a593Smuzhiyun #define EEPJOK(a0,a1,b) \
142*4882a593Smuzhiyun     ((a0) < (a1) ? (b) < (a0) || (b) >= (a1) : (b) < (a0) && (b) >= (a1))
143*4882a593Smuzhiyun #define NEPMOK(a0,d,b,c) NEPJOK(a0,(a0+d) & (c-1),b)
144*4882a593Smuzhiyun #define EEPMOK(a0,d,b,c) EEPJOK(a0,(a0+d) & (c-1),b)
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun static int tx_complete = 0,dma_complete = 0,queued = 0,requeued = 0,
148*4882a593Smuzhiyun   backlogged = 0,rx_enqueued = 0,rx_dequeued = 0,pushed = 0,submitted = 0,
149*4882a593Smuzhiyun   putting = 0;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static struct atm_dev *eni_boards = NULL;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /* Read/write registers on card */
154*4882a593Smuzhiyun #define eni_in(r)	readl(eni_dev->reg+(r)*4)
155*4882a593Smuzhiyun #define eni_out(v,r)	writel((v),eni_dev->reg+(r)*4)
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /*-------------------------------- utilities --------------------------------*/
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 
dump_mem(struct eni_dev * eni_dev)161*4882a593Smuzhiyun static void dump_mem(struct eni_dev *eni_dev)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	int i;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	for (i = 0; i < eni_dev->free_len; i++)
166*4882a593Smuzhiyun 		printk(KERN_DEBUG "  %d: %p %d\n",i,
167*4882a593Smuzhiyun 		    eni_dev->free_list[i].start,
168*4882a593Smuzhiyun 		    1 << eni_dev->free_list[i].order);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 
dump(struct atm_dev * dev)172*4882a593Smuzhiyun static void dump(struct atm_dev *dev)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	int i;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
179*4882a593Smuzhiyun 	printk(KERN_NOTICE "Free memory\n");
180*4882a593Smuzhiyun 	dump_mem(eni_dev);
181*4882a593Smuzhiyun 	printk(KERN_NOTICE "TX buffers\n");
182*4882a593Smuzhiyun 	for (i = 0; i < NR_CHAN; i++)
183*4882a593Smuzhiyun 		if (eni_dev->tx[i].send)
184*4882a593Smuzhiyun 			printk(KERN_NOTICE "  TX %d @ %p: %ld\n",i,
185*4882a593Smuzhiyun 			    eni_dev->tx[i].send,eni_dev->tx[i].words*4);
186*4882a593Smuzhiyun 	printk(KERN_NOTICE "RX buffers\n");
187*4882a593Smuzhiyun 	for (i = 0; i < 1024; i++)
188*4882a593Smuzhiyun 		if (eni_dev->rx_map[i] && ENI_VCC(eni_dev->rx_map[i])->rx)
189*4882a593Smuzhiyun 			printk(KERN_NOTICE "  RX %d @ %p: %ld\n",i,
190*4882a593Smuzhiyun 			    ENI_VCC(eni_dev->rx_map[i])->recv,
191*4882a593Smuzhiyun 			    ENI_VCC(eni_dev->rx_map[i])->words*4);
192*4882a593Smuzhiyun 	printk(KERN_NOTICE "----\n");
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 
eni_put_free(struct eni_dev * eni_dev,void __iomem * start,unsigned long size)196*4882a593Smuzhiyun static void eni_put_free(struct eni_dev *eni_dev, void __iomem *start,
197*4882a593Smuzhiyun     unsigned long size)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct eni_free *list;
200*4882a593Smuzhiyun 	int len,order;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	DPRINTK("init 0x%lx+%ld(0x%lx)\n",start,size,size);
203*4882a593Smuzhiyun 	start += eni_dev->base_diff;
204*4882a593Smuzhiyun 	list = eni_dev->free_list;
205*4882a593Smuzhiyun 	len = eni_dev->free_len;
206*4882a593Smuzhiyun 	while (size) {
207*4882a593Smuzhiyun 		if (len >= eni_dev->free_list_size) {
208*4882a593Smuzhiyun 			printk(KERN_CRIT "eni_put_free overflow (%p,%ld)\n",
209*4882a593Smuzhiyun 			    start,size);
210*4882a593Smuzhiyun 			break;
211*4882a593Smuzhiyun 		}
212*4882a593Smuzhiyun 		for (order = 0; !(((unsigned long)start | size) & (1 << order)); order++);
213*4882a593Smuzhiyun 		if (MID_MIN_BUF_SIZE > (1 << order)) {
214*4882a593Smuzhiyun 			printk(KERN_CRIT "eni_put_free: order %d too small\n",
215*4882a593Smuzhiyun 			    order);
216*4882a593Smuzhiyun 			break;
217*4882a593Smuzhiyun 		}
218*4882a593Smuzhiyun 		list[len].start = (void __iomem *) start;
219*4882a593Smuzhiyun 		list[len].order = order;
220*4882a593Smuzhiyun 		len++;
221*4882a593Smuzhiyun 		start += 1 << order;
222*4882a593Smuzhiyun 		size -= 1 << order;
223*4882a593Smuzhiyun 	}
224*4882a593Smuzhiyun 	eni_dev->free_len = len;
225*4882a593Smuzhiyun 	/*dump_mem(eni_dev);*/
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 
eni_alloc_mem(struct eni_dev * eni_dev,unsigned long * size)229*4882a593Smuzhiyun static void __iomem *eni_alloc_mem(struct eni_dev *eni_dev, unsigned long *size)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	struct eni_free *list;
232*4882a593Smuzhiyun 	void __iomem *start;
233*4882a593Smuzhiyun 	int len,i,order,best_order,index;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	list = eni_dev->free_list;
236*4882a593Smuzhiyun 	len = eni_dev->free_len;
237*4882a593Smuzhiyun 	if (*size < MID_MIN_BUF_SIZE) *size = MID_MIN_BUF_SIZE;
238*4882a593Smuzhiyun 	if (*size > MID_MAX_BUF_SIZE) return NULL;
239*4882a593Smuzhiyun 	for (order = 0; (1 << order) < *size; order++)
240*4882a593Smuzhiyun 		;
241*4882a593Smuzhiyun 	DPRINTK("trying: %ld->%d\n",*size,order);
242*4882a593Smuzhiyun 	best_order = 65; /* we don't have more than 2^64 of anything ... */
243*4882a593Smuzhiyun 	index = 0; /* silence GCC */
244*4882a593Smuzhiyun 	for (i = 0; i < len; i++)
245*4882a593Smuzhiyun 		if (list[i].order == order) {
246*4882a593Smuzhiyun 			best_order = order;
247*4882a593Smuzhiyun 			index = i;
248*4882a593Smuzhiyun 			break;
249*4882a593Smuzhiyun 		}
250*4882a593Smuzhiyun 		else if (best_order > list[i].order && list[i].order > order) {
251*4882a593Smuzhiyun 				best_order = list[i].order;
252*4882a593Smuzhiyun 				index = i;
253*4882a593Smuzhiyun 			}
254*4882a593Smuzhiyun 	if (best_order == 65) return NULL;
255*4882a593Smuzhiyun 	start = list[index].start-eni_dev->base_diff;
256*4882a593Smuzhiyun 	list[index] = list[--len];
257*4882a593Smuzhiyun 	eni_dev->free_len = len;
258*4882a593Smuzhiyun 	*size = 1 << order;
259*4882a593Smuzhiyun 	eni_put_free(eni_dev,start+*size,(1 << best_order)-*size);
260*4882a593Smuzhiyun 	DPRINTK("%ld bytes (order %d) at 0x%lx\n",*size,order,start);
261*4882a593Smuzhiyun 	memset_io(start,0,*size);       /* never leak data */
262*4882a593Smuzhiyun 	/*dump_mem(eni_dev);*/
263*4882a593Smuzhiyun 	return start;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 
eni_free_mem(struct eni_dev * eni_dev,void __iomem * start,unsigned long size)267*4882a593Smuzhiyun static void eni_free_mem(struct eni_dev *eni_dev, void __iomem *start,
268*4882a593Smuzhiyun     unsigned long size)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	struct eni_free *list;
271*4882a593Smuzhiyun 	int len,i,order;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	start += eni_dev->base_diff;
274*4882a593Smuzhiyun 	list = eni_dev->free_list;
275*4882a593Smuzhiyun 	len = eni_dev->free_len;
276*4882a593Smuzhiyun 	for (order = -1; size; order++) size >>= 1;
277*4882a593Smuzhiyun 	DPRINTK("eni_free_mem: %p+0x%lx (order %d)\n",start,size,order);
278*4882a593Smuzhiyun 	for (i = 0; i < len; i++)
279*4882a593Smuzhiyun 		if (((unsigned long) list[i].start) == ((unsigned long)start^(1 << order)) &&
280*4882a593Smuzhiyun 		    list[i].order == order) {
281*4882a593Smuzhiyun 			DPRINTK("match[%d]: 0x%lx/0x%lx(0x%x), %d/%d\n",i,
282*4882a593Smuzhiyun 			    list[i].start,start,1 << order,list[i].order,order);
283*4882a593Smuzhiyun 			list[i] = list[--len];
284*4882a593Smuzhiyun 			start = (void __iomem *) ((unsigned long) start & ~(unsigned long) (1 << order));
285*4882a593Smuzhiyun 			order++;
286*4882a593Smuzhiyun 			i = -1;
287*4882a593Smuzhiyun 			continue;
288*4882a593Smuzhiyun 		}
289*4882a593Smuzhiyun 	if (len >= eni_dev->free_list_size) {
290*4882a593Smuzhiyun 		printk(KERN_ALERT "eni_free_mem overflow (%p,%d)\n",start,
291*4882a593Smuzhiyun 		    order);
292*4882a593Smuzhiyun 		return;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 	list[len].start = start;
295*4882a593Smuzhiyun 	list[len].order = order;
296*4882a593Smuzhiyun 	eni_dev->free_len = len+1;
297*4882a593Smuzhiyun 	/*dump_mem(eni_dev);*/
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun /*----------------------------------- RX ------------------------------------*/
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun #define ENI_VCC_NOS ((struct atm_vcc *) 1)
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 
rx_ident_err(struct atm_vcc * vcc)307*4882a593Smuzhiyun static void rx_ident_err(struct atm_vcc *vcc)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	struct atm_dev *dev;
310*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
311*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	dev = vcc->dev;
314*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
315*4882a593Smuzhiyun 	/* immediately halt adapter */
316*4882a593Smuzhiyun 	eni_out(eni_in(MID_MC_S) &
317*4882a593Smuzhiyun 	    ~(MID_DMA_ENABLE | MID_TX_ENABLE | MID_RX_ENABLE),MID_MC_S);
318*4882a593Smuzhiyun 	/* dump useful information */
319*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
320*4882a593Smuzhiyun 	printk(KERN_ALERT DEV_LABEL "(itf %d): driver error - RX ident "
321*4882a593Smuzhiyun 	    "mismatch\n",dev->number);
322*4882a593Smuzhiyun 	printk(KERN_ALERT "  VCI %d, rxing %d, words %ld\n",vcc->vci,
323*4882a593Smuzhiyun 	    eni_vcc->rxing,eni_vcc->words);
324*4882a593Smuzhiyun 	printk(KERN_ALERT "  host descr 0x%lx, rx pos 0x%lx, descr value "
325*4882a593Smuzhiyun 	    "0x%x\n",eni_vcc->descr,eni_vcc->rx_pos,
326*4882a593Smuzhiyun 	    (unsigned) readl(eni_vcc->recv+eni_vcc->descr*4));
327*4882a593Smuzhiyun 	printk(KERN_ALERT "  last %p, servicing %d\n",eni_vcc->last,
328*4882a593Smuzhiyun 	    eni_vcc->servicing);
329*4882a593Smuzhiyun 	EVENT("---dump ends here---\n",0,0);
330*4882a593Smuzhiyun 	printk(KERN_NOTICE "---recent events---\n");
331*4882a593Smuzhiyun 	event_dump();
332*4882a593Smuzhiyun 	ENI_DEV(dev)->fast = NULL; /* really stop it */
333*4882a593Smuzhiyun 	ENI_DEV(dev)->slow = NULL;
334*4882a593Smuzhiyun 	skb_queue_head_init(&ENI_DEV(dev)->rx_queue);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 
do_rx_dma(struct atm_vcc * vcc,struct sk_buff * skb,unsigned long skip,unsigned long size,unsigned long eff)338*4882a593Smuzhiyun static int do_rx_dma(struct atm_vcc *vcc,struct sk_buff *skb,
339*4882a593Smuzhiyun     unsigned long skip,unsigned long size,unsigned long eff)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
342*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
343*4882a593Smuzhiyun 	u32 dma_rd,dma_wr;
344*4882a593Smuzhiyun 	u32 dma[RX_DMA_BUF*2];
345*4882a593Smuzhiyun 	dma_addr_t paddr;
346*4882a593Smuzhiyun 	unsigned long here;
347*4882a593Smuzhiyun 	int i,j;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
350*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
351*4882a593Smuzhiyun 	paddr = 0; /* GCC, shut up */
352*4882a593Smuzhiyun 	if (skb) {
353*4882a593Smuzhiyun 		paddr = dma_map_single(&eni_dev->pci_dev->dev,skb->data,skb->len,
354*4882a593Smuzhiyun 				       DMA_FROM_DEVICE);
355*4882a593Smuzhiyun 		if (dma_mapping_error(&eni_dev->pci_dev->dev, paddr))
356*4882a593Smuzhiyun 			goto dma_map_error;
357*4882a593Smuzhiyun 		ENI_PRV_PADDR(skb) = paddr;
358*4882a593Smuzhiyun 		if (paddr & 3)
359*4882a593Smuzhiyun 			printk(KERN_CRIT DEV_LABEL "(itf %d): VCI %d has "
360*4882a593Smuzhiyun 			    "mis-aligned RX data (0x%lx)\n",vcc->dev->number,
361*4882a593Smuzhiyun 			    vcc->vci,(unsigned long) paddr);
362*4882a593Smuzhiyun 		ENI_PRV_SIZE(skb) = size+skip;
363*4882a593Smuzhiyun 		    /* PDU plus descriptor */
364*4882a593Smuzhiyun 		ATM_SKB(skb)->vcc = vcc;
365*4882a593Smuzhiyun 	}
366*4882a593Smuzhiyun 	j = 0;
367*4882a593Smuzhiyun 	if ((eff && skip) || 1) { /* @@@ actually, skip is always == 1 ... */
368*4882a593Smuzhiyun 		here = (eni_vcc->descr+skip) & (eni_vcc->words-1);
369*4882a593Smuzhiyun 		dma[j++] = (here << MID_DMA_COUNT_SHIFT) | (vcc->vci
370*4882a593Smuzhiyun 		    << MID_DMA_VCI_SHIFT) | MID_DT_JK;
371*4882a593Smuzhiyun 		dma[j++] = 0;
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun 	here = (eni_vcc->descr+size+skip) & (eni_vcc->words-1);
374*4882a593Smuzhiyun 	if (!eff) size += skip;
375*4882a593Smuzhiyun 	else {
376*4882a593Smuzhiyun 		unsigned long words;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 		if (!size) {
379*4882a593Smuzhiyun 			DPRINTK("strange things happen ...\n");
380*4882a593Smuzhiyun 			EVENT("strange things happen ... (skip=%ld,eff=%ld)\n",
381*4882a593Smuzhiyun 			    size,eff);
382*4882a593Smuzhiyun 		}
383*4882a593Smuzhiyun 		words = eff;
384*4882a593Smuzhiyun 		if (paddr & 15) {
385*4882a593Smuzhiyun 			unsigned long init;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 			init = 4-((paddr & 15) >> 2);
388*4882a593Smuzhiyun 			if (init > words) init = words;
389*4882a593Smuzhiyun 			dma[j++] = MID_DT_WORD | (init << MID_DMA_COUNT_SHIFT) |
390*4882a593Smuzhiyun 			    (vcc->vci << MID_DMA_VCI_SHIFT);
391*4882a593Smuzhiyun 			dma[j++] = paddr;
392*4882a593Smuzhiyun 			paddr += init << 2;
393*4882a593Smuzhiyun 			words -= init;
394*4882a593Smuzhiyun 		}
395*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_16W /* may work with some PCI chipsets ... */
396*4882a593Smuzhiyun 		if (words & ~15) {
397*4882a593Smuzhiyun 			dma[j++] = MID_DT_16W | ((words >> 4) <<
398*4882a593Smuzhiyun 			    MID_DMA_COUNT_SHIFT) | (vcc->vci <<
399*4882a593Smuzhiyun 			    MID_DMA_VCI_SHIFT);
400*4882a593Smuzhiyun 			dma[j++] = paddr;
401*4882a593Smuzhiyun 			paddr += (words & ~15) << 2;
402*4882a593Smuzhiyun 			words &= 15;
403*4882a593Smuzhiyun 		}
404*4882a593Smuzhiyun #endif
405*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_8W  /* works only with *some* PCI chipsets ... */
406*4882a593Smuzhiyun 		if (words & ~7) {
407*4882a593Smuzhiyun 			dma[j++] = MID_DT_8W | ((words >> 3) <<
408*4882a593Smuzhiyun 			    MID_DMA_COUNT_SHIFT) | (vcc->vci <<
409*4882a593Smuzhiyun 			    MID_DMA_VCI_SHIFT);
410*4882a593Smuzhiyun 			dma[j++] = paddr;
411*4882a593Smuzhiyun 			paddr += (words & ~7) << 2;
412*4882a593Smuzhiyun 			words &= 7;
413*4882a593Smuzhiyun 		}
414*4882a593Smuzhiyun #endif
415*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_4W /* recommended */
416*4882a593Smuzhiyun 		if (words & ~3) {
417*4882a593Smuzhiyun 			dma[j++] = MID_DT_4W | ((words >> 2) <<
418*4882a593Smuzhiyun 			    MID_DMA_COUNT_SHIFT) | (vcc->vci <<
419*4882a593Smuzhiyun 			    MID_DMA_VCI_SHIFT);
420*4882a593Smuzhiyun 			dma[j++] = paddr;
421*4882a593Smuzhiyun 			paddr += (words & ~3) << 2;
422*4882a593Smuzhiyun 			words &= 3;
423*4882a593Smuzhiyun 		}
424*4882a593Smuzhiyun #endif
425*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_2W /* probably useless if RX_4W, RX_8W, ... */
426*4882a593Smuzhiyun 		if (words & ~1) {
427*4882a593Smuzhiyun 			dma[j++] = MID_DT_2W | ((words >> 1) <<
428*4882a593Smuzhiyun 			    MID_DMA_COUNT_SHIFT) | (vcc->vci <<
429*4882a593Smuzhiyun 			    MID_DMA_VCI_SHIFT);
430*4882a593Smuzhiyun 			dma[j++] = paddr;
431*4882a593Smuzhiyun 			paddr += (words & ~1) << 2;
432*4882a593Smuzhiyun 			words &= 1;
433*4882a593Smuzhiyun 		}
434*4882a593Smuzhiyun #endif
435*4882a593Smuzhiyun 		if (words) {
436*4882a593Smuzhiyun 			dma[j++] = MID_DT_WORD | (words << MID_DMA_COUNT_SHIFT)
437*4882a593Smuzhiyun 			    | (vcc->vci << MID_DMA_VCI_SHIFT);
438*4882a593Smuzhiyun 			dma[j++] = paddr;
439*4882a593Smuzhiyun 		}
440*4882a593Smuzhiyun 	}
441*4882a593Smuzhiyun 	if (size != eff) {
442*4882a593Smuzhiyun 		dma[j++] = (here << MID_DMA_COUNT_SHIFT) |
443*4882a593Smuzhiyun 		    (vcc->vci << MID_DMA_VCI_SHIFT) | MID_DT_JK;
444*4882a593Smuzhiyun 		dma[j++] = 0;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	if (!j || j > 2*RX_DMA_BUF) {
447*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "!j or j too big!!!\n");
448*4882a593Smuzhiyun 		goto trouble;
449*4882a593Smuzhiyun 	}
450*4882a593Smuzhiyun 	dma[j-2] |= MID_DMA_END;
451*4882a593Smuzhiyun 	j = j >> 1;
452*4882a593Smuzhiyun 	dma_wr = eni_in(MID_DMA_WR_RX);
453*4882a593Smuzhiyun 	dma_rd = eni_in(MID_DMA_RD_RX);
454*4882a593Smuzhiyun 	/*
455*4882a593Smuzhiyun 	 * Can I move the dma_wr pointer by 2j+1 positions without overwriting
456*4882a593Smuzhiyun 	 * data that hasn't been read (position of dma_rd) yet ?
457*4882a593Smuzhiyun 	 */
458*4882a593Smuzhiyun 	if (!NEPMOK(dma_wr,j+j+1,dma_rd,NR_DMA_RX)) { /* @@@ +1 is ugly */
459*4882a593Smuzhiyun 		printk(KERN_WARNING DEV_LABEL "(itf %d): RX DMA full\n",
460*4882a593Smuzhiyun 		    vcc->dev->number);
461*4882a593Smuzhiyun 		goto trouble;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun         for (i = 0; i < j; i++) {
464*4882a593Smuzhiyun 		writel(dma[i*2],eni_dev->rx_dma+dma_wr*8);
465*4882a593Smuzhiyun 		writel(dma[i*2+1],eni_dev->rx_dma+dma_wr*8+4);
466*4882a593Smuzhiyun 		dma_wr = (dma_wr+1) & (NR_DMA_RX-1);
467*4882a593Smuzhiyun         }
468*4882a593Smuzhiyun 	if (skb) {
469*4882a593Smuzhiyun 		ENI_PRV_POS(skb) = eni_vcc->descr+size+1;
470*4882a593Smuzhiyun 		skb_queue_tail(&eni_dev->rx_queue,skb);
471*4882a593Smuzhiyun 		eni_vcc->last = skb;
472*4882a593Smuzhiyun 		rx_enqueued++;
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 	eni_vcc->descr = here;
475*4882a593Smuzhiyun 	eni_out(dma_wr,MID_DMA_WR_RX);
476*4882a593Smuzhiyun 	return 0;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun trouble:
479*4882a593Smuzhiyun 	if (paddr)
480*4882a593Smuzhiyun 		dma_unmap_single(&eni_dev->pci_dev->dev,paddr,skb->len,
481*4882a593Smuzhiyun 				 DMA_FROM_DEVICE);
482*4882a593Smuzhiyun dma_map_error:
483*4882a593Smuzhiyun 	if (skb) dev_kfree_skb_irq(skb);
484*4882a593Smuzhiyun 	return -1;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 
discard(struct atm_vcc * vcc,unsigned long size)488*4882a593Smuzhiyun static void discard(struct atm_vcc *vcc,unsigned long size)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
493*4882a593Smuzhiyun 	EVENT("discard (size=%ld)\n",size,0);
494*4882a593Smuzhiyun 	while (do_rx_dma(vcc,NULL,1,size,0)) EVENT("BUSY LOOP",0,0);
495*4882a593Smuzhiyun 	    /* could do a full fallback, but that might be more expensive */
496*4882a593Smuzhiyun 	if (eni_vcc->rxing) ENI_PRV_POS(eni_vcc->last) += size+1;
497*4882a593Smuzhiyun 	else eni_vcc->rx_pos = (eni_vcc->rx_pos+size+1) & (eni_vcc->words-1);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun /*
502*4882a593Smuzhiyun  * TODO: should check whether direct copies (without DMA setup, dequeuing on
503*4882a593Smuzhiyun  * interrupt, etc.) aren't much faster for AAL0
504*4882a593Smuzhiyun  */
505*4882a593Smuzhiyun 
rx_aal0(struct atm_vcc * vcc)506*4882a593Smuzhiyun static int rx_aal0(struct atm_vcc *vcc)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
509*4882a593Smuzhiyun 	unsigned long descr;
510*4882a593Smuzhiyun 	unsigned long length;
511*4882a593Smuzhiyun 	struct sk_buff *skb;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	DPRINTK(">rx_aal0\n");
514*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
515*4882a593Smuzhiyun 	descr = readl(eni_vcc->recv+eni_vcc->descr*4);
516*4882a593Smuzhiyun 	if ((descr & MID_RED_IDEN) != (MID_RED_RX_ID << MID_RED_SHIFT)) {
517*4882a593Smuzhiyun 		rx_ident_err(vcc);
518*4882a593Smuzhiyun 		return 1;
519*4882a593Smuzhiyun 	}
520*4882a593Smuzhiyun 	if (descr & MID_RED_T) {
521*4882a593Smuzhiyun 		DPRINTK(DEV_LABEL "(itf %d): trashing empty cell\n",
522*4882a593Smuzhiyun 		    vcc->dev->number);
523*4882a593Smuzhiyun 		length = 0;
524*4882a593Smuzhiyun 		atomic_inc(&vcc->stats->rx_err);
525*4882a593Smuzhiyun 	}
526*4882a593Smuzhiyun 	else {
527*4882a593Smuzhiyun 		length = ATM_CELL_SIZE-1; /* no HEC */
528*4882a593Smuzhiyun 	}
529*4882a593Smuzhiyun 	skb = length ? atm_alloc_charge(vcc,length,GFP_ATOMIC) : NULL;
530*4882a593Smuzhiyun 	if (!skb) {
531*4882a593Smuzhiyun 		discard(vcc,length >> 2);
532*4882a593Smuzhiyun 		return 0;
533*4882a593Smuzhiyun 	}
534*4882a593Smuzhiyun 	skb_put(skb,length);
535*4882a593Smuzhiyun 	skb->tstamp = eni_vcc->timestamp;
536*4882a593Smuzhiyun 	DPRINTK("got len %ld\n",length);
537*4882a593Smuzhiyun 	if (do_rx_dma(vcc,skb,1,length >> 2,length >> 2)) return 1;
538*4882a593Smuzhiyun 	eni_vcc->rxing++;
539*4882a593Smuzhiyun 	return 0;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 
rx_aal5(struct atm_vcc * vcc)543*4882a593Smuzhiyun static int rx_aal5(struct atm_vcc *vcc)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
546*4882a593Smuzhiyun 	unsigned long descr;
547*4882a593Smuzhiyun 	unsigned long size,eff,length;
548*4882a593Smuzhiyun 	struct sk_buff *skb;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	EVENT("rx_aal5\n",0,0);
551*4882a593Smuzhiyun 	DPRINTK(">rx_aal5\n");
552*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
553*4882a593Smuzhiyun 	descr = readl(eni_vcc->recv+eni_vcc->descr*4);
554*4882a593Smuzhiyun 	if ((descr & MID_RED_IDEN) != (MID_RED_RX_ID << MID_RED_SHIFT)) {
555*4882a593Smuzhiyun 		rx_ident_err(vcc);
556*4882a593Smuzhiyun 		return 1;
557*4882a593Smuzhiyun 	}
558*4882a593Smuzhiyun 	if (descr & (MID_RED_T | MID_RED_CRC_ERR)) {
559*4882a593Smuzhiyun 		if (descr & MID_RED_T) {
560*4882a593Smuzhiyun 			EVENT("empty cell (descr=0x%lx)\n",descr,0);
561*4882a593Smuzhiyun 			DPRINTK(DEV_LABEL "(itf %d): trashing empty cell\n",
562*4882a593Smuzhiyun 			    vcc->dev->number);
563*4882a593Smuzhiyun 			size = 0;
564*4882a593Smuzhiyun 		}
565*4882a593Smuzhiyun 		else {
566*4882a593Smuzhiyun 			static unsigned long silence = 0;
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 			if (time_after(jiffies, silence) || silence == 0) {
569*4882a593Smuzhiyun 				printk(KERN_WARNING DEV_LABEL "(itf %d): "
570*4882a593Smuzhiyun 				    "discarding PDU(s) with CRC error\n",
571*4882a593Smuzhiyun 				    vcc->dev->number);
572*4882a593Smuzhiyun 				silence = (jiffies+2*HZ)|1;
573*4882a593Smuzhiyun 			}
574*4882a593Smuzhiyun 			size = (descr & MID_RED_COUNT)*(ATM_CELL_PAYLOAD >> 2);
575*4882a593Smuzhiyun 			EVENT("CRC error (descr=0x%lx,size=%ld)\n",descr,
576*4882a593Smuzhiyun 			    size);
577*4882a593Smuzhiyun 		}
578*4882a593Smuzhiyun 		eff = length = 0;
579*4882a593Smuzhiyun 		atomic_inc(&vcc->stats->rx_err);
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	else {
582*4882a593Smuzhiyun 		size = (descr & MID_RED_COUNT)*(ATM_CELL_PAYLOAD >> 2);
583*4882a593Smuzhiyun 		DPRINTK("size=%ld\n",size);
584*4882a593Smuzhiyun 		length = readl(eni_vcc->recv+(((eni_vcc->descr+size-1) &
585*4882a593Smuzhiyun 		    (eni_vcc->words-1)))*4) & 0xffff;
586*4882a593Smuzhiyun 				/* -trailer(2)+header(1) */
587*4882a593Smuzhiyun 		if (length && length <= (size << 2)-8 && length <=
588*4882a593Smuzhiyun 		  ATM_MAX_AAL5_PDU) eff = (length+3) >> 2;
589*4882a593Smuzhiyun 		else {				 /* ^ trailer length (8) */
590*4882a593Smuzhiyun 			EVENT("bad PDU (descr=0x08%lx,length=%ld)\n",descr,
591*4882a593Smuzhiyun 			    length);
592*4882a593Smuzhiyun 			printk(KERN_ERR DEV_LABEL "(itf %d): bad AAL5 PDU "
593*4882a593Smuzhiyun 			    "(VCI=%d,length=%ld,size=%ld (descr 0x%lx))\n",
594*4882a593Smuzhiyun 			    vcc->dev->number,vcc->vci,length,size << 2,descr);
595*4882a593Smuzhiyun 			length = eff = 0;
596*4882a593Smuzhiyun 			atomic_inc(&vcc->stats->rx_err);
597*4882a593Smuzhiyun 		}
598*4882a593Smuzhiyun 	}
599*4882a593Smuzhiyun 	skb = eff ? atm_alloc_charge(vcc,eff << 2,GFP_ATOMIC) : NULL;
600*4882a593Smuzhiyun 	if (!skb) {
601*4882a593Smuzhiyun 		discard(vcc,size);
602*4882a593Smuzhiyun 		return 0;
603*4882a593Smuzhiyun 	}
604*4882a593Smuzhiyun 	skb_put(skb,length);
605*4882a593Smuzhiyun 	DPRINTK("got len %ld\n",length);
606*4882a593Smuzhiyun 	if (do_rx_dma(vcc,skb,1,size,eff)) return 1;
607*4882a593Smuzhiyun 	eni_vcc->rxing++;
608*4882a593Smuzhiyun 	return 0;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 
rx_vcc(struct atm_vcc * vcc)612*4882a593Smuzhiyun static inline int rx_vcc(struct atm_vcc *vcc)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun 	void __iomem *vci_dsc;
615*4882a593Smuzhiyun 	unsigned long tmp;
616*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
619*4882a593Smuzhiyun 	vci_dsc = ENI_DEV(vcc->dev)->vci+vcc->vci*16;
620*4882a593Smuzhiyun 	EVENT("rx_vcc(1)\n",0,0);
621*4882a593Smuzhiyun 	while (eni_vcc->descr != (tmp = (readl(vci_dsc+4) & MID_VCI_DESCR) >>
622*4882a593Smuzhiyun 	    MID_VCI_DESCR_SHIFT)) {
623*4882a593Smuzhiyun 		EVENT("rx_vcc(2: host dsc=0x%lx, nic dsc=0x%lx)\n",
624*4882a593Smuzhiyun 		    eni_vcc->descr,tmp);
625*4882a593Smuzhiyun 		DPRINTK("CB_DESCR %ld REG_DESCR %d\n",ENI_VCC(vcc)->descr,
626*4882a593Smuzhiyun 		    (((unsigned) readl(vci_dsc+4) & MID_VCI_DESCR) >>
627*4882a593Smuzhiyun 		    MID_VCI_DESCR_SHIFT));
628*4882a593Smuzhiyun 		if (ENI_VCC(vcc)->rx(vcc)) return 1;
629*4882a593Smuzhiyun 	}
630*4882a593Smuzhiyun 	/* clear IN_SERVICE flag */
631*4882a593Smuzhiyun 	writel(readl(vci_dsc) & ~MID_VCI_IN_SERVICE,vci_dsc);
632*4882a593Smuzhiyun 	/*
633*4882a593Smuzhiyun 	 * If new data has arrived between evaluating the while condition and
634*4882a593Smuzhiyun 	 * clearing IN_SERVICE, we wouldn't be notified until additional data
635*4882a593Smuzhiyun 	 * follows. So we have to loop again to be sure.
636*4882a593Smuzhiyun 	 */
637*4882a593Smuzhiyun 	EVENT("rx_vcc(3)\n",0,0);
638*4882a593Smuzhiyun 	while (ENI_VCC(vcc)->descr != (tmp = (readl(vci_dsc+4) & MID_VCI_DESCR)
639*4882a593Smuzhiyun 	    >> MID_VCI_DESCR_SHIFT)) {
640*4882a593Smuzhiyun 		EVENT("rx_vcc(4: host dsc=0x%lx, nic dsc=0x%lx)\n",
641*4882a593Smuzhiyun 		    eni_vcc->descr,tmp);
642*4882a593Smuzhiyun 		DPRINTK("CB_DESCR %ld REG_DESCR %d\n",ENI_VCC(vcc)->descr,
643*4882a593Smuzhiyun 		    (((unsigned) readl(vci_dsc+4) & MID_VCI_DESCR) >>
644*4882a593Smuzhiyun 		    MID_VCI_DESCR_SHIFT));
645*4882a593Smuzhiyun 		if (ENI_VCC(vcc)->rx(vcc)) return 1;
646*4882a593Smuzhiyun 	}
647*4882a593Smuzhiyun 	return 0;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 
poll_rx(struct atm_dev * dev)651*4882a593Smuzhiyun static void poll_rx(struct atm_dev *dev)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
654*4882a593Smuzhiyun 	struct atm_vcc *curr;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
657*4882a593Smuzhiyun 	while ((curr = eni_dev->fast)) {
658*4882a593Smuzhiyun 		EVENT("poll_rx.fast\n",0,0);
659*4882a593Smuzhiyun 		if (rx_vcc(curr)) return;
660*4882a593Smuzhiyun 		eni_dev->fast = ENI_VCC(curr)->next;
661*4882a593Smuzhiyun 		ENI_VCC(curr)->next = ENI_VCC_NOS;
662*4882a593Smuzhiyun 		barrier();
663*4882a593Smuzhiyun 		ENI_VCC(curr)->servicing--;
664*4882a593Smuzhiyun 	}
665*4882a593Smuzhiyun 	while ((curr = eni_dev->slow)) {
666*4882a593Smuzhiyun 		EVENT("poll_rx.slow\n",0,0);
667*4882a593Smuzhiyun 		if (rx_vcc(curr)) return;
668*4882a593Smuzhiyun 		eni_dev->slow = ENI_VCC(curr)->next;
669*4882a593Smuzhiyun 		ENI_VCC(curr)->next = ENI_VCC_NOS;
670*4882a593Smuzhiyun 		barrier();
671*4882a593Smuzhiyun 		ENI_VCC(curr)->servicing--;
672*4882a593Smuzhiyun 	}
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 
get_service(struct atm_dev * dev)676*4882a593Smuzhiyun static void get_service(struct atm_dev *dev)
677*4882a593Smuzhiyun {
678*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
679*4882a593Smuzhiyun 	struct atm_vcc *vcc;
680*4882a593Smuzhiyun 	unsigned long vci;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	DPRINTK(">get_service\n");
683*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
684*4882a593Smuzhiyun 	while (eni_in(MID_SERV_WRITE) != eni_dev->serv_read) {
685*4882a593Smuzhiyun 		vci = readl(eni_dev->service+eni_dev->serv_read*4);
686*4882a593Smuzhiyun 		eni_dev->serv_read = (eni_dev->serv_read+1) & (NR_SERVICE-1);
687*4882a593Smuzhiyun 		vcc = eni_dev->rx_map[vci & 1023];
688*4882a593Smuzhiyun 		if (!vcc) {
689*4882a593Smuzhiyun 			printk(KERN_CRIT DEV_LABEL "(itf %d): VCI %ld not "
690*4882a593Smuzhiyun 			    "found\n",dev->number,vci);
691*4882a593Smuzhiyun 			continue; /* nasty but we try to go on anyway */
692*4882a593Smuzhiyun 			/* @@@ nope, doesn't work */
693*4882a593Smuzhiyun 		}
694*4882a593Smuzhiyun 		EVENT("getting from service\n",0,0);
695*4882a593Smuzhiyun 		if (ENI_VCC(vcc)->next != ENI_VCC_NOS) {
696*4882a593Smuzhiyun 			EVENT("double service\n",0,0);
697*4882a593Smuzhiyun 			DPRINTK("Grr, servicing VCC %ld twice\n",vci);
698*4882a593Smuzhiyun 			continue;
699*4882a593Smuzhiyun 		}
700*4882a593Smuzhiyun 		ENI_VCC(vcc)->timestamp = ktime_get_real();
701*4882a593Smuzhiyun 		ENI_VCC(vcc)->next = NULL;
702*4882a593Smuzhiyun 		if (vcc->qos.rxtp.traffic_class == ATM_CBR) {
703*4882a593Smuzhiyun 			if (eni_dev->fast)
704*4882a593Smuzhiyun 				ENI_VCC(eni_dev->last_fast)->next = vcc;
705*4882a593Smuzhiyun 			else eni_dev->fast = vcc;
706*4882a593Smuzhiyun 			eni_dev->last_fast = vcc;
707*4882a593Smuzhiyun 		}
708*4882a593Smuzhiyun 		else {
709*4882a593Smuzhiyun 			if (eni_dev->slow)
710*4882a593Smuzhiyun 				ENI_VCC(eni_dev->last_slow)->next = vcc;
711*4882a593Smuzhiyun 			else eni_dev->slow = vcc;
712*4882a593Smuzhiyun 			eni_dev->last_slow = vcc;
713*4882a593Smuzhiyun 		}
714*4882a593Smuzhiyun 		putting++;
715*4882a593Smuzhiyun 		ENI_VCC(vcc)->servicing++;
716*4882a593Smuzhiyun 	}
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 
dequeue_rx(struct atm_dev * dev)720*4882a593Smuzhiyun static void dequeue_rx(struct atm_dev *dev)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
723*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
724*4882a593Smuzhiyun 	struct atm_vcc *vcc;
725*4882a593Smuzhiyun 	struct sk_buff *skb;
726*4882a593Smuzhiyun 	void __iomem *vci_dsc;
727*4882a593Smuzhiyun 	int first;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
730*4882a593Smuzhiyun 	first = 1;
731*4882a593Smuzhiyun 	while (1) {
732*4882a593Smuzhiyun 		skb = skb_dequeue(&eni_dev->rx_queue);
733*4882a593Smuzhiyun 		if (!skb) {
734*4882a593Smuzhiyun 			if (first) {
735*4882a593Smuzhiyun 				DPRINTK(DEV_LABEL "(itf %d): RX but not "
736*4882a593Smuzhiyun 				    "rxing\n",dev->number);
737*4882a593Smuzhiyun 				EVENT("nothing to dequeue\n",0,0);
738*4882a593Smuzhiyun 			}
739*4882a593Smuzhiyun 			break;
740*4882a593Smuzhiyun 		}
741*4882a593Smuzhiyun 		EVENT("dequeued (size=%ld,pos=0x%lx)\n",ENI_PRV_SIZE(skb),
742*4882a593Smuzhiyun 		    ENI_PRV_POS(skb));
743*4882a593Smuzhiyun 		rx_dequeued++;
744*4882a593Smuzhiyun 		vcc = ATM_SKB(skb)->vcc;
745*4882a593Smuzhiyun 		eni_vcc = ENI_VCC(vcc);
746*4882a593Smuzhiyun 		first = 0;
747*4882a593Smuzhiyun 		vci_dsc = eni_dev->vci+vcc->vci*16;
748*4882a593Smuzhiyun 		if (!EEPMOK(eni_vcc->rx_pos,ENI_PRV_SIZE(skb),
749*4882a593Smuzhiyun 		    (readl(vci_dsc+4) & MID_VCI_READ) >> MID_VCI_READ_SHIFT,
750*4882a593Smuzhiyun 		    eni_vcc->words)) {
751*4882a593Smuzhiyun 			EVENT("requeuing\n",0,0);
752*4882a593Smuzhiyun 			skb_queue_head(&eni_dev->rx_queue,skb);
753*4882a593Smuzhiyun 			break;
754*4882a593Smuzhiyun 		}
755*4882a593Smuzhiyun 		eni_vcc->rxing--;
756*4882a593Smuzhiyun 		eni_vcc->rx_pos = ENI_PRV_POS(skb) & (eni_vcc->words-1);
757*4882a593Smuzhiyun 		dma_unmap_single(&eni_dev->pci_dev->dev,ENI_PRV_PADDR(skb),skb->len,
758*4882a593Smuzhiyun 			         DMA_TO_DEVICE);
759*4882a593Smuzhiyun 		if (!skb->len) dev_kfree_skb_irq(skb);
760*4882a593Smuzhiyun 		else {
761*4882a593Smuzhiyun 			EVENT("pushing (len=%ld)\n",skb->len,0);
762*4882a593Smuzhiyun 			if (vcc->qos.aal == ATM_AAL0)
763*4882a593Smuzhiyun 				*(unsigned long *) skb->data =
764*4882a593Smuzhiyun 				    ntohl(*(unsigned long *) skb->data);
765*4882a593Smuzhiyun 			memset(skb->cb,0,sizeof(struct eni_skb_prv));
766*4882a593Smuzhiyun 			vcc->push(vcc,skb);
767*4882a593Smuzhiyun 			pushed++;
768*4882a593Smuzhiyun 		}
769*4882a593Smuzhiyun 		atomic_inc(&vcc->stats->rx);
770*4882a593Smuzhiyun 	}
771*4882a593Smuzhiyun 	wake_up(&eni_dev->rx_wait);
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 
open_rx_first(struct atm_vcc * vcc)775*4882a593Smuzhiyun static int open_rx_first(struct atm_vcc *vcc)
776*4882a593Smuzhiyun {
777*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
778*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
779*4882a593Smuzhiyun 	unsigned long size;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	DPRINTK("open_rx_first\n");
782*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
783*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
784*4882a593Smuzhiyun 	eni_vcc->rx = NULL;
785*4882a593Smuzhiyun 	if (vcc->qos.rxtp.traffic_class == ATM_NONE) return 0;
786*4882a593Smuzhiyun 	size = vcc->qos.rxtp.max_sdu*eni_dev->rx_mult/100;
787*4882a593Smuzhiyun 	if (size > MID_MAX_BUF_SIZE && vcc->qos.rxtp.max_sdu <=
788*4882a593Smuzhiyun 	    MID_MAX_BUF_SIZE)
789*4882a593Smuzhiyun 		size = MID_MAX_BUF_SIZE;
790*4882a593Smuzhiyun 	eni_vcc->recv = eni_alloc_mem(eni_dev,&size);
791*4882a593Smuzhiyun 	DPRINTK("rx at 0x%lx\n",eni_vcc->recv);
792*4882a593Smuzhiyun 	eni_vcc->words = size >> 2;
793*4882a593Smuzhiyun 	if (!eni_vcc->recv) return -ENOBUFS;
794*4882a593Smuzhiyun 	eni_vcc->rx = vcc->qos.aal == ATM_AAL5 ? rx_aal5 : rx_aal0;
795*4882a593Smuzhiyun 	eni_vcc->descr = 0;
796*4882a593Smuzhiyun 	eni_vcc->rx_pos = 0;
797*4882a593Smuzhiyun 	eni_vcc->rxing = 0;
798*4882a593Smuzhiyun 	eni_vcc->servicing = 0;
799*4882a593Smuzhiyun 	eni_vcc->next = ENI_VCC_NOS;
800*4882a593Smuzhiyun 	return 0;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 
open_rx_second(struct atm_vcc * vcc)804*4882a593Smuzhiyun static int open_rx_second(struct atm_vcc *vcc)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun 	void __iomem *here;
807*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
808*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
809*4882a593Smuzhiyun 	unsigned long size;
810*4882a593Smuzhiyun 	int order;
811*4882a593Smuzhiyun 
812*4882a593Smuzhiyun 	DPRINTK("open_rx_second\n");
813*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
814*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
815*4882a593Smuzhiyun 	if (!eni_vcc->rx) return 0;
816*4882a593Smuzhiyun 	/* set up VCI descriptor */
817*4882a593Smuzhiyun 	here = eni_dev->vci+vcc->vci*16;
818*4882a593Smuzhiyun 	DPRINTK("loc 0x%x\n",(unsigned) (eni_vcc->recv-eni_dev->ram)/4);
819*4882a593Smuzhiyun 	size = eni_vcc->words >> 8;
820*4882a593Smuzhiyun 	for (order = -1; size; order++) size >>= 1;
821*4882a593Smuzhiyun 	writel(0,here+4); /* descr, read = 0 */
822*4882a593Smuzhiyun 	writel(0,here+8); /* write, state, count = 0 */
823*4882a593Smuzhiyun 	if (eni_dev->rx_map[vcc->vci])
824*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "(itf %d): BUG - VCI %d already "
825*4882a593Smuzhiyun 		    "in use\n",vcc->dev->number,vcc->vci);
826*4882a593Smuzhiyun 	eni_dev->rx_map[vcc->vci] = vcc; /* now it counts */
827*4882a593Smuzhiyun 	writel(((vcc->qos.aal != ATM_AAL5 ? MID_MODE_RAW : MID_MODE_AAL5) <<
828*4882a593Smuzhiyun 	    MID_VCI_MODE_SHIFT) | MID_VCI_PTI_MODE |
829*4882a593Smuzhiyun 	    (((eni_vcc->recv-eni_dev->ram) >> (MID_LOC_SKIP+2)) <<
830*4882a593Smuzhiyun 	    MID_VCI_LOCATION_SHIFT) | (order << MID_VCI_SIZE_SHIFT),here);
831*4882a593Smuzhiyun 	return 0;
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 
close_rx(struct atm_vcc * vcc)835*4882a593Smuzhiyun static void close_rx(struct atm_vcc *vcc)
836*4882a593Smuzhiyun {
837*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(wait,current);
838*4882a593Smuzhiyun 	void __iomem *here;
839*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
840*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
843*4882a593Smuzhiyun 	if (!eni_vcc->rx) return;
844*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
845*4882a593Smuzhiyun 	if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
846*4882a593Smuzhiyun 		here = eni_dev->vci+vcc->vci*16;
847*4882a593Smuzhiyun 		/* block receiver */
848*4882a593Smuzhiyun 		writel((readl(here) & ~MID_VCI_MODE) | (MID_MODE_TRASH <<
849*4882a593Smuzhiyun 		    MID_VCI_MODE_SHIFT),here);
850*4882a593Smuzhiyun 		/* wait for receiver to become idle */
851*4882a593Smuzhiyun 		udelay(27);
852*4882a593Smuzhiyun 		/* discard pending cell */
853*4882a593Smuzhiyun 		writel(readl(here) & ~MID_VCI_IN_SERVICE,here);
854*4882a593Smuzhiyun 		/* don't accept any new ones */
855*4882a593Smuzhiyun 		eni_dev->rx_map[vcc->vci] = NULL;
856*4882a593Smuzhiyun 		/* wait for RX queue to drain */
857*4882a593Smuzhiyun 		DPRINTK("eni_close: waiting for RX ...\n");
858*4882a593Smuzhiyun 		EVENT("RX closing\n",0,0);
859*4882a593Smuzhiyun 		add_wait_queue(&eni_dev->rx_wait,&wait);
860*4882a593Smuzhiyun 		set_current_state(TASK_UNINTERRUPTIBLE);
861*4882a593Smuzhiyun 		barrier();
862*4882a593Smuzhiyun 		for (;;) {
863*4882a593Smuzhiyun 			/* transition service->rx: rxing++, servicing-- */
864*4882a593Smuzhiyun 			if (!eni_vcc->servicing) {
865*4882a593Smuzhiyun 				barrier();
866*4882a593Smuzhiyun 				if (!eni_vcc->rxing) break;
867*4882a593Smuzhiyun 			}
868*4882a593Smuzhiyun 			EVENT("drain PDUs (rx %ld, serv %ld)\n",eni_vcc->rxing,
869*4882a593Smuzhiyun 			    eni_vcc->servicing);
870*4882a593Smuzhiyun 			printk(KERN_INFO "%d+%d RX left\n",eni_vcc->servicing,
871*4882a593Smuzhiyun 			    eni_vcc->rxing);
872*4882a593Smuzhiyun 			schedule();
873*4882a593Smuzhiyun 			set_current_state(TASK_UNINTERRUPTIBLE);
874*4882a593Smuzhiyun 		}
875*4882a593Smuzhiyun 		for (;;) {
876*4882a593Smuzhiyun 			int at_end;
877*4882a593Smuzhiyun 			u32 tmp;
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 			tasklet_disable(&eni_dev->task);
880*4882a593Smuzhiyun 			tmp = readl(eni_dev->vci+vcc->vci*16+4) & MID_VCI_READ;
881*4882a593Smuzhiyun 			at_end = eni_vcc->rx_pos == tmp >> MID_VCI_READ_SHIFT;
882*4882a593Smuzhiyun 			tasklet_enable(&eni_dev->task);
883*4882a593Smuzhiyun 			if (at_end) break;
884*4882a593Smuzhiyun 			EVENT("drain discard (host 0x%lx, nic 0x%lx)\n",
885*4882a593Smuzhiyun 			    eni_vcc->rx_pos,tmp);
886*4882a593Smuzhiyun 			printk(KERN_INFO "draining RX: host 0x%lx, nic 0x%x\n",
887*4882a593Smuzhiyun 			    eni_vcc->rx_pos,tmp);
888*4882a593Smuzhiyun 			schedule();
889*4882a593Smuzhiyun 			set_current_state(TASK_UNINTERRUPTIBLE);
890*4882a593Smuzhiyun 		}
891*4882a593Smuzhiyun 		set_current_state(TASK_RUNNING);
892*4882a593Smuzhiyun 		remove_wait_queue(&eni_dev->rx_wait,&wait);
893*4882a593Smuzhiyun 	}
894*4882a593Smuzhiyun 	eni_free_mem(eni_dev,eni_vcc->recv,eni_vcc->words << 2);
895*4882a593Smuzhiyun 	eni_vcc->rx = NULL;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 
start_rx(struct atm_dev * dev)899*4882a593Smuzhiyun static int start_rx(struct atm_dev *dev)
900*4882a593Smuzhiyun {
901*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
904*4882a593Smuzhiyun 	eni_dev->rx_map = (struct atm_vcc **) get_zeroed_page(GFP_KERNEL);
905*4882a593Smuzhiyun 	if (!eni_dev->rx_map) {
906*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): couldn't get free page\n",
907*4882a593Smuzhiyun 		    dev->number);
908*4882a593Smuzhiyun 		free_page((unsigned long) eni_dev->free_list);
909*4882a593Smuzhiyun 		return -ENOMEM;
910*4882a593Smuzhiyun 	}
911*4882a593Smuzhiyun 	eni_dev->rx_mult = DEFAULT_RX_MULT;
912*4882a593Smuzhiyun 	eni_dev->fast = eni_dev->last_fast = NULL;
913*4882a593Smuzhiyun 	eni_dev->slow = eni_dev->last_slow = NULL;
914*4882a593Smuzhiyun 	init_waitqueue_head(&eni_dev->rx_wait);
915*4882a593Smuzhiyun 	skb_queue_head_init(&eni_dev->rx_queue);
916*4882a593Smuzhiyun 	eni_dev->serv_read = eni_in(MID_SERV_WRITE);
917*4882a593Smuzhiyun 	eni_out(0,MID_DMA_WR_RX);
918*4882a593Smuzhiyun 	return 0;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun /*----------------------------------- TX ------------------------------------*/
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun enum enq_res { enq_ok,enq_next,enq_jam };
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 
put_dma(int chan,u32 * dma,int * j,dma_addr_t paddr,u32 size)928*4882a593Smuzhiyun static inline void put_dma(int chan,u32 *dma,int *j,dma_addr_t paddr,
929*4882a593Smuzhiyun     u32 size)
930*4882a593Smuzhiyun {
931*4882a593Smuzhiyun 	u32 init,words;
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	DPRINTK("put_dma: 0x%lx+0x%x\n",(unsigned long) paddr,size);
934*4882a593Smuzhiyun 	EVENT("put_dma: 0x%lx+0x%lx\n",(unsigned long) paddr,size);
935*4882a593Smuzhiyun #if 0 /* don't complain anymore */
936*4882a593Smuzhiyun 	if (paddr & 3)
937*4882a593Smuzhiyun 		printk(KERN_ERR "put_dma: unaligned addr (0x%lx)\n",paddr);
938*4882a593Smuzhiyun 	if (size & 3)
939*4882a593Smuzhiyun 		printk(KERN_ERR "put_dma: unaligned size (0x%lx)\n",size);
940*4882a593Smuzhiyun #endif
941*4882a593Smuzhiyun 	if (paddr & 3) {
942*4882a593Smuzhiyun 		init = 4-(paddr & 3);
943*4882a593Smuzhiyun 		if (init > size || size < 7) init = size;
944*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d/%d bytes\n",
945*4882a593Smuzhiyun 		    (unsigned long) paddr,init,size);
946*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_BYTE | (init << MID_DMA_COUNT_SHIFT) |
947*4882a593Smuzhiyun 		    (chan << MID_DMA_CHAN_SHIFT);
948*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
949*4882a593Smuzhiyun 		paddr += init;
950*4882a593Smuzhiyun 		size -= init;
951*4882a593Smuzhiyun 	}
952*4882a593Smuzhiyun 	words = size >> 2;
953*4882a593Smuzhiyun 	size &= 3;
954*4882a593Smuzhiyun 	if (words && (paddr & 31)) {
955*4882a593Smuzhiyun 		init = 8-((paddr & 31) >> 2);
956*4882a593Smuzhiyun 		if (init > words) init = words;
957*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d/%d words\n",
958*4882a593Smuzhiyun 		    (unsigned long) paddr,init,words);
959*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_WORD | (init << MID_DMA_COUNT_SHIFT) |
960*4882a593Smuzhiyun 		    (chan << MID_DMA_CHAN_SHIFT);
961*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
962*4882a593Smuzhiyun 		paddr += init << 2;
963*4882a593Smuzhiyun 		words -= init;
964*4882a593Smuzhiyun 	}
965*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_16W /* may work with some PCI chipsets ... */
966*4882a593Smuzhiyun 	if (words & ~15) {
967*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d*16/%d words\n",
968*4882a593Smuzhiyun 		    (unsigned long) paddr,words >> 4,words);
969*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_16W | ((words >> 4) << MID_DMA_COUNT_SHIFT)
970*4882a593Smuzhiyun 		    | (chan << MID_DMA_CHAN_SHIFT);
971*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
972*4882a593Smuzhiyun 		paddr += (words & ~15) << 2;
973*4882a593Smuzhiyun 		words &= 15;
974*4882a593Smuzhiyun 	}
975*4882a593Smuzhiyun #endif
976*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_8W /* recommended */
977*4882a593Smuzhiyun 	if (words & ~7) {
978*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d*8/%d words\n",
979*4882a593Smuzhiyun 		    (unsigned long) paddr,words >> 3,words);
980*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_8W | ((words >> 3) << MID_DMA_COUNT_SHIFT)
981*4882a593Smuzhiyun 		    | (chan << MID_DMA_CHAN_SHIFT);
982*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
983*4882a593Smuzhiyun 		paddr += (words & ~7) << 2;
984*4882a593Smuzhiyun 		words &= 7;
985*4882a593Smuzhiyun 	}
986*4882a593Smuzhiyun #endif
987*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_4W /* probably useless if TX_8W or TX_16W */
988*4882a593Smuzhiyun 	if (words & ~3) {
989*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d*4/%d words\n",
990*4882a593Smuzhiyun 		    (unsigned long) paddr,words >> 2,words);
991*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_4W | ((words >> 2) << MID_DMA_COUNT_SHIFT)
992*4882a593Smuzhiyun 		    | (chan << MID_DMA_CHAN_SHIFT);
993*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
994*4882a593Smuzhiyun 		paddr += (words & ~3) << 2;
995*4882a593Smuzhiyun 		words &= 3;
996*4882a593Smuzhiyun 	}
997*4882a593Smuzhiyun #endif
998*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_2W /* probably useless if TX_4W, TX_8W, ... */
999*4882a593Smuzhiyun 	if (words & ~1) {
1000*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d*2/%d words\n",
1001*4882a593Smuzhiyun 		    (unsigned long) paddr,words >> 1,words);
1002*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_2W | ((words >> 1) << MID_DMA_COUNT_SHIFT)
1003*4882a593Smuzhiyun 		    | (chan << MID_DMA_CHAN_SHIFT);
1004*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
1005*4882a593Smuzhiyun 		paddr += (words & ~1) << 2;
1006*4882a593Smuzhiyun 		words &= 1;
1007*4882a593Smuzhiyun 	}
1008*4882a593Smuzhiyun #endif
1009*4882a593Smuzhiyun 	if (words) {
1010*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d words\n",(unsigned long) paddr,
1011*4882a593Smuzhiyun 		    words);
1012*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_WORD | (words << MID_DMA_COUNT_SHIFT) |
1013*4882a593Smuzhiyun 		    (chan << MID_DMA_CHAN_SHIFT);
1014*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
1015*4882a593Smuzhiyun 		paddr += words << 2;
1016*4882a593Smuzhiyun 	}
1017*4882a593Smuzhiyun 	if (size) {
1018*4882a593Smuzhiyun 		DPRINTK("put_dma: %lx DMA: %d bytes\n",(unsigned long) paddr,
1019*4882a593Smuzhiyun 		    size);
1020*4882a593Smuzhiyun 		dma[(*j)++] = MID_DT_BYTE | (size << MID_DMA_COUNT_SHIFT) |
1021*4882a593Smuzhiyun 		    (chan << MID_DMA_CHAN_SHIFT);
1022*4882a593Smuzhiyun 		dma[(*j)++] = paddr;
1023*4882a593Smuzhiyun 	}
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 
do_tx(struct sk_buff * skb)1027*4882a593Smuzhiyun static enum enq_res do_tx(struct sk_buff *skb)
1028*4882a593Smuzhiyun {
1029*4882a593Smuzhiyun 	struct atm_vcc *vcc;
1030*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1031*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
1032*4882a593Smuzhiyun 	struct eni_tx *tx;
1033*4882a593Smuzhiyun 	dma_addr_t paddr;
1034*4882a593Smuzhiyun 	u32 dma_rd,dma_wr;
1035*4882a593Smuzhiyun 	u32 size; /* in words */
1036*4882a593Smuzhiyun 	int aal5,dma_size,i,j;
1037*4882a593Smuzhiyun 	unsigned char skb_data3;
1038*4882a593Smuzhiyun 
1039*4882a593Smuzhiyun 	DPRINTK(">do_tx\n");
1040*4882a593Smuzhiyun 	NULLCHECK(skb);
1041*4882a593Smuzhiyun 	EVENT("do_tx: skb=0x%lx, %ld bytes\n",(unsigned long) skb,skb->len);
1042*4882a593Smuzhiyun 	vcc = ATM_SKB(skb)->vcc;
1043*4882a593Smuzhiyun 	NULLCHECK(vcc);
1044*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
1045*4882a593Smuzhiyun 	NULLCHECK(eni_dev);
1046*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
1047*4882a593Smuzhiyun 	tx = eni_vcc->tx;
1048*4882a593Smuzhiyun 	NULLCHECK(tx);
1049*4882a593Smuzhiyun #if 0 /* Enable this for testing with the "align" program */
1050*4882a593Smuzhiyun 	{
1051*4882a593Smuzhiyun 		unsigned int hack = *((char *) skb->data)-'0';
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 		if (hack < 8) {
1054*4882a593Smuzhiyun 			skb->data += hack;
1055*4882a593Smuzhiyun 			skb->len -= hack;
1056*4882a593Smuzhiyun 		}
1057*4882a593Smuzhiyun 	}
1058*4882a593Smuzhiyun #endif
1059*4882a593Smuzhiyun #if 0 /* should work now */
1060*4882a593Smuzhiyun 	if ((unsigned long) skb->data & 3)
1061*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): VCI %d has mis-aligned "
1062*4882a593Smuzhiyun 		    "TX data\n",vcc->dev->number,vcc->vci);
1063*4882a593Smuzhiyun #endif
1064*4882a593Smuzhiyun 	/*
1065*4882a593Smuzhiyun 	 * Potential future IP speedup: make hard_header big enough to put
1066*4882a593Smuzhiyun 	 * segmentation descriptor directly into PDU. Saves: 4 slave writes,
1067*4882a593Smuzhiyun 	 * 1 DMA xfer & 2 DMA'ed bytes (protocol layering is for wimps :-)
1068*4882a593Smuzhiyun 	 */
1069*4882a593Smuzhiyun 
1070*4882a593Smuzhiyun 	aal5 = vcc->qos.aal == ATM_AAL5;
1071*4882a593Smuzhiyun 	/* check space in buffer */
1072*4882a593Smuzhiyun 	if (!aal5)
1073*4882a593Smuzhiyun 		size = (ATM_CELL_PAYLOAD >> 2)+TX_DESCR_SIZE;
1074*4882a593Smuzhiyun 			/* cell without HEC plus segmentation header (includes
1075*4882a593Smuzhiyun 			   four-byte cell header) */
1076*4882a593Smuzhiyun 	else {
1077*4882a593Smuzhiyun 		size = skb->len+4*AAL5_TRAILER+ATM_CELL_PAYLOAD-1;
1078*4882a593Smuzhiyun 			/* add AAL5 trailer */
1079*4882a593Smuzhiyun 		size = ((size-(size % ATM_CELL_PAYLOAD)) >> 2)+TX_DESCR_SIZE;
1080*4882a593Smuzhiyun 						/* add segmentation header */
1081*4882a593Smuzhiyun 	}
1082*4882a593Smuzhiyun 	/*
1083*4882a593Smuzhiyun 	 * Can I move tx_pos by size bytes without getting closer than TX_GAP
1084*4882a593Smuzhiyun 	 * to the read pointer ? TX_GAP means to leave some space for what
1085*4882a593Smuzhiyun 	 * the manual calls "too close".
1086*4882a593Smuzhiyun 	 */
1087*4882a593Smuzhiyun 	if (!NEPMOK(tx->tx_pos,size+TX_GAP,
1088*4882a593Smuzhiyun 	    eni_in(MID_TX_RDPTR(tx->index)),tx->words)) {
1089*4882a593Smuzhiyun 		DPRINTK(DEV_LABEL "(itf %d): TX full (size %d)\n",
1090*4882a593Smuzhiyun 		    vcc->dev->number,size);
1091*4882a593Smuzhiyun 		return enq_next;
1092*4882a593Smuzhiyun 	}
1093*4882a593Smuzhiyun 	/* check DMA */
1094*4882a593Smuzhiyun 	dma_wr = eni_in(MID_DMA_WR_TX);
1095*4882a593Smuzhiyun 	dma_rd = eni_in(MID_DMA_RD_TX);
1096*4882a593Smuzhiyun 	dma_size = 3; /* JK for descriptor and final fill, plus final size
1097*4882a593Smuzhiyun 			 mis-alignment fix */
1098*4882a593Smuzhiyun DPRINTK("iovcnt = %d\n",skb_shinfo(skb)->nr_frags);
1099*4882a593Smuzhiyun 	if (!skb_shinfo(skb)->nr_frags) dma_size += 5;
1100*4882a593Smuzhiyun 	else dma_size += 5*(skb_shinfo(skb)->nr_frags+1);
1101*4882a593Smuzhiyun 	if (dma_size > TX_DMA_BUF) {
1102*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "(itf %d): needs %d DMA entries "
1103*4882a593Smuzhiyun 		    "(got only %d)\n",vcc->dev->number,dma_size,TX_DMA_BUF);
1104*4882a593Smuzhiyun 	}
1105*4882a593Smuzhiyun 	DPRINTK("dma_wr is %d, tx_pos is %ld\n",dma_wr,tx->tx_pos);
1106*4882a593Smuzhiyun 	if (dma_wr != dma_rd && ((dma_rd+NR_DMA_TX-dma_wr) & (NR_DMA_TX-1)) <
1107*4882a593Smuzhiyun 	     dma_size) {
1108*4882a593Smuzhiyun 		printk(KERN_WARNING DEV_LABEL "(itf %d): TX DMA full\n",
1109*4882a593Smuzhiyun 		    vcc->dev->number);
1110*4882a593Smuzhiyun 		return enq_jam;
1111*4882a593Smuzhiyun 	}
1112*4882a593Smuzhiyun 	skb_data3 = skb->data[3];
1113*4882a593Smuzhiyun 	paddr = dma_map_single(&eni_dev->pci_dev->dev,skb->data,skb->len,
1114*4882a593Smuzhiyun 			       DMA_TO_DEVICE);
1115*4882a593Smuzhiyun 	if (dma_mapping_error(&eni_dev->pci_dev->dev, paddr))
1116*4882a593Smuzhiyun 		return enq_next;
1117*4882a593Smuzhiyun 	ENI_PRV_PADDR(skb) = paddr;
1118*4882a593Smuzhiyun 	/* prepare DMA queue entries */
1119*4882a593Smuzhiyun 	j = 0;
1120*4882a593Smuzhiyun 	eni_dev->dma[j++] = (((tx->tx_pos+TX_DESCR_SIZE) & (tx->words-1)) <<
1121*4882a593Smuzhiyun 	     MID_DMA_COUNT_SHIFT) | (tx->index << MID_DMA_CHAN_SHIFT) |
1122*4882a593Smuzhiyun 	     MID_DT_JK;
1123*4882a593Smuzhiyun 	j++;
1124*4882a593Smuzhiyun 	if (!skb_shinfo(skb)->nr_frags)
1125*4882a593Smuzhiyun 		if (aal5) put_dma(tx->index,eni_dev->dma,&j,paddr,skb->len);
1126*4882a593Smuzhiyun 		else put_dma(tx->index,eni_dev->dma,&j,paddr+4,skb->len-4);
1127*4882a593Smuzhiyun 	else {
1128*4882a593Smuzhiyun DPRINTK("doing direct send\n"); /* @@@ well, this doesn't work anyway */
1129*4882a593Smuzhiyun 		for (i = -1; i < skb_shinfo(skb)->nr_frags; i++)
1130*4882a593Smuzhiyun 			if (i == -1)
1131*4882a593Smuzhiyun 				put_dma(tx->index,eni_dev->dma,&j,(unsigned long)
1132*4882a593Smuzhiyun 				    skb->data,
1133*4882a593Smuzhiyun 				    skb_headlen(skb));
1134*4882a593Smuzhiyun 			else
1135*4882a593Smuzhiyun 				put_dma(tx->index,eni_dev->dma,&j,(unsigned long)
1136*4882a593Smuzhiyun 				    skb_frag_page(&skb_shinfo(skb)->frags[i]) +
1137*4882a593Smuzhiyun 					skb_frag_off(&skb_shinfo(skb)->frags[i]),
1138*4882a593Smuzhiyun 				    skb_frag_size(&skb_shinfo(skb)->frags[i]));
1139*4882a593Smuzhiyun 	}
1140*4882a593Smuzhiyun 	if (skb->len & 3) {
1141*4882a593Smuzhiyun 		put_dma(tx->index, eni_dev->dma, &j, eni_dev->zero.dma,
1142*4882a593Smuzhiyun 			4 - (skb->len & 3));
1143*4882a593Smuzhiyun 	}
1144*4882a593Smuzhiyun 	/* JK for AAL5 trailer - AAL0 doesn't need it, but who cares ... */
1145*4882a593Smuzhiyun 	eni_dev->dma[j++] = (((tx->tx_pos+size) & (tx->words-1)) <<
1146*4882a593Smuzhiyun 	     MID_DMA_COUNT_SHIFT) | (tx->index << MID_DMA_CHAN_SHIFT) |
1147*4882a593Smuzhiyun 	     MID_DMA_END | MID_DT_JK;
1148*4882a593Smuzhiyun 	j++;
1149*4882a593Smuzhiyun 	DPRINTK("DMA at end: %d\n",j);
1150*4882a593Smuzhiyun 	/* store frame */
1151*4882a593Smuzhiyun 	writel((MID_SEG_TX_ID << MID_SEG_ID_SHIFT) |
1152*4882a593Smuzhiyun 	    (aal5 ? MID_SEG_AAL5 : 0) | (tx->prescaler << MID_SEG_PR_SHIFT) |
1153*4882a593Smuzhiyun 	    (tx->resolution << MID_SEG_RATE_SHIFT) |
1154*4882a593Smuzhiyun 	    (size/(ATM_CELL_PAYLOAD/4)),tx->send+tx->tx_pos*4);
1155*4882a593Smuzhiyun /*printk("dsc = 0x%08lx\n",(unsigned long) readl(tx->send+tx->tx_pos*4));*/
1156*4882a593Smuzhiyun 	writel((vcc->vci << MID_SEG_VCI_SHIFT) |
1157*4882a593Smuzhiyun             (aal5 ? 0 : (skb_data3 & 0xf)) |
1158*4882a593Smuzhiyun 	    (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? MID_SEG_CLP : 0),
1159*4882a593Smuzhiyun 	    tx->send+((tx->tx_pos+1) & (tx->words-1))*4);
1160*4882a593Smuzhiyun 	DPRINTK("size: %d, len:%d\n",size,skb->len);
1161*4882a593Smuzhiyun 	if (aal5)
1162*4882a593Smuzhiyun 		writel(skb->len,tx->send+
1163*4882a593Smuzhiyun                     ((tx->tx_pos+size-AAL5_TRAILER) & (tx->words-1))*4);
1164*4882a593Smuzhiyun 	j = j >> 1;
1165*4882a593Smuzhiyun 	for (i = 0; i < j; i++) {
1166*4882a593Smuzhiyun 		writel(eni_dev->dma[i*2],eni_dev->tx_dma+dma_wr*8);
1167*4882a593Smuzhiyun 		writel(eni_dev->dma[i*2+1],eni_dev->tx_dma+dma_wr*8+4);
1168*4882a593Smuzhiyun 		dma_wr = (dma_wr+1) & (NR_DMA_TX-1);
1169*4882a593Smuzhiyun 	}
1170*4882a593Smuzhiyun 	ENI_PRV_POS(skb) = tx->tx_pos;
1171*4882a593Smuzhiyun 	ENI_PRV_SIZE(skb) = size;
1172*4882a593Smuzhiyun 	ENI_VCC(vcc)->txing += size;
1173*4882a593Smuzhiyun 	tx->tx_pos = (tx->tx_pos+size) & (tx->words-1);
1174*4882a593Smuzhiyun 	DPRINTK("dma_wr set to %d, tx_pos is now %ld\n",dma_wr,tx->tx_pos);
1175*4882a593Smuzhiyun 	eni_out(dma_wr,MID_DMA_WR_TX);
1176*4882a593Smuzhiyun 	skb_queue_tail(&eni_dev->tx_queue,skb);
1177*4882a593Smuzhiyun 	queued++;
1178*4882a593Smuzhiyun 	return enq_ok;
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 
poll_tx(struct atm_dev * dev)1182*4882a593Smuzhiyun static void poll_tx(struct atm_dev *dev)
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun 	struct eni_tx *tx;
1185*4882a593Smuzhiyun 	struct sk_buff *skb;
1186*4882a593Smuzhiyun 	enum enq_res res;
1187*4882a593Smuzhiyun 	int i;
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	DPRINTK(">poll_tx\n");
1190*4882a593Smuzhiyun 	for (i = NR_CHAN-1; i >= 0; i--) {
1191*4882a593Smuzhiyun 		tx = &ENI_DEV(dev)->tx[i];
1192*4882a593Smuzhiyun 		if (tx->send)
1193*4882a593Smuzhiyun 			while ((skb = skb_dequeue(&tx->backlog))) {
1194*4882a593Smuzhiyun 				res = do_tx(skb);
1195*4882a593Smuzhiyun 				if (res == enq_ok) continue;
1196*4882a593Smuzhiyun 				DPRINTK("re-queuing TX PDU\n");
1197*4882a593Smuzhiyun 				skb_queue_head(&tx->backlog,skb);
1198*4882a593Smuzhiyun 				requeued++;
1199*4882a593Smuzhiyun 				if (res == enq_jam) return;
1200*4882a593Smuzhiyun 				break;
1201*4882a593Smuzhiyun 			}
1202*4882a593Smuzhiyun 	}
1203*4882a593Smuzhiyun }
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 
dequeue_tx(struct atm_dev * dev)1206*4882a593Smuzhiyun static void dequeue_tx(struct atm_dev *dev)
1207*4882a593Smuzhiyun {
1208*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1209*4882a593Smuzhiyun 	struct atm_vcc *vcc;
1210*4882a593Smuzhiyun 	struct sk_buff *skb;
1211*4882a593Smuzhiyun 	struct eni_tx *tx;
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun 	NULLCHECK(dev);
1214*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1215*4882a593Smuzhiyun 	NULLCHECK(eni_dev);
1216*4882a593Smuzhiyun 	while ((skb = skb_dequeue(&eni_dev->tx_queue))) {
1217*4882a593Smuzhiyun 		vcc = ATM_SKB(skb)->vcc;
1218*4882a593Smuzhiyun 		NULLCHECK(vcc);
1219*4882a593Smuzhiyun 		tx = ENI_VCC(vcc)->tx;
1220*4882a593Smuzhiyun 		NULLCHECK(ENI_VCC(vcc)->tx);
1221*4882a593Smuzhiyun 		DPRINTK("dequeue_tx: next 0x%lx curr 0x%x\n",ENI_PRV_POS(skb),
1222*4882a593Smuzhiyun 		    (unsigned) eni_in(MID_TX_DESCRSTART(tx->index)));
1223*4882a593Smuzhiyun 		if (ENI_VCC(vcc)->txing < tx->words && ENI_PRV_POS(skb) ==
1224*4882a593Smuzhiyun 		    eni_in(MID_TX_DESCRSTART(tx->index))) {
1225*4882a593Smuzhiyun 			skb_queue_head(&eni_dev->tx_queue,skb);
1226*4882a593Smuzhiyun 			break;
1227*4882a593Smuzhiyun 		}
1228*4882a593Smuzhiyun 		ENI_VCC(vcc)->txing -= ENI_PRV_SIZE(skb);
1229*4882a593Smuzhiyun 		dma_unmap_single(&eni_dev->pci_dev->dev,ENI_PRV_PADDR(skb),skb->len,
1230*4882a593Smuzhiyun 				 DMA_TO_DEVICE);
1231*4882a593Smuzhiyun 		if (vcc->pop) vcc->pop(vcc,skb);
1232*4882a593Smuzhiyun 		else dev_kfree_skb_irq(skb);
1233*4882a593Smuzhiyun 		atomic_inc(&vcc->stats->tx);
1234*4882a593Smuzhiyun 		wake_up(&eni_dev->tx_wait);
1235*4882a593Smuzhiyun 		dma_complete++;
1236*4882a593Smuzhiyun 	}
1237*4882a593Smuzhiyun }
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 
alloc_tx(struct eni_dev * eni_dev,int ubr)1240*4882a593Smuzhiyun static struct eni_tx *alloc_tx(struct eni_dev *eni_dev,int ubr)
1241*4882a593Smuzhiyun {
1242*4882a593Smuzhiyun 	int i;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	for (i = !ubr; i < NR_CHAN; i++)
1245*4882a593Smuzhiyun 		if (!eni_dev->tx[i].send) return eni_dev->tx+i;
1246*4882a593Smuzhiyun 	return NULL;
1247*4882a593Smuzhiyun }
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 
comp_tx(struct eni_dev * eni_dev,int * pcr,int reserved,int * pre,int * res,int unlimited)1250*4882a593Smuzhiyun static int comp_tx(struct eni_dev *eni_dev,int *pcr,int reserved,int *pre,
1251*4882a593Smuzhiyun     int *res,int unlimited)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun 	static const int pre_div[] = { 4,16,128,2048 };
1254*4882a593Smuzhiyun 	    /* 2^(((x+2)^2-(x+2))/2+1) */
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 	if (unlimited) *pre = *res = 0;
1257*4882a593Smuzhiyun 	else {
1258*4882a593Smuzhiyun 		if (*pcr > 0) {
1259*4882a593Smuzhiyun 			int div;
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun 			for (*pre = 0; *pre < 3; (*pre)++)
1262*4882a593Smuzhiyun 				if (TS_CLOCK/pre_div[*pre]/64 <= *pcr) break;
1263*4882a593Smuzhiyun 			div = pre_div[*pre]**pcr;
1264*4882a593Smuzhiyun 			DPRINTK("min div %d\n",div);
1265*4882a593Smuzhiyun 			*res = TS_CLOCK/div-1;
1266*4882a593Smuzhiyun 		}
1267*4882a593Smuzhiyun 		else {
1268*4882a593Smuzhiyun 			int div;
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 			if (!*pcr) *pcr = eni_dev->tx_bw+reserved;
1271*4882a593Smuzhiyun 			for (*pre = 3; *pre >= 0; (*pre)--)
1272*4882a593Smuzhiyun 				if (TS_CLOCK/pre_div[*pre]/64 > -*pcr) break;
1273*4882a593Smuzhiyun 			if (*pre < 3) (*pre)++; /* else fail later */
1274*4882a593Smuzhiyun 			div = pre_div[*pre]*-*pcr;
1275*4882a593Smuzhiyun 			DPRINTK("max div %d\n",div);
1276*4882a593Smuzhiyun 			*res = DIV_ROUND_UP(TS_CLOCK, div)-1;
1277*4882a593Smuzhiyun 		}
1278*4882a593Smuzhiyun 		if (*res < 0) *res = 0;
1279*4882a593Smuzhiyun 		if (*res > MID_SEG_MAX_RATE) *res = MID_SEG_MAX_RATE;
1280*4882a593Smuzhiyun 	}
1281*4882a593Smuzhiyun 	*pcr = TS_CLOCK/pre_div[*pre]/(*res+1);
1282*4882a593Smuzhiyun 	DPRINTK("out pcr: %d (%d:%d)\n",*pcr,*pre,*res);
1283*4882a593Smuzhiyun 	return 0;
1284*4882a593Smuzhiyun }
1285*4882a593Smuzhiyun 
1286*4882a593Smuzhiyun 
reserve_or_set_tx(struct atm_vcc * vcc,struct atm_trafprm * txtp,int set_rsv,int set_shp)1287*4882a593Smuzhiyun static int reserve_or_set_tx(struct atm_vcc *vcc,struct atm_trafprm *txtp,
1288*4882a593Smuzhiyun     int set_rsv,int set_shp)
1289*4882a593Smuzhiyun {
1290*4882a593Smuzhiyun 	struct eni_dev *eni_dev = ENI_DEV(vcc->dev);
1291*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc = ENI_VCC(vcc);
1292*4882a593Smuzhiyun 	struct eni_tx *tx;
1293*4882a593Smuzhiyun 	unsigned long size;
1294*4882a593Smuzhiyun 	void __iomem *mem;
1295*4882a593Smuzhiyun 	int rate,ubr,unlimited,new_tx;
1296*4882a593Smuzhiyun 	int pre,res,order;
1297*4882a593Smuzhiyun 	int error;
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 	rate = atm_pcr_goal(txtp);
1300*4882a593Smuzhiyun 	ubr = txtp->traffic_class == ATM_UBR;
1301*4882a593Smuzhiyun 	unlimited = ubr && (!rate || rate <= -ATM_OC3_PCR ||
1302*4882a593Smuzhiyun 	    rate >= ATM_OC3_PCR);
1303*4882a593Smuzhiyun 	if (!unlimited) {
1304*4882a593Smuzhiyun 		size = txtp->max_sdu*eni_dev->tx_mult/100;
1305*4882a593Smuzhiyun 		if (size > MID_MAX_BUF_SIZE && txtp->max_sdu <=
1306*4882a593Smuzhiyun 		    MID_MAX_BUF_SIZE)
1307*4882a593Smuzhiyun 			size = MID_MAX_BUF_SIZE;
1308*4882a593Smuzhiyun 	}
1309*4882a593Smuzhiyun 	else {
1310*4882a593Smuzhiyun 		if (eni_dev->ubr) {
1311*4882a593Smuzhiyun 			eni_vcc->tx = eni_dev->ubr;
1312*4882a593Smuzhiyun 			txtp->pcr = ATM_OC3_PCR;
1313*4882a593Smuzhiyun 			return 0;
1314*4882a593Smuzhiyun 		}
1315*4882a593Smuzhiyun 		size = UBR_BUFFER;
1316*4882a593Smuzhiyun 	}
1317*4882a593Smuzhiyun 	new_tx = !eni_vcc->tx;
1318*4882a593Smuzhiyun 	mem = NULL; /* for gcc */
1319*4882a593Smuzhiyun 	if (!new_tx) tx = eni_vcc->tx;
1320*4882a593Smuzhiyun 	else {
1321*4882a593Smuzhiyun 		mem = eni_alloc_mem(eni_dev,&size);
1322*4882a593Smuzhiyun 		if (!mem) return -ENOBUFS;
1323*4882a593Smuzhiyun 		tx = alloc_tx(eni_dev,unlimited);
1324*4882a593Smuzhiyun 		if (!tx) {
1325*4882a593Smuzhiyun 			eni_free_mem(eni_dev,mem,size);
1326*4882a593Smuzhiyun 			return -EBUSY;
1327*4882a593Smuzhiyun 		}
1328*4882a593Smuzhiyun 		DPRINTK("got chan %d\n",tx->index);
1329*4882a593Smuzhiyun 		tx->reserved = tx->shaping = 0;
1330*4882a593Smuzhiyun 		tx->send = mem;
1331*4882a593Smuzhiyun 		tx->words = size >> 2;
1332*4882a593Smuzhiyun 		skb_queue_head_init(&tx->backlog);
1333*4882a593Smuzhiyun 		for (order = 0; size > (1 << (order+10)); order++);
1334*4882a593Smuzhiyun 		eni_out((order << MID_SIZE_SHIFT) |
1335*4882a593Smuzhiyun 		    ((tx->send-eni_dev->ram) >> (MID_LOC_SKIP+2)),
1336*4882a593Smuzhiyun 		    MID_TX_PLACE(tx->index));
1337*4882a593Smuzhiyun 		tx->tx_pos = eni_in(MID_TX_DESCRSTART(tx->index)) &
1338*4882a593Smuzhiyun 		    MID_DESCR_START;
1339*4882a593Smuzhiyun 	}
1340*4882a593Smuzhiyun 	error = comp_tx(eni_dev,&rate,tx->reserved,&pre,&res,unlimited);
1341*4882a593Smuzhiyun 	if (!error  && txtp->min_pcr > rate) error = -EINVAL;
1342*4882a593Smuzhiyun 	if (!error && txtp->max_pcr && txtp->max_pcr != ATM_MAX_PCR &&
1343*4882a593Smuzhiyun 	    txtp->max_pcr < rate) error = -EINVAL;
1344*4882a593Smuzhiyun 	if (!error && !ubr && rate > eni_dev->tx_bw+tx->reserved)
1345*4882a593Smuzhiyun 		error = -EINVAL;
1346*4882a593Smuzhiyun 	if (!error && set_rsv && !set_shp && rate < tx->shaping)
1347*4882a593Smuzhiyun 		error = -EINVAL;
1348*4882a593Smuzhiyun 	if (!error && !set_rsv && rate > tx->reserved && !ubr)
1349*4882a593Smuzhiyun 		error = -EINVAL;
1350*4882a593Smuzhiyun 	if (error) {
1351*4882a593Smuzhiyun 		if (new_tx) {
1352*4882a593Smuzhiyun 			tx->send = NULL;
1353*4882a593Smuzhiyun 			eni_free_mem(eni_dev,mem,size);
1354*4882a593Smuzhiyun 		}
1355*4882a593Smuzhiyun 		return error;
1356*4882a593Smuzhiyun 	}
1357*4882a593Smuzhiyun 	txtp->pcr = rate;
1358*4882a593Smuzhiyun 	if (set_rsv && !ubr) {
1359*4882a593Smuzhiyun 		eni_dev->tx_bw += tx->reserved;
1360*4882a593Smuzhiyun 		tx->reserved = rate;
1361*4882a593Smuzhiyun 		eni_dev->tx_bw -= rate;
1362*4882a593Smuzhiyun 	}
1363*4882a593Smuzhiyun 	if (set_shp || (unlimited && new_tx)) {
1364*4882a593Smuzhiyun 		if (unlimited && new_tx) eni_dev->ubr = tx;
1365*4882a593Smuzhiyun 		tx->prescaler = pre;
1366*4882a593Smuzhiyun 		tx->resolution = res;
1367*4882a593Smuzhiyun 		tx->shaping = rate;
1368*4882a593Smuzhiyun 	}
1369*4882a593Smuzhiyun 	if (set_shp) eni_vcc->tx = tx;
1370*4882a593Smuzhiyun 	DPRINTK("rsv %d shp %d\n",tx->reserved,tx->shaping);
1371*4882a593Smuzhiyun 	return 0;
1372*4882a593Smuzhiyun }
1373*4882a593Smuzhiyun 
1374*4882a593Smuzhiyun 
open_tx_first(struct atm_vcc * vcc)1375*4882a593Smuzhiyun static int open_tx_first(struct atm_vcc *vcc)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun 	ENI_VCC(vcc)->tx = NULL;
1378*4882a593Smuzhiyun 	if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
1379*4882a593Smuzhiyun 	ENI_VCC(vcc)->txing = 0;
1380*4882a593Smuzhiyun 	return reserve_or_set_tx(vcc,&vcc->qos.txtp,1,1);
1381*4882a593Smuzhiyun }
1382*4882a593Smuzhiyun 
1383*4882a593Smuzhiyun 
open_tx_second(struct atm_vcc * vcc)1384*4882a593Smuzhiyun static int open_tx_second(struct atm_vcc *vcc)
1385*4882a593Smuzhiyun {
1386*4882a593Smuzhiyun 	return 0; /* nothing to do */
1387*4882a593Smuzhiyun }
1388*4882a593Smuzhiyun 
1389*4882a593Smuzhiyun 
close_tx(struct atm_vcc * vcc)1390*4882a593Smuzhiyun static void close_tx(struct atm_vcc *vcc)
1391*4882a593Smuzhiyun {
1392*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(wait,current);
1393*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1394*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	eni_vcc = ENI_VCC(vcc);
1397*4882a593Smuzhiyun 	if (!eni_vcc->tx) return;
1398*4882a593Smuzhiyun 	eni_dev = ENI_DEV(vcc->dev);
1399*4882a593Smuzhiyun 	/* wait for TX queue to drain */
1400*4882a593Smuzhiyun 	DPRINTK("eni_close: waiting for TX ...\n");
1401*4882a593Smuzhiyun 	add_wait_queue(&eni_dev->tx_wait,&wait);
1402*4882a593Smuzhiyun 	set_current_state(TASK_UNINTERRUPTIBLE);
1403*4882a593Smuzhiyun 	for (;;) {
1404*4882a593Smuzhiyun 		int txing;
1405*4882a593Smuzhiyun 
1406*4882a593Smuzhiyun 		tasklet_disable(&eni_dev->task);
1407*4882a593Smuzhiyun 		txing = skb_peek(&eni_vcc->tx->backlog) || eni_vcc->txing;
1408*4882a593Smuzhiyun 		tasklet_enable(&eni_dev->task);
1409*4882a593Smuzhiyun 		if (!txing) break;
1410*4882a593Smuzhiyun 		DPRINTK("%d TX left\n",eni_vcc->txing);
1411*4882a593Smuzhiyun 		schedule();
1412*4882a593Smuzhiyun 		set_current_state(TASK_UNINTERRUPTIBLE);
1413*4882a593Smuzhiyun 	}
1414*4882a593Smuzhiyun 	set_current_state(TASK_RUNNING);
1415*4882a593Smuzhiyun 	remove_wait_queue(&eni_dev->tx_wait,&wait);
1416*4882a593Smuzhiyun 	if (eni_vcc->tx != eni_dev->ubr) {
1417*4882a593Smuzhiyun 		/*
1418*4882a593Smuzhiyun 		 * Looping a few times in here is probably far cheaper than
1419*4882a593Smuzhiyun 		 * keeping track of TX completions all the time, so let's poll
1420*4882a593Smuzhiyun 		 * a bit ...
1421*4882a593Smuzhiyun 		 */
1422*4882a593Smuzhiyun 		while (eni_in(MID_TX_RDPTR(eni_vcc->tx->index)) !=
1423*4882a593Smuzhiyun 		    eni_in(MID_TX_DESCRSTART(eni_vcc->tx->index)))
1424*4882a593Smuzhiyun 			schedule();
1425*4882a593Smuzhiyun 		eni_free_mem(eni_dev,eni_vcc->tx->send,eni_vcc->tx->words << 2);
1426*4882a593Smuzhiyun 		eni_vcc->tx->send = NULL;
1427*4882a593Smuzhiyun 		eni_dev->tx_bw += eni_vcc->tx->reserved;
1428*4882a593Smuzhiyun 	}
1429*4882a593Smuzhiyun 	eni_vcc->tx = NULL;
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 
start_tx(struct atm_dev * dev)1433*4882a593Smuzhiyun static int start_tx(struct atm_dev *dev)
1434*4882a593Smuzhiyun {
1435*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1436*4882a593Smuzhiyun 	int i;
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1439*4882a593Smuzhiyun 	eni_dev->lost = 0;
1440*4882a593Smuzhiyun 	eni_dev->tx_bw = ATM_OC3_PCR;
1441*4882a593Smuzhiyun 	eni_dev->tx_mult = DEFAULT_TX_MULT;
1442*4882a593Smuzhiyun 	init_waitqueue_head(&eni_dev->tx_wait);
1443*4882a593Smuzhiyun 	eni_dev->ubr = NULL;
1444*4882a593Smuzhiyun 	skb_queue_head_init(&eni_dev->tx_queue);
1445*4882a593Smuzhiyun 	eni_out(0,MID_DMA_WR_TX);
1446*4882a593Smuzhiyun 	for (i = 0; i < NR_CHAN; i++) {
1447*4882a593Smuzhiyun 		eni_dev->tx[i].send = NULL;
1448*4882a593Smuzhiyun 		eni_dev->tx[i].index = i;
1449*4882a593Smuzhiyun 	}
1450*4882a593Smuzhiyun 	return 0;
1451*4882a593Smuzhiyun }
1452*4882a593Smuzhiyun 
1453*4882a593Smuzhiyun 
1454*4882a593Smuzhiyun /*--------------------------------- common ----------------------------------*/
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun #if 0 /* may become useful again when tuning things */
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun static void foo(void)
1460*4882a593Smuzhiyun {
1461*4882a593Smuzhiyun printk(KERN_INFO
1462*4882a593Smuzhiyun   "tx_complete=%d,dma_complete=%d,queued=%d,requeued=%d,sub=%d,\n"
1463*4882a593Smuzhiyun   "backlogged=%d,rx_enqueued=%d,rx_dequeued=%d,putting=%d,pushed=%d\n",
1464*4882a593Smuzhiyun   tx_complete,dma_complete,queued,requeued,submitted,backlogged,
1465*4882a593Smuzhiyun   rx_enqueued,rx_dequeued,putting,pushed);
1466*4882a593Smuzhiyun if (eni_boards) printk(KERN_INFO "loss: %ld\n",ENI_DEV(eni_boards)->lost);
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun #endif
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun 
bug_int(struct atm_dev * dev,unsigned long reason)1472*4882a593Smuzhiyun static void bug_int(struct atm_dev *dev,unsigned long reason)
1473*4882a593Smuzhiyun {
1474*4882a593Smuzhiyun 	DPRINTK(">bug_int\n");
1475*4882a593Smuzhiyun 	if (reason & MID_DMA_ERR_ACK)
1476*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "(itf %d): driver error - DMA "
1477*4882a593Smuzhiyun 		    "error\n",dev->number);
1478*4882a593Smuzhiyun 	if (reason & MID_TX_IDENT_MISM)
1479*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "(itf %d): driver error - ident "
1480*4882a593Smuzhiyun 		    "mismatch\n",dev->number);
1481*4882a593Smuzhiyun 	if (reason & MID_TX_DMA_OVFL)
1482*4882a593Smuzhiyun 		printk(KERN_CRIT DEV_LABEL "(itf %d): driver error - DMA "
1483*4882a593Smuzhiyun 		    "overflow\n",dev->number);
1484*4882a593Smuzhiyun 	EVENT("---dump ends here---\n",0,0);
1485*4882a593Smuzhiyun 	printk(KERN_NOTICE "---recent events---\n");
1486*4882a593Smuzhiyun 	event_dump();
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 
eni_int(int irq,void * dev_id)1490*4882a593Smuzhiyun static irqreturn_t eni_int(int irq,void *dev_id)
1491*4882a593Smuzhiyun {
1492*4882a593Smuzhiyun 	struct atm_dev *dev;
1493*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1494*4882a593Smuzhiyun 	u32 reason;
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	DPRINTK(">eni_int\n");
1497*4882a593Smuzhiyun 	dev = dev_id;
1498*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1499*4882a593Smuzhiyun 	reason = eni_in(MID_ISA);
1500*4882a593Smuzhiyun 	DPRINTK(DEV_LABEL ": int 0x%lx\n",(unsigned long) reason);
1501*4882a593Smuzhiyun 	/*
1502*4882a593Smuzhiyun 	 * Must handle these two right now, because reading ISA doesn't clear
1503*4882a593Smuzhiyun 	 * them, so they re-occur and we never make it to the tasklet. Since
1504*4882a593Smuzhiyun 	 * they're rare, we don't mind the occasional invocation of eni_tasklet
1505*4882a593Smuzhiyun 	 * with eni_dev->events == 0.
1506*4882a593Smuzhiyun 	 */
1507*4882a593Smuzhiyun 	if (reason & MID_STAT_OVFL) {
1508*4882a593Smuzhiyun 		EVENT("stat overflow\n",0,0);
1509*4882a593Smuzhiyun 		eni_dev->lost += eni_in(MID_STAT) & MID_OVFL_TRASH;
1510*4882a593Smuzhiyun 	}
1511*4882a593Smuzhiyun 	if (reason & MID_SUNI_INT) {
1512*4882a593Smuzhiyun 		EVENT("SUNI int\n",0,0);
1513*4882a593Smuzhiyun 		dev->phy->interrupt(dev);
1514*4882a593Smuzhiyun #if 0
1515*4882a593Smuzhiyun 		foo();
1516*4882a593Smuzhiyun #endif
1517*4882a593Smuzhiyun 	}
1518*4882a593Smuzhiyun 	spin_lock(&eni_dev->lock);
1519*4882a593Smuzhiyun 	eni_dev->events |= reason;
1520*4882a593Smuzhiyun 	spin_unlock(&eni_dev->lock);
1521*4882a593Smuzhiyun 	tasklet_schedule(&eni_dev->task);
1522*4882a593Smuzhiyun 	return IRQ_HANDLED;
1523*4882a593Smuzhiyun }
1524*4882a593Smuzhiyun 
1525*4882a593Smuzhiyun 
eni_tasklet(unsigned long data)1526*4882a593Smuzhiyun static void eni_tasklet(unsigned long data)
1527*4882a593Smuzhiyun {
1528*4882a593Smuzhiyun 	struct atm_dev *dev = (struct atm_dev *) data;
1529*4882a593Smuzhiyun 	struct eni_dev *eni_dev = ENI_DEV(dev);
1530*4882a593Smuzhiyun 	unsigned long flags;
1531*4882a593Smuzhiyun 	u32 events;
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun 	DPRINTK("eni_tasklet (dev %p)\n",dev);
1534*4882a593Smuzhiyun 	spin_lock_irqsave(&eni_dev->lock,flags);
1535*4882a593Smuzhiyun 	events = xchg(&eni_dev->events,0);
1536*4882a593Smuzhiyun 	spin_unlock_irqrestore(&eni_dev->lock,flags);
1537*4882a593Smuzhiyun 	if (events & MID_RX_DMA_COMPLETE) {
1538*4882a593Smuzhiyun 		EVENT("INT: RX DMA complete, starting dequeue_rx\n",0,0);
1539*4882a593Smuzhiyun 		dequeue_rx(dev);
1540*4882a593Smuzhiyun 		EVENT("dequeue_rx done, starting poll_rx\n",0,0);
1541*4882a593Smuzhiyun 		poll_rx(dev);
1542*4882a593Smuzhiyun 		EVENT("poll_rx done\n",0,0);
1543*4882a593Smuzhiyun 		/* poll_tx ? */
1544*4882a593Smuzhiyun 	}
1545*4882a593Smuzhiyun 	if (events & MID_SERVICE) {
1546*4882a593Smuzhiyun 		EVENT("INT: service, starting get_service\n",0,0);
1547*4882a593Smuzhiyun 		get_service(dev);
1548*4882a593Smuzhiyun 		EVENT("get_service done, starting poll_rx\n",0,0);
1549*4882a593Smuzhiyun 		poll_rx(dev);
1550*4882a593Smuzhiyun 		EVENT("poll_rx done\n",0,0);
1551*4882a593Smuzhiyun 	}
1552*4882a593Smuzhiyun  	if (events & MID_TX_DMA_COMPLETE) {
1553*4882a593Smuzhiyun 		EVENT("INT: TX DMA COMPLETE\n",0,0);
1554*4882a593Smuzhiyun 		dequeue_tx(dev);
1555*4882a593Smuzhiyun 	}
1556*4882a593Smuzhiyun 	if (events & MID_TX_COMPLETE) {
1557*4882a593Smuzhiyun 		EVENT("INT: TX COMPLETE\n",0,0);
1558*4882a593Smuzhiyun 		tx_complete++;
1559*4882a593Smuzhiyun 		wake_up(&eni_dev->tx_wait);
1560*4882a593Smuzhiyun 		/* poll_rx ? */
1561*4882a593Smuzhiyun 	}
1562*4882a593Smuzhiyun 	if (events & (MID_DMA_ERR_ACK | MID_TX_IDENT_MISM | MID_TX_DMA_OVFL)) {
1563*4882a593Smuzhiyun 		EVENT("bug interrupt\n",0,0);
1564*4882a593Smuzhiyun 		bug_int(dev,events);
1565*4882a593Smuzhiyun 	}
1566*4882a593Smuzhiyun 	poll_tx(dev);
1567*4882a593Smuzhiyun }
1568*4882a593Smuzhiyun 
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun /*--------------------------------- entries ---------------------------------*/
1571*4882a593Smuzhiyun 
1572*4882a593Smuzhiyun 
1573*4882a593Smuzhiyun static char * const media_name[] = {
1574*4882a593Smuzhiyun     "MMF", "SMF", "MMF", "03?", /*  0- 3 */
1575*4882a593Smuzhiyun     "UTP", "05?", "06?", "07?", /*  4- 7 */
1576*4882a593Smuzhiyun     "TAXI","09?", "10?", "11?", /*  8-11 */
1577*4882a593Smuzhiyun     "12?", "13?", "14?", "15?", /* 12-15 */
1578*4882a593Smuzhiyun     "MMF", "SMF", "18?", "19?", /* 16-19 */
1579*4882a593Smuzhiyun     "UTP", "21?", "22?", "23?", /* 20-23 */
1580*4882a593Smuzhiyun     "24?", "25?", "26?", "27?", /* 24-27 */
1581*4882a593Smuzhiyun     "28?", "29?", "30?", "31?"  /* 28-31 */
1582*4882a593Smuzhiyun };
1583*4882a593Smuzhiyun 
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun #define SET_SEPROM \
1586*4882a593Smuzhiyun   ({ if (!error && !pci_error) { \
1587*4882a593Smuzhiyun     pci_error = pci_write_config_byte(eni_dev->pci_dev,PCI_TONGA_CTRL,tonga); \
1588*4882a593Smuzhiyun     udelay(10); /* 10 usecs */ \
1589*4882a593Smuzhiyun   } })
1590*4882a593Smuzhiyun #define GET_SEPROM \
1591*4882a593Smuzhiyun   ({ if (!error && !pci_error) { \
1592*4882a593Smuzhiyun     pci_error = pci_read_config_byte(eni_dev->pci_dev,PCI_TONGA_CTRL,&tonga); \
1593*4882a593Smuzhiyun     udelay(10); /* 10 usecs */ \
1594*4882a593Smuzhiyun   } })
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 
get_esi_asic(struct atm_dev * dev)1597*4882a593Smuzhiyun static int get_esi_asic(struct atm_dev *dev)
1598*4882a593Smuzhiyun {
1599*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1600*4882a593Smuzhiyun 	unsigned char tonga;
1601*4882a593Smuzhiyun 	int error,failed,pci_error;
1602*4882a593Smuzhiyun 	int address,i,j;
1603*4882a593Smuzhiyun 
1604*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1605*4882a593Smuzhiyun 	error = pci_error = 0;
1606*4882a593Smuzhiyun 	tonga = SEPROM_MAGIC | SEPROM_DATA | SEPROM_CLK;
1607*4882a593Smuzhiyun 	SET_SEPROM;
1608*4882a593Smuzhiyun 	for (i = 0; i < ESI_LEN && !error && !pci_error; i++) {
1609*4882a593Smuzhiyun 		/* start operation */
1610*4882a593Smuzhiyun 		tonga |= SEPROM_DATA;
1611*4882a593Smuzhiyun 		SET_SEPROM;
1612*4882a593Smuzhiyun 		tonga |= SEPROM_CLK;
1613*4882a593Smuzhiyun 		SET_SEPROM;
1614*4882a593Smuzhiyun 		tonga &= ~SEPROM_DATA;
1615*4882a593Smuzhiyun 		SET_SEPROM;
1616*4882a593Smuzhiyun 		tonga &= ~SEPROM_CLK;
1617*4882a593Smuzhiyun 		SET_SEPROM;
1618*4882a593Smuzhiyun 		/* send address */
1619*4882a593Smuzhiyun 		address = ((i+SEPROM_ESI_BASE) << 1)+1;
1620*4882a593Smuzhiyun 		for (j = 7; j >= 0; j--) {
1621*4882a593Smuzhiyun 			tonga = (address >> j) & 1 ? tonga | SEPROM_DATA :
1622*4882a593Smuzhiyun 			    tonga & ~SEPROM_DATA;
1623*4882a593Smuzhiyun 			SET_SEPROM;
1624*4882a593Smuzhiyun 			tonga |= SEPROM_CLK;
1625*4882a593Smuzhiyun 			SET_SEPROM;
1626*4882a593Smuzhiyun 			tonga &= ~SEPROM_CLK;
1627*4882a593Smuzhiyun 			SET_SEPROM;
1628*4882a593Smuzhiyun 		}
1629*4882a593Smuzhiyun 		/* get ack */
1630*4882a593Smuzhiyun 		tonga |= SEPROM_DATA;
1631*4882a593Smuzhiyun 		SET_SEPROM;
1632*4882a593Smuzhiyun 		tonga |= SEPROM_CLK;
1633*4882a593Smuzhiyun 		SET_SEPROM;
1634*4882a593Smuzhiyun 		GET_SEPROM;
1635*4882a593Smuzhiyun 		failed = tonga & SEPROM_DATA;
1636*4882a593Smuzhiyun 		tonga &= ~SEPROM_CLK;
1637*4882a593Smuzhiyun 		SET_SEPROM;
1638*4882a593Smuzhiyun 		tonga |= SEPROM_DATA;
1639*4882a593Smuzhiyun 		SET_SEPROM;
1640*4882a593Smuzhiyun 		if (failed) error = -EIO;
1641*4882a593Smuzhiyun 		else {
1642*4882a593Smuzhiyun 			dev->esi[i] = 0;
1643*4882a593Smuzhiyun 			for (j = 7; j >= 0; j--) {
1644*4882a593Smuzhiyun 				dev->esi[i] <<= 1;
1645*4882a593Smuzhiyun 				tonga |= SEPROM_DATA;
1646*4882a593Smuzhiyun 				SET_SEPROM;
1647*4882a593Smuzhiyun 				tonga |= SEPROM_CLK;
1648*4882a593Smuzhiyun 				SET_SEPROM;
1649*4882a593Smuzhiyun 				GET_SEPROM;
1650*4882a593Smuzhiyun 				if (tonga & SEPROM_DATA) dev->esi[i] |= 1;
1651*4882a593Smuzhiyun 				tonga &= ~SEPROM_CLK;
1652*4882a593Smuzhiyun 				SET_SEPROM;
1653*4882a593Smuzhiyun 				tonga |= SEPROM_DATA;
1654*4882a593Smuzhiyun 				SET_SEPROM;
1655*4882a593Smuzhiyun 			}
1656*4882a593Smuzhiyun 			/* get ack */
1657*4882a593Smuzhiyun 			tonga |= SEPROM_DATA;
1658*4882a593Smuzhiyun 			SET_SEPROM;
1659*4882a593Smuzhiyun 			tonga |= SEPROM_CLK;
1660*4882a593Smuzhiyun 			SET_SEPROM;
1661*4882a593Smuzhiyun 			GET_SEPROM;
1662*4882a593Smuzhiyun 			if (!(tonga & SEPROM_DATA)) error = -EIO;
1663*4882a593Smuzhiyun 			tonga &= ~SEPROM_CLK;
1664*4882a593Smuzhiyun 			SET_SEPROM;
1665*4882a593Smuzhiyun 			tonga |= SEPROM_DATA;
1666*4882a593Smuzhiyun 			SET_SEPROM;
1667*4882a593Smuzhiyun 		}
1668*4882a593Smuzhiyun 		/* stop operation */
1669*4882a593Smuzhiyun 		tonga &= ~SEPROM_DATA;
1670*4882a593Smuzhiyun 		SET_SEPROM;
1671*4882a593Smuzhiyun 		tonga |= SEPROM_CLK;
1672*4882a593Smuzhiyun 		SET_SEPROM;
1673*4882a593Smuzhiyun 		tonga |= SEPROM_DATA;
1674*4882a593Smuzhiyun 		SET_SEPROM;
1675*4882a593Smuzhiyun 	}
1676*4882a593Smuzhiyun 	if (pci_error) {
1677*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): error reading ESI "
1678*4882a593Smuzhiyun 		    "(0x%02x)\n",dev->number,pci_error);
1679*4882a593Smuzhiyun 		error = -EIO;
1680*4882a593Smuzhiyun 	}
1681*4882a593Smuzhiyun 	return error;
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun 
1685*4882a593Smuzhiyun #undef SET_SEPROM
1686*4882a593Smuzhiyun #undef GET_SEPROM
1687*4882a593Smuzhiyun 
1688*4882a593Smuzhiyun 
get_esi_fpga(struct atm_dev * dev,void __iomem * base)1689*4882a593Smuzhiyun static int get_esi_fpga(struct atm_dev *dev, void __iomem *base)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun 	void __iomem *mac_base;
1692*4882a593Smuzhiyun 	int i;
1693*4882a593Smuzhiyun 
1694*4882a593Smuzhiyun 	mac_base = base+EPROM_SIZE-sizeof(struct midway_eprom);
1695*4882a593Smuzhiyun 	for (i = 0; i < ESI_LEN; i++) dev->esi[i] = readb(mac_base+(i^3));
1696*4882a593Smuzhiyun 	return 0;
1697*4882a593Smuzhiyun }
1698*4882a593Smuzhiyun 
1699*4882a593Smuzhiyun 
eni_do_init(struct atm_dev * dev)1700*4882a593Smuzhiyun static int eni_do_init(struct atm_dev *dev)
1701*4882a593Smuzhiyun {
1702*4882a593Smuzhiyun 	struct midway_eprom __iomem *eprom;
1703*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1704*4882a593Smuzhiyun 	struct pci_dev *pci_dev;
1705*4882a593Smuzhiyun 	unsigned long real_base;
1706*4882a593Smuzhiyun 	void __iomem *base;
1707*4882a593Smuzhiyun 	int error,i,last;
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun 	DPRINTK(">eni_init\n");
1710*4882a593Smuzhiyun 	dev->ci_range.vpi_bits = 0;
1711*4882a593Smuzhiyun 	dev->ci_range.vci_bits = NR_VCI_LD;
1712*4882a593Smuzhiyun 	dev->link_rate = ATM_OC3_PCR;
1713*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1714*4882a593Smuzhiyun 	pci_dev = eni_dev->pci_dev;
1715*4882a593Smuzhiyun 	real_base = pci_resource_start(pci_dev, 0);
1716*4882a593Smuzhiyun 	eni_dev->irq = pci_dev->irq;
1717*4882a593Smuzhiyun 	if ((error = pci_write_config_word(pci_dev,PCI_COMMAND,
1718*4882a593Smuzhiyun 	    PCI_COMMAND_MEMORY |
1719*4882a593Smuzhiyun 	    (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) {
1720*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): can't enable memory "
1721*4882a593Smuzhiyun 		    "(0x%02x)\n",dev->number,error);
1722*4882a593Smuzhiyun 		return -EIO;
1723*4882a593Smuzhiyun 	}
1724*4882a593Smuzhiyun 	printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%lx,irq=%d,",
1725*4882a593Smuzhiyun 	    dev->number,pci_dev->revision,real_base,eni_dev->irq);
1726*4882a593Smuzhiyun 	if (!(base = ioremap(real_base,MAP_MAX_SIZE))) {
1727*4882a593Smuzhiyun 		printk("\n");
1728*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): can't set up page "
1729*4882a593Smuzhiyun 		    "mapping\n",dev->number);
1730*4882a593Smuzhiyun 		return -ENOMEM;
1731*4882a593Smuzhiyun 	}
1732*4882a593Smuzhiyun 	eni_dev->ioaddr = base;
1733*4882a593Smuzhiyun 	eni_dev->base_diff = real_base - (unsigned long) base;
1734*4882a593Smuzhiyun 	/* id may not be present in ASIC Tonga boards - check this @@@ */
1735*4882a593Smuzhiyun 	if (!eni_dev->asic) {
1736*4882a593Smuzhiyun 		eprom = (base+EPROM_SIZE-sizeof(struct midway_eprom));
1737*4882a593Smuzhiyun 		if (readl(&eprom->magic) != ENI155_MAGIC) {
1738*4882a593Smuzhiyun 			printk("\n");
1739*4882a593Smuzhiyun 			printk(KERN_ERR DEV_LABEL
1740*4882a593Smuzhiyun 			       "(itf %d): bad magic - expected 0x%x, got 0x%x\n",
1741*4882a593Smuzhiyun 			       dev->number, ENI155_MAGIC,
1742*4882a593Smuzhiyun 			       (unsigned)readl(&eprom->magic));
1743*4882a593Smuzhiyun 			error = -EINVAL;
1744*4882a593Smuzhiyun 			goto unmap;
1745*4882a593Smuzhiyun 		}
1746*4882a593Smuzhiyun 	}
1747*4882a593Smuzhiyun 	eni_dev->phy = base+PHY_BASE;
1748*4882a593Smuzhiyun 	eni_dev->reg = base+REG_BASE;
1749*4882a593Smuzhiyun 	eni_dev->ram = base+RAM_BASE;
1750*4882a593Smuzhiyun 	last = MAP_MAX_SIZE-RAM_BASE;
1751*4882a593Smuzhiyun 	for (i = last-RAM_INCREMENT; i >= 0; i -= RAM_INCREMENT) {
1752*4882a593Smuzhiyun 		writel(0x55555555,eni_dev->ram+i);
1753*4882a593Smuzhiyun 		if (readl(eni_dev->ram+i) != 0x55555555) last = i;
1754*4882a593Smuzhiyun 		else {
1755*4882a593Smuzhiyun 			writel(0xAAAAAAAA,eni_dev->ram+i);
1756*4882a593Smuzhiyun 			if (readl(eni_dev->ram+i) != 0xAAAAAAAA) last = i;
1757*4882a593Smuzhiyun 			else writel(i,eni_dev->ram+i);
1758*4882a593Smuzhiyun 		}
1759*4882a593Smuzhiyun 	}
1760*4882a593Smuzhiyun 	for (i = 0; i < last; i += RAM_INCREMENT)
1761*4882a593Smuzhiyun 		if (readl(eni_dev->ram+i) != i) break;
1762*4882a593Smuzhiyun 	eni_dev->mem = i;
1763*4882a593Smuzhiyun 	memset_io(eni_dev->ram,0,eni_dev->mem);
1764*4882a593Smuzhiyun 	/* TODO: should shrink allocation now */
1765*4882a593Smuzhiyun 	printk("mem=%dkB (",eni_dev->mem >> 10);
1766*4882a593Smuzhiyun 	/* TODO: check for non-SUNI, check for TAXI ? */
1767*4882a593Smuzhiyun 	if (!(eni_in(MID_RES_ID_MCON) & 0x200) != !eni_dev->asic) {
1768*4882a593Smuzhiyun 		printk(")\n");
1769*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): ERROR - wrong id 0x%x\n",
1770*4882a593Smuzhiyun 		    dev->number,(unsigned) eni_in(MID_RES_ID_MCON));
1771*4882a593Smuzhiyun 		error = -EINVAL;
1772*4882a593Smuzhiyun 		goto unmap;
1773*4882a593Smuzhiyun 	}
1774*4882a593Smuzhiyun 	error = eni_dev->asic ? get_esi_asic(dev) : get_esi_fpga(dev,base);
1775*4882a593Smuzhiyun 	if (error)
1776*4882a593Smuzhiyun 		goto unmap;
1777*4882a593Smuzhiyun 	for (i = 0; i < ESI_LEN; i++)
1778*4882a593Smuzhiyun 		printk("%s%02X",i ? "-" : "",dev->esi[i]);
1779*4882a593Smuzhiyun 	printk(")\n");
1780*4882a593Smuzhiyun 	printk(KERN_NOTICE DEV_LABEL "(itf %d): %s,%s\n",dev->number,
1781*4882a593Smuzhiyun 	    eni_in(MID_RES_ID_MCON) & 0x200 ? "ASIC" : "FPGA",
1782*4882a593Smuzhiyun 	    media_name[eni_in(MID_RES_ID_MCON) & DAUGHTER_ID]);
1783*4882a593Smuzhiyun 
1784*4882a593Smuzhiyun 	error = suni_init(dev);
1785*4882a593Smuzhiyun 	if (error)
1786*4882a593Smuzhiyun 		goto unmap;
1787*4882a593Smuzhiyun out:
1788*4882a593Smuzhiyun 	return error;
1789*4882a593Smuzhiyun unmap:
1790*4882a593Smuzhiyun 	iounmap(base);
1791*4882a593Smuzhiyun 	goto out;
1792*4882a593Smuzhiyun }
1793*4882a593Smuzhiyun 
eni_do_release(struct atm_dev * dev)1794*4882a593Smuzhiyun static void eni_do_release(struct atm_dev *dev)
1795*4882a593Smuzhiyun {
1796*4882a593Smuzhiyun 	struct eni_dev *ed = ENI_DEV(dev);
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun 	dev->phy->stop(dev);
1799*4882a593Smuzhiyun 	dev->phy = NULL;
1800*4882a593Smuzhiyun 	iounmap(ed->ioaddr);
1801*4882a593Smuzhiyun }
1802*4882a593Smuzhiyun 
eni_start(struct atm_dev * dev)1803*4882a593Smuzhiyun static int eni_start(struct atm_dev *dev)
1804*4882a593Smuzhiyun {
1805*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
1806*4882a593Smuzhiyun 
1807*4882a593Smuzhiyun 	void __iomem *buf;
1808*4882a593Smuzhiyun 	unsigned long buffer_mem;
1809*4882a593Smuzhiyun 	int error;
1810*4882a593Smuzhiyun 
1811*4882a593Smuzhiyun 	DPRINTK(">eni_start\n");
1812*4882a593Smuzhiyun 	eni_dev = ENI_DEV(dev);
1813*4882a593Smuzhiyun 	if (request_irq(eni_dev->irq,&eni_int,IRQF_SHARED,DEV_LABEL,dev)) {
1814*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
1815*4882a593Smuzhiyun 		    dev->number,eni_dev->irq);
1816*4882a593Smuzhiyun 		error = -EAGAIN;
1817*4882a593Smuzhiyun 		goto out;
1818*4882a593Smuzhiyun 	}
1819*4882a593Smuzhiyun 	pci_set_master(eni_dev->pci_dev);
1820*4882a593Smuzhiyun 	if ((error = pci_write_config_word(eni_dev->pci_dev,PCI_COMMAND,
1821*4882a593Smuzhiyun 	    PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1822*4882a593Smuzhiyun 	    (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) {
1823*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): can't enable memory+"
1824*4882a593Smuzhiyun 		    "master (0x%02x)\n",dev->number,error);
1825*4882a593Smuzhiyun 		goto free_irq;
1826*4882a593Smuzhiyun 	}
1827*4882a593Smuzhiyun 	if ((error = pci_write_config_byte(eni_dev->pci_dev,PCI_TONGA_CTRL,
1828*4882a593Smuzhiyun 	    END_SWAP_DMA))) {
1829*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): can't set endian swap "
1830*4882a593Smuzhiyun 		    "(0x%02x)\n",dev->number,error);
1831*4882a593Smuzhiyun 		goto free_irq;
1832*4882a593Smuzhiyun 	}
1833*4882a593Smuzhiyun 	/* determine addresses of internal tables */
1834*4882a593Smuzhiyun 	eni_dev->vci = eni_dev->ram;
1835*4882a593Smuzhiyun 	eni_dev->rx_dma = eni_dev->ram+NR_VCI*16;
1836*4882a593Smuzhiyun 	eni_dev->tx_dma = eni_dev->rx_dma+NR_DMA_RX*8;
1837*4882a593Smuzhiyun 	eni_dev->service = eni_dev->tx_dma+NR_DMA_TX*8;
1838*4882a593Smuzhiyun 	buf = eni_dev->service+NR_SERVICE*4;
1839*4882a593Smuzhiyun 	DPRINTK("vci 0x%lx,rx 0x%lx, tx 0x%lx,srv 0x%lx,buf 0x%lx\n",
1840*4882a593Smuzhiyun 	     eni_dev->vci,eni_dev->rx_dma,eni_dev->tx_dma,
1841*4882a593Smuzhiyun 	     eni_dev->service,buf);
1842*4882a593Smuzhiyun 	spin_lock_init(&eni_dev->lock);
1843*4882a593Smuzhiyun 	tasklet_init(&eni_dev->task,eni_tasklet,(unsigned long) dev);
1844*4882a593Smuzhiyun 	eni_dev->events = 0;
1845*4882a593Smuzhiyun 	/* initialize memory management */
1846*4882a593Smuzhiyun 	buffer_mem = eni_dev->mem - (buf - eni_dev->ram);
1847*4882a593Smuzhiyun 	eni_dev->free_list_size = buffer_mem/MID_MIN_BUF_SIZE/2;
1848*4882a593Smuzhiyun 	eni_dev->free_list = kmalloc_array(eni_dev->free_list_size + 1,
1849*4882a593Smuzhiyun 					   sizeof(*eni_dev->free_list),
1850*4882a593Smuzhiyun 					   GFP_KERNEL);
1851*4882a593Smuzhiyun 	if (!eni_dev->free_list) {
1852*4882a593Smuzhiyun 		printk(KERN_ERR DEV_LABEL "(itf %d): couldn't get free page\n",
1853*4882a593Smuzhiyun 		    dev->number);
1854*4882a593Smuzhiyun 		error = -ENOMEM;
1855*4882a593Smuzhiyun 		goto free_irq;
1856*4882a593Smuzhiyun 	}
1857*4882a593Smuzhiyun 	eni_dev->free_len = 0;
1858*4882a593Smuzhiyun 	eni_put_free(eni_dev,buf,buffer_mem);
1859*4882a593Smuzhiyun 	memset_io(eni_dev->vci,0,16*NR_VCI); /* clear VCI table */
1860*4882a593Smuzhiyun 	/*
1861*4882a593Smuzhiyun 	 * byte_addr  free (k)
1862*4882a593Smuzhiyun 	 * 0x00000000     512  VCI table
1863*4882a593Smuzhiyun 	 * 0x00004000	  496  RX DMA
1864*4882a593Smuzhiyun 	 * 0x00005000	  492  TX DMA
1865*4882a593Smuzhiyun 	 * 0x00006000	  488  service list
1866*4882a593Smuzhiyun 	 * 0x00007000	  484  buffers
1867*4882a593Smuzhiyun 	 * 0x00080000	    0  end (512kB)
1868*4882a593Smuzhiyun 	 */
1869*4882a593Smuzhiyun 	eni_out(0xffffffff,MID_IE);
1870*4882a593Smuzhiyun 	error = start_tx(dev);
1871*4882a593Smuzhiyun 	if (error) goto free_list;
1872*4882a593Smuzhiyun 	error = start_rx(dev);
1873*4882a593Smuzhiyun 	if (error) goto free_list;
1874*4882a593Smuzhiyun 	error = dev->phy->start(dev);
1875*4882a593Smuzhiyun 	if (error) goto free_list;
1876*4882a593Smuzhiyun 	eni_out(eni_in(MID_MC_S) | (1 << MID_INT_SEL_SHIFT) |
1877*4882a593Smuzhiyun 	    MID_TX_LOCK_MODE | MID_DMA_ENABLE | MID_TX_ENABLE | MID_RX_ENABLE,
1878*4882a593Smuzhiyun 	    MID_MC_S);
1879*4882a593Smuzhiyun 	    /* Tonga uses SBus INTReq1 */
1880*4882a593Smuzhiyun 	(void) eni_in(MID_ISA); /* clear Midway interrupts */
1881*4882a593Smuzhiyun 	return 0;
1882*4882a593Smuzhiyun 
1883*4882a593Smuzhiyun free_list:
1884*4882a593Smuzhiyun 	kfree(eni_dev->free_list);
1885*4882a593Smuzhiyun 
1886*4882a593Smuzhiyun free_irq:
1887*4882a593Smuzhiyun 	free_irq(eni_dev->irq, dev);
1888*4882a593Smuzhiyun 
1889*4882a593Smuzhiyun out:
1890*4882a593Smuzhiyun 	return error;
1891*4882a593Smuzhiyun }
1892*4882a593Smuzhiyun 
1893*4882a593Smuzhiyun 
eni_close(struct atm_vcc * vcc)1894*4882a593Smuzhiyun static void eni_close(struct atm_vcc *vcc)
1895*4882a593Smuzhiyun {
1896*4882a593Smuzhiyun 	DPRINTK(">eni_close\n");
1897*4882a593Smuzhiyun 	if (!ENI_VCC(vcc)) return;
1898*4882a593Smuzhiyun 	clear_bit(ATM_VF_READY,&vcc->flags);
1899*4882a593Smuzhiyun 	close_rx(vcc);
1900*4882a593Smuzhiyun 	close_tx(vcc);
1901*4882a593Smuzhiyun 	DPRINTK("eni_close: done waiting\n");
1902*4882a593Smuzhiyun 	/* deallocate memory */
1903*4882a593Smuzhiyun 	kfree(ENI_VCC(vcc));
1904*4882a593Smuzhiyun 	vcc->dev_data = NULL;
1905*4882a593Smuzhiyun 	clear_bit(ATM_VF_ADDR,&vcc->flags);
1906*4882a593Smuzhiyun 	/*foo();*/
1907*4882a593Smuzhiyun }
1908*4882a593Smuzhiyun 
1909*4882a593Smuzhiyun 
eni_open(struct atm_vcc * vcc)1910*4882a593Smuzhiyun static int eni_open(struct atm_vcc *vcc)
1911*4882a593Smuzhiyun {
1912*4882a593Smuzhiyun 	struct eni_vcc *eni_vcc;
1913*4882a593Smuzhiyun 	int error;
1914*4882a593Smuzhiyun 	short vpi = vcc->vpi;
1915*4882a593Smuzhiyun 	int vci = vcc->vci;
1916*4882a593Smuzhiyun 
1917*4882a593Smuzhiyun 	DPRINTK(">eni_open\n");
1918*4882a593Smuzhiyun 	EVENT("eni_open\n",0,0);
1919*4882a593Smuzhiyun 	if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1920*4882a593Smuzhiyun 		vcc->dev_data = NULL;
1921*4882a593Smuzhiyun 	if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
1922*4882a593Smuzhiyun 		set_bit(ATM_VF_ADDR,&vcc->flags);
1923*4882a593Smuzhiyun 	if (vcc->qos.aal != ATM_AAL0 && vcc->qos.aal != ATM_AAL5)
1924*4882a593Smuzhiyun 		return -EINVAL;
1925*4882a593Smuzhiyun 	DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n",vcc->dev->number,vcc->vpi,
1926*4882a593Smuzhiyun 	    vcc->vci);
1927*4882a593Smuzhiyun 	if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) {
1928*4882a593Smuzhiyun 		eni_vcc = kmalloc(sizeof(struct eni_vcc),GFP_KERNEL);
1929*4882a593Smuzhiyun 		if (!eni_vcc) return -ENOMEM;
1930*4882a593Smuzhiyun 		vcc->dev_data = eni_vcc;
1931*4882a593Smuzhiyun 		eni_vcc->tx = NULL; /* for eni_close after open_rx */
1932*4882a593Smuzhiyun 		if ((error = open_rx_first(vcc))) {
1933*4882a593Smuzhiyun 			eni_close(vcc);
1934*4882a593Smuzhiyun 			return error;
1935*4882a593Smuzhiyun 		}
1936*4882a593Smuzhiyun 		if ((error = open_tx_first(vcc))) {
1937*4882a593Smuzhiyun 			eni_close(vcc);
1938*4882a593Smuzhiyun 			return error;
1939*4882a593Smuzhiyun 		}
1940*4882a593Smuzhiyun 	}
1941*4882a593Smuzhiyun 	if (vci == ATM_VPI_UNSPEC || vpi == ATM_VCI_UNSPEC) return 0;
1942*4882a593Smuzhiyun 	if ((error = open_rx_second(vcc))) {
1943*4882a593Smuzhiyun 		eni_close(vcc);
1944*4882a593Smuzhiyun 		return error;
1945*4882a593Smuzhiyun 	}
1946*4882a593Smuzhiyun 	if ((error = open_tx_second(vcc))) {
1947*4882a593Smuzhiyun 		eni_close(vcc);
1948*4882a593Smuzhiyun 		return error;
1949*4882a593Smuzhiyun 	}
1950*4882a593Smuzhiyun 	set_bit(ATM_VF_READY,&vcc->flags);
1951*4882a593Smuzhiyun 	/* should power down SUNI while !ref_count @@@ */
1952*4882a593Smuzhiyun 	return 0;
1953*4882a593Smuzhiyun }
1954*4882a593Smuzhiyun 
1955*4882a593Smuzhiyun 
eni_change_qos(struct atm_vcc * vcc,struct atm_qos * qos,int flgs)1956*4882a593Smuzhiyun static int eni_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flgs)
1957*4882a593Smuzhiyun {
1958*4882a593Smuzhiyun 	struct eni_dev *eni_dev = ENI_DEV(vcc->dev);
1959*4882a593Smuzhiyun 	struct eni_tx *tx = ENI_VCC(vcc)->tx;
1960*4882a593Smuzhiyun 	struct sk_buff *skb;
1961*4882a593Smuzhiyun 	int error,rate,rsv,shp;
1962*4882a593Smuzhiyun 
1963*4882a593Smuzhiyun 	if (qos->txtp.traffic_class == ATM_NONE) return 0;
1964*4882a593Smuzhiyun 	if (tx == eni_dev->ubr) return -EBADFD;
1965*4882a593Smuzhiyun 	rate = atm_pcr_goal(&qos->txtp);
1966*4882a593Smuzhiyun 	if (rate < 0) rate = -rate;
1967*4882a593Smuzhiyun 	rsv = shp = 0;
1968*4882a593Smuzhiyun 	if ((flgs & ATM_MF_DEC_RSV) && rate && rate < tx->reserved) rsv = 1;
1969*4882a593Smuzhiyun 	if ((flgs & ATM_MF_INC_RSV) && (!rate || rate > tx->reserved)) rsv = 1;
1970*4882a593Smuzhiyun 	if ((flgs & ATM_MF_DEC_SHP) && rate && rate < tx->shaping) shp = 1;
1971*4882a593Smuzhiyun 	if ((flgs & ATM_MF_INC_SHP) && (!rate || rate > tx->shaping)) shp = 1;
1972*4882a593Smuzhiyun 	if (!rsv && !shp) return 0;
1973*4882a593Smuzhiyun 	error = reserve_or_set_tx(vcc,&qos->txtp,rsv,shp);
1974*4882a593Smuzhiyun 	if (error) return error;
1975*4882a593Smuzhiyun 	if (shp && !(flgs & ATM_MF_IMMED)) return 0;
1976*4882a593Smuzhiyun 	/*
1977*4882a593Smuzhiyun 	 * Walk through the send buffer and patch the rate information in all
1978*4882a593Smuzhiyun 	 * segmentation buffer descriptors of this VCC.
1979*4882a593Smuzhiyun 	 */
1980*4882a593Smuzhiyun 	tasklet_disable(&eni_dev->task);
1981*4882a593Smuzhiyun 	skb_queue_walk(&eni_dev->tx_queue, skb) {
1982*4882a593Smuzhiyun 		void __iomem *dsc;
1983*4882a593Smuzhiyun 
1984*4882a593Smuzhiyun 		if (ATM_SKB(skb)->vcc != vcc) continue;
1985*4882a593Smuzhiyun 		dsc = tx->send+ENI_PRV_POS(skb)*4;
1986*4882a593Smuzhiyun 		writel((readl(dsc) & ~(MID_SEG_RATE | MID_SEG_PR)) |
1987*4882a593Smuzhiyun 		    (tx->prescaler << MID_SEG_PR_SHIFT) |
1988*4882a593Smuzhiyun 		    (tx->resolution << MID_SEG_RATE_SHIFT), dsc);
1989*4882a593Smuzhiyun 	}
1990*4882a593Smuzhiyun 	tasklet_enable(&eni_dev->task);
1991*4882a593Smuzhiyun 	return 0;
1992*4882a593Smuzhiyun }
1993*4882a593Smuzhiyun 
1994*4882a593Smuzhiyun 
eni_ioctl(struct atm_dev * dev,unsigned int cmd,void __user * arg)1995*4882a593Smuzhiyun static int eni_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1996*4882a593Smuzhiyun {
1997*4882a593Smuzhiyun 	struct eni_dev *eni_dev = ENI_DEV(dev);
1998*4882a593Smuzhiyun 
1999*4882a593Smuzhiyun 	if (cmd == ENI_MEMDUMP) {
2000*4882a593Smuzhiyun 		if (!capable(CAP_NET_ADMIN)) return -EPERM;
2001*4882a593Smuzhiyun 		printk(KERN_WARNING "Please use /proc/atm/" DEV_LABEL ":%d "
2002*4882a593Smuzhiyun 		    "instead of obsolete ioctl ENI_MEMDUMP\n",dev->number);
2003*4882a593Smuzhiyun 		dump(dev);
2004*4882a593Smuzhiyun 		return 0;
2005*4882a593Smuzhiyun 	}
2006*4882a593Smuzhiyun 	if (cmd == ENI_SETMULT) {
2007*4882a593Smuzhiyun 		struct eni_multipliers mult;
2008*4882a593Smuzhiyun 
2009*4882a593Smuzhiyun 		if (!capable(CAP_NET_ADMIN)) return -EPERM;
2010*4882a593Smuzhiyun 		if (copy_from_user(&mult, arg,
2011*4882a593Smuzhiyun 		    sizeof(struct eni_multipliers)))
2012*4882a593Smuzhiyun 			return -EFAULT;
2013*4882a593Smuzhiyun 		if ((mult.tx && mult.tx <= 100) || (mult.rx &&mult.rx <= 100) ||
2014*4882a593Smuzhiyun 		    mult.tx > 65536 || mult.rx > 65536)
2015*4882a593Smuzhiyun 			return -EINVAL;
2016*4882a593Smuzhiyun 		if (mult.tx) eni_dev->tx_mult = mult.tx;
2017*4882a593Smuzhiyun 		if (mult.rx) eni_dev->rx_mult = mult.rx;
2018*4882a593Smuzhiyun 		return 0;
2019*4882a593Smuzhiyun 	}
2020*4882a593Smuzhiyun 	if (cmd == ATM_SETCIRANGE) {
2021*4882a593Smuzhiyun 		struct atm_cirange ci;
2022*4882a593Smuzhiyun 
2023*4882a593Smuzhiyun 		if (copy_from_user(&ci, arg,sizeof(struct atm_cirange)))
2024*4882a593Smuzhiyun 			return -EFAULT;
2025*4882a593Smuzhiyun 		if ((ci.vpi_bits == 0 || ci.vpi_bits == ATM_CI_MAX) &&
2026*4882a593Smuzhiyun 		    (ci.vci_bits == NR_VCI_LD || ci.vpi_bits == ATM_CI_MAX))
2027*4882a593Smuzhiyun 		    return 0;
2028*4882a593Smuzhiyun 		return -EINVAL;
2029*4882a593Smuzhiyun 	}
2030*4882a593Smuzhiyun 	if (!dev->phy->ioctl) return -ENOIOCTLCMD;
2031*4882a593Smuzhiyun 	return dev->phy->ioctl(dev,cmd,arg);
2032*4882a593Smuzhiyun }
2033*4882a593Smuzhiyun 
eni_send(struct atm_vcc * vcc,struct sk_buff * skb)2034*4882a593Smuzhiyun static int eni_send(struct atm_vcc *vcc,struct sk_buff *skb)
2035*4882a593Smuzhiyun {
2036*4882a593Smuzhiyun 	enum enq_res res;
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun 	DPRINTK(">eni_send\n");
2039*4882a593Smuzhiyun 	if (!ENI_VCC(vcc)->tx) {
2040*4882a593Smuzhiyun 		if (vcc->pop) vcc->pop(vcc,skb);
2041*4882a593Smuzhiyun 		else dev_kfree_skb(skb);
2042*4882a593Smuzhiyun 		return -EINVAL;
2043*4882a593Smuzhiyun 	}
2044*4882a593Smuzhiyun 	if (!skb) {
2045*4882a593Smuzhiyun 		printk(KERN_CRIT "!skb in eni_send ?\n");
2046*4882a593Smuzhiyun 		if (vcc->pop) vcc->pop(vcc,skb);
2047*4882a593Smuzhiyun 		return -EINVAL;
2048*4882a593Smuzhiyun 	}
2049*4882a593Smuzhiyun 	if (vcc->qos.aal == ATM_AAL0) {
2050*4882a593Smuzhiyun 		if (skb->len != ATM_CELL_SIZE-1) {
2051*4882a593Smuzhiyun 			if (vcc->pop) vcc->pop(vcc,skb);
2052*4882a593Smuzhiyun 			else dev_kfree_skb(skb);
2053*4882a593Smuzhiyun 			return -EINVAL;
2054*4882a593Smuzhiyun 		}
2055*4882a593Smuzhiyun 		*(u32 *) skb->data = htonl(*(u32 *) skb->data);
2056*4882a593Smuzhiyun 	}
2057*4882a593Smuzhiyun 	submitted++;
2058*4882a593Smuzhiyun 	ATM_SKB(skb)->vcc = vcc;
2059*4882a593Smuzhiyun 	tasklet_disable(&ENI_DEV(vcc->dev)->task);
2060*4882a593Smuzhiyun 	res = do_tx(skb);
2061*4882a593Smuzhiyun 	tasklet_enable(&ENI_DEV(vcc->dev)->task);
2062*4882a593Smuzhiyun 	if (res == enq_ok) return 0;
2063*4882a593Smuzhiyun 	skb_queue_tail(&ENI_VCC(vcc)->tx->backlog,skb);
2064*4882a593Smuzhiyun 	backlogged++;
2065*4882a593Smuzhiyun 	tasklet_schedule(&ENI_DEV(vcc->dev)->task);
2066*4882a593Smuzhiyun 	return 0;
2067*4882a593Smuzhiyun }
2068*4882a593Smuzhiyun 
eni_phy_put(struct atm_dev * dev,unsigned char value,unsigned long addr)2069*4882a593Smuzhiyun static void eni_phy_put(struct atm_dev *dev,unsigned char value,
2070*4882a593Smuzhiyun     unsigned long addr)
2071*4882a593Smuzhiyun {
2072*4882a593Smuzhiyun 	writel(value,ENI_DEV(dev)->phy+addr*4);
2073*4882a593Smuzhiyun }
2074*4882a593Smuzhiyun 
2075*4882a593Smuzhiyun 
2076*4882a593Smuzhiyun 
eni_phy_get(struct atm_dev * dev,unsigned long addr)2077*4882a593Smuzhiyun static unsigned char eni_phy_get(struct atm_dev *dev,unsigned long addr)
2078*4882a593Smuzhiyun {
2079*4882a593Smuzhiyun 	return readl(ENI_DEV(dev)->phy+addr*4);
2080*4882a593Smuzhiyun }
2081*4882a593Smuzhiyun 
2082*4882a593Smuzhiyun 
eni_proc_read(struct atm_dev * dev,loff_t * pos,char * page)2083*4882a593Smuzhiyun static int eni_proc_read(struct atm_dev *dev,loff_t *pos,char *page)
2084*4882a593Smuzhiyun {
2085*4882a593Smuzhiyun 	struct sock *s;
2086*4882a593Smuzhiyun 	static const char *signal[] = { "LOST","unknown","okay" };
2087*4882a593Smuzhiyun 	struct eni_dev *eni_dev = ENI_DEV(dev);
2088*4882a593Smuzhiyun 	struct atm_vcc *vcc;
2089*4882a593Smuzhiyun 	int left,i;
2090*4882a593Smuzhiyun 
2091*4882a593Smuzhiyun 	left = *pos;
2092*4882a593Smuzhiyun 	if (!left)
2093*4882a593Smuzhiyun 		return sprintf(page,DEV_LABEL "(itf %d) signal %s, %dkB, "
2094*4882a593Smuzhiyun 		    "%d cps remaining\n",dev->number,signal[(int) dev->signal],
2095*4882a593Smuzhiyun 		    eni_dev->mem >> 10,eni_dev->tx_bw);
2096*4882a593Smuzhiyun 	if (!--left)
2097*4882a593Smuzhiyun 		return sprintf(page,"%4sBursts: TX"
2098*4882a593Smuzhiyun #if !defined(CONFIG_ATM_ENI_BURST_TX_16W) && \
2099*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_TX_8W) && \
2100*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_TX_4W) && \
2101*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_TX_2W)
2102*4882a593Smuzhiyun 		    " none"
2103*4882a593Smuzhiyun #endif
2104*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_16W
2105*4882a593Smuzhiyun 		    " 16W"
2106*4882a593Smuzhiyun #endif
2107*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_8W
2108*4882a593Smuzhiyun 		    " 8W"
2109*4882a593Smuzhiyun #endif
2110*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_4W
2111*4882a593Smuzhiyun 		    " 4W"
2112*4882a593Smuzhiyun #endif
2113*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_TX_2W
2114*4882a593Smuzhiyun 		    " 2W"
2115*4882a593Smuzhiyun #endif
2116*4882a593Smuzhiyun 		    ", RX"
2117*4882a593Smuzhiyun #if !defined(CONFIG_ATM_ENI_BURST_RX_16W) && \
2118*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_RX_8W) && \
2119*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_RX_4W) && \
2120*4882a593Smuzhiyun     !defined(CONFIG_ATM_ENI_BURST_RX_2W)
2121*4882a593Smuzhiyun 		    " none"
2122*4882a593Smuzhiyun #endif
2123*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_16W
2124*4882a593Smuzhiyun 		    " 16W"
2125*4882a593Smuzhiyun #endif
2126*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_8W
2127*4882a593Smuzhiyun 		    " 8W"
2128*4882a593Smuzhiyun #endif
2129*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_4W
2130*4882a593Smuzhiyun 		    " 4W"
2131*4882a593Smuzhiyun #endif
2132*4882a593Smuzhiyun #ifdef CONFIG_ATM_ENI_BURST_RX_2W
2133*4882a593Smuzhiyun 		    " 2W"
2134*4882a593Smuzhiyun #endif
2135*4882a593Smuzhiyun #ifndef CONFIG_ATM_ENI_TUNE_BURST
2136*4882a593Smuzhiyun 		    " (default)"
2137*4882a593Smuzhiyun #endif
2138*4882a593Smuzhiyun 		    "\n","");
2139*4882a593Smuzhiyun 	if (!--left)
2140*4882a593Smuzhiyun 		return sprintf(page,"%4sBuffer multipliers: tx %d%%, rx %d%%\n",
2141*4882a593Smuzhiyun 		    "",eni_dev->tx_mult,eni_dev->rx_mult);
2142*4882a593Smuzhiyun 	for (i = 0; i < NR_CHAN; i++) {
2143*4882a593Smuzhiyun 		struct eni_tx *tx = eni_dev->tx+i;
2144*4882a593Smuzhiyun 
2145*4882a593Smuzhiyun 		if (!tx->send) continue;
2146*4882a593Smuzhiyun 		if (!--left) {
2147*4882a593Smuzhiyun 			return sprintf(page, "tx[%d]:    0x%lx-0x%lx "
2148*4882a593Smuzhiyun 			    "(%6ld bytes), rsv %d cps, shp %d cps%s\n",i,
2149*4882a593Smuzhiyun 			    (unsigned long) (tx->send - eni_dev->ram),
2150*4882a593Smuzhiyun 			    tx->send-eni_dev->ram+tx->words*4-1,tx->words*4,
2151*4882a593Smuzhiyun 			    tx->reserved,tx->shaping,
2152*4882a593Smuzhiyun 			    tx == eni_dev->ubr ? " (UBR)" : "");
2153*4882a593Smuzhiyun 		}
2154*4882a593Smuzhiyun 		if (--left) continue;
2155*4882a593Smuzhiyun 		return sprintf(page,"%10sbacklog %u packets\n","",
2156*4882a593Smuzhiyun 		    skb_queue_len(&tx->backlog));
2157*4882a593Smuzhiyun 	}
2158*4882a593Smuzhiyun 	read_lock(&vcc_sklist_lock);
2159*4882a593Smuzhiyun 	for(i = 0; i < VCC_HTABLE_SIZE; ++i) {
2160*4882a593Smuzhiyun 		struct hlist_head *head = &vcc_hash[i];
2161*4882a593Smuzhiyun 
2162*4882a593Smuzhiyun 		sk_for_each(s, head) {
2163*4882a593Smuzhiyun 			struct eni_vcc *eni_vcc;
2164*4882a593Smuzhiyun 			int length;
2165*4882a593Smuzhiyun 
2166*4882a593Smuzhiyun 			vcc = atm_sk(s);
2167*4882a593Smuzhiyun 			if (vcc->dev != dev)
2168*4882a593Smuzhiyun 				continue;
2169*4882a593Smuzhiyun 			eni_vcc = ENI_VCC(vcc);
2170*4882a593Smuzhiyun 			if (--left) continue;
2171*4882a593Smuzhiyun 			length = sprintf(page,"vcc %4d: ",vcc->vci);
2172*4882a593Smuzhiyun 			if (eni_vcc->rx) {
2173*4882a593Smuzhiyun 				length += sprintf(page+length, "0x%lx-0x%lx "
2174*4882a593Smuzhiyun 				    "(%6ld bytes)",
2175*4882a593Smuzhiyun 				    (unsigned long) (eni_vcc->recv - eni_dev->ram),
2176*4882a593Smuzhiyun 				    eni_vcc->recv-eni_dev->ram+eni_vcc->words*4-1,
2177*4882a593Smuzhiyun 				    eni_vcc->words*4);
2178*4882a593Smuzhiyun 				if (eni_vcc->tx) length += sprintf(page+length,", ");
2179*4882a593Smuzhiyun 			}
2180*4882a593Smuzhiyun 			if (eni_vcc->tx)
2181*4882a593Smuzhiyun 				length += sprintf(page+length,"tx[%d], txing %d bytes",
2182*4882a593Smuzhiyun 				    eni_vcc->tx->index,eni_vcc->txing);
2183*4882a593Smuzhiyun 			page[length] = '\n';
2184*4882a593Smuzhiyun 			read_unlock(&vcc_sklist_lock);
2185*4882a593Smuzhiyun 			return length+1;
2186*4882a593Smuzhiyun 		}
2187*4882a593Smuzhiyun 	}
2188*4882a593Smuzhiyun 	read_unlock(&vcc_sklist_lock);
2189*4882a593Smuzhiyun 	for (i = 0; i < eni_dev->free_len; i++) {
2190*4882a593Smuzhiyun 		struct eni_free *fe = eni_dev->free_list+i;
2191*4882a593Smuzhiyun 		unsigned long offset;
2192*4882a593Smuzhiyun 
2193*4882a593Smuzhiyun 		if (--left) continue;
2194*4882a593Smuzhiyun 		offset = (unsigned long) eni_dev->ram+eni_dev->base_diff;
2195*4882a593Smuzhiyun 		return sprintf(page,"free      %p-%p (%6d bytes)\n",
2196*4882a593Smuzhiyun 		    fe->start-offset,fe->start-offset+(1 << fe->order)-1,
2197*4882a593Smuzhiyun 		    1 << fe->order);
2198*4882a593Smuzhiyun 	}
2199*4882a593Smuzhiyun 	return 0;
2200*4882a593Smuzhiyun }
2201*4882a593Smuzhiyun 
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun static const struct atmdev_ops ops = {
2204*4882a593Smuzhiyun 	.open		= eni_open,
2205*4882a593Smuzhiyun 	.close		= eni_close,
2206*4882a593Smuzhiyun 	.ioctl		= eni_ioctl,
2207*4882a593Smuzhiyun 	.send		= eni_send,
2208*4882a593Smuzhiyun 	.phy_put	= eni_phy_put,
2209*4882a593Smuzhiyun 	.phy_get	= eni_phy_get,
2210*4882a593Smuzhiyun 	.change_qos	= eni_change_qos,
2211*4882a593Smuzhiyun 	.proc_read	= eni_proc_read
2212*4882a593Smuzhiyun };
2213*4882a593Smuzhiyun 
2214*4882a593Smuzhiyun 
eni_init_one(struct pci_dev * pci_dev,const struct pci_device_id * ent)2215*4882a593Smuzhiyun static int eni_init_one(struct pci_dev *pci_dev,
2216*4882a593Smuzhiyun 			const struct pci_device_id *ent)
2217*4882a593Smuzhiyun {
2218*4882a593Smuzhiyun 	struct atm_dev *dev;
2219*4882a593Smuzhiyun 	struct eni_dev *eni_dev;
2220*4882a593Smuzhiyun 	struct eni_zero *zero;
2221*4882a593Smuzhiyun 	int rc;
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	rc = pci_enable_device(pci_dev);
2224*4882a593Smuzhiyun 	if (rc < 0)
2225*4882a593Smuzhiyun 		goto out;
2226*4882a593Smuzhiyun 
2227*4882a593Smuzhiyun 	rc = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32));
2228*4882a593Smuzhiyun 	if (rc < 0)
2229*4882a593Smuzhiyun 		goto err_disable;
2230*4882a593Smuzhiyun 
2231*4882a593Smuzhiyun 	rc = -ENOMEM;
2232*4882a593Smuzhiyun 	eni_dev = kmalloc(sizeof(struct eni_dev), GFP_KERNEL);
2233*4882a593Smuzhiyun 	if (!eni_dev)
2234*4882a593Smuzhiyun 		goto err_disable;
2235*4882a593Smuzhiyun 
2236*4882a593Smuzhiyun 	zero = &eni_dev->zero;
2237*4882a593Smuzhiyun 	zero->addr = dma_alloc_coherent(&pci_dev->dev,
2238*4882a593Smuzhiyun 					ENI_ZEROES_SIZE, &zero->dma, GFP_KERNEL);
2239*4882a593Smuzhiyun 	if (!zero->addr)
2240*4882a593Smuzhiyun 		goto err_kfree;
2241*4882a593Smuzhiyun 
2242*4882a593Smuzhiyun 	dev = atm_dev_register(DEV_LABEL, &pci_dev->dev, &ops, -1, NULL);
2243*4882a593Smuzhiyun 	if (!dev)
2244*4882a593Smuzhiyun 		goto err_free_consistent;
2245*4882a593Smuzhiyun 
2246*4882a593Smuzhiyun 	dev->dev_data = eni_dev;
2247*4882a593Smuzhiyun 	pci_set_drvdata(pci_dev, dev);
2248*4882a593Smuzhiyun 	eni_dev->pci_dev = pci_dev;
2249*4882a593Smuzhiyun 	eni_dev->asic = ent->driver_data;
2250*4882a593Smuzhiyun 
2251*4882a593Smuzhiyun 	rc = eni_do_init(dev);
2252*4882a593Smuzhiyun 	if (rc < 0)
2253*4882a593Smuzhiyun 		goto err_unregister;
2254*4882a593Smuzhiyun 
2255*4882a593Smuzhiyun 	rc = eni_start(dev);
2256*4882a593Smuzhiyun 	if (rc < 0)
2257*4882a593Smuzhiyun 		goto err_eni_release;
2258*4882a593Smuzhiyun 
2259*4882a593Smuzhiyun 	eni_dev->more = eni_boards;
2260*4882a593Smuzhiyun 	eni_boards = dev;
2261*4882a593Smuzhiyun out:
2262*4882a593Smuzhiyun 	return rc;
2263*4882a593Smuzhiyun 
2264*4882a593Smuzhiyun err_eni_release:
2265*4882a593Smuzhiyun 	dev->phy = NULL;
2266*4882a593Smuzhiyun 	iounmap(ENI_DEV(dev)->ioaddr);
2267*4882a593Smuzhiyun err_unregister:
2268*4882a593Smuzhiyun 	atm_dev_deregister(dev);
2269*4882a593Smuzhiyun err_free_consistent:
2270*4882a593Smuzhiyun 	dma_free_coherent(&pci_dev->dev, ENI_ZEROES_SIZE, zero->addr, zero->dma);
2271*4882a593Smuzhiyun err_kfree:
2272*4882a593Smuzhiyun 	kfree(eni_dev);
2273*4882a593Smuzhiyun err_disable:
2274*4882a593Smuzhiyun 	pci_disable_device(pci_dev);
2275*4882a593Smuzhiyun 	goto out;
2276*4882a593Smuzhiyun }
2277*4882a593Smuzhiyun 
2278*4882a593Smuzhiyun 
2279*4882a593Smuzhiyun static const struct pci_device_id eni_pci_tbl[] = {
2280*4882a593Smuzhiyun 	{ PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_FPGA), 0 /* FPGA */ },
2281*4882a593Smuzhiyun 	{ PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_ASIC), 1 /* ASIC */ },
2282*4882a593Smuzhiyun 	{ 0, }
2283*4882a593Smuzhiyun };
2284*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci,eni_pci_tbl);
2285*4882a593Smuzhiyun 
2286*4882a593Smuzhiyun 
eni_remove_one(struct pci_dev * pdev)2287*4882a593Smuzhiyun static void eni_remove_one(struct pci_dev *pdev)
2288*4882a593Smuzhiyun {
2289*4882a593Smuzhiyun 	struct atm_dev *dev = pci_get_drvdata(pdev);
2290*4882a593Smuzhiyun 	struct eni_dev *ed = ENI_DEV(dev);
2291*4882a593Smuzhiyun 	struct eni_zero *zero = &ed->zero;
2292*4882a593Smuzhiyun 
2293*4882a593Smuzhiyun 	eni_do_release(dev);
2294*4882a593Smuzhiyun 	atm_dev_deregister(dev);
2295*4882a593Smuzhiyun 	dma_free_coherent(&pdev->dev, ENI_ZEROES_SIZE, zero->addr, zero->dma);
2296*4882a593Smuzhiyun 	kfree(ed);
2297*4882a593Smuzhiyun 	pci_disable_device(pdev);
2298*4882a593Smuzhiyun }
2299*4882a593Smuzhiyun 
2300*4882a593Smuzhiyun 
2301*4882a593Smuzhiyun static struct pci_driver eni_driver = {
2302*4882a593Smuzhiyun 	.name		= DEV_LABEL,
2303*4882a593Smuzhiyun 	.id_table	= eni_pci_tbl,
2304*4882a593Smuzhiyun 	.probe		= eni_init_one,
2305*4882a593Smuzhiyun 	.remove		= eni_remove_one,
2306*4882a593Smuzhiyun };
2307*4882a593Smuzhiyun 
2308*4882a593Smuzhiyun 
eni_init(void)2309*4882a593Smuzhiyun static int __init eni_init(void)
2310*4882a593Smuzhiyun {
2311*4882a593Smuzhiyun 	struct sk_buff *skb; /* dummy for sizeof */
2312*4882a593Smuzhiyun 
2313*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(skb->cb) < sizeof(struct eni_skb_prv));
2314*4882a593Smuzhiyun 	return pci_register_driver(&eni_driver);
2315*4882a593Smuzhiyun }
2316*4882a593Smuzhiyun 
2317*4882a593Smuzhiyun 
2318*4882a593Smuzhiyun module_init(eni_init);
2319*4882a593Smuzhiyun /* @@@ since exit routine not defined, this module can not be unloaded */
2320*4882a593Smuzhiyun 
2321*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2322