xref: /OK3568_Linux_fs/kernel/drivers/ata/pata_triflex.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * pata_triflex.c 	- Compaq PATA for new ATA layer
4*4882a593Smuzhiyun  *			  (C) 2005 Red Hat Inc
5*4882a593Smuzhiyun  *			  Alan Cox <alan@lxorguk.ukuu.org.uk>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * based upon
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * triflex.c
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * IDE Chipset driver for the Compaq TriFlex IDE controller.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Known to work with the Compaq Workstation 5x00 series.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Copyright (C) 2002 Hewlett-Packard Development Group, L.P.
16*4882a593Smuzhiyun  * Author: Torben Mathiasen <torben.mathiasen@hp.com>
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Loosely based on the piix & svwks drivers.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * Documentation:
21*4882a593Smuzhiyun  *	Not publicly available.
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <linux/kernel.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/pci.h>
27*4882a593Smuzhiyun #include <linux/blkdev.h>
28*4882a593Smuzhiyun #include <linux/delay.h>
29*4882a593Smuzhiyun #include <scsi/scsi_host.h>
30*4882a593Smuzhiyun #include <linux/libata.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define DRV_NAME "pata_triflex"
33*4882a593Smuzhiyun #define DRV_VERSION "0.2.8"
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /**
36*4882a593Smuzhiyun  *	triflex_prereset		-	probe begin
37*4882a593Smuzhiyun  *	@link: ATA link
38*4882a593Smuzhiyun  *	@deadline: deadline jiffies for the operation
39*4882a593Smuzhiyun  *
40*4882a593Smuzhiyun  *	Set up cable type and use generic probe init
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun 
triflex_prereset(struct ata_link * link,unsigned long deadline)43*4882a593Smuzhiyun static int triflex_prereset(struct ata_link *link, unsigned long deadline)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	static const struct pci_bits triflex_enable_bits[] = {
46*4882a593Smuzhiyun 		{ 0x80, 1, 0x01, 0x01 },
47*4882a593Smuzhiyun 		{ 0x80, 1, 0x02, 0x02 }
48*4882a593Smuzhiyun 	};
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	struct ata_port *ap = link->ap;
51*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no]))
54*4882a593Smuzhiyun 		return -ENOENT;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	return ata_sff_prereset(link, deadline);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /**
62*4882a593Smuzhiyun  *	triflex_load_timing		-	timing configuration
63*4882a593Smuzhiyun  *	@ap: ATA interface
64*4882a593Smuzhiyun  *	@adev: Device on the bus
65*4882a593Smuzhiyun  *	@speed: speed to configure
66*4882a593Smuzhiyun  *
67*4882a593Smuzhiyun  *	The Triflex has one set of timings per device per channel. This
68*4882a593Smuzhiyun  *	means we must do some switching. As the PIO and DMA timings don't
69*4882a593Smuzhiyun  *	match we have to do some reloading unlike PIIX devices where tuning
70*4882a593Smuzhiyun  *	tricks can avoid it.
71*4882a593Smuzhiyun  */
72*4882a593Smuzhiyun 
triflex_load_timing(struct ata_port * ap,struct ata_device * adev,int speed)73*4882a593Smuzhiyun static void triflex_load_timing(struct ata_port *ap, struct ata_device *adev, int speed)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
76*4882a593Smuzhiyun 	u32 timing = 0;
77*4882a593Smuzhiyun 	u32 triflex_timing, old_triflex_timing;
78*4882a593Smuzhiyun 	int channel_offset = ap->port_no ? 0x74: 0x70;
79*4882a593Smuzhiyun 	unsigned int is_slave	= (adev->devno != 0);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	pci_read_config_dword(pdev, channel_offset, &old_triflex_timing);
83*4882a593Smuzhiyun 	triflex_timing = old_triflex_timing;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	switch(speed)
86*4882a593Smuzhiyun 	{
87*4882a593Smuzhiyun 		case XFER_MW_DMA_2:
88*4882a593Smuzhiyun 			timing = 0x0103;break;
89*4882a593Smuzhiyun 		case XFER_MW_DMA_1:
90*4882a593Smuzhiyun 			timing = 0x0203;break;
91*4882a593Smuzhiyun 		case XFER_MW_DMA_0:
92*4882a593Smuzhiyun 			timing = 0x0808;break;
93*4882a593Smuzhiyun 		case XFER_SW_DMA_2:
94*4882a593Smuzhiyun 		case XFER_SW_DMA_1:
95*4882a593Smuzhiyun 		case XFER_SW_DMA_0:
96*4882a593Smuzhiyun 			timing = 0x0F0F;break;
97*4882a593Smuzhiyun 		case XFER_PIO_4:
98*4882a593Smuzhiyun 			timing = 0x0202;break;
99*4882a593Smuzhiyun 		case XFER_PIO_3:
100*4882a593Smuzhiyun 			timing = 0x0204;break;
101*4882a593Smuzhiyun 		case XFER_PIO_2:
102*4882a593Smuzhiyun 			timing = 0x0404;break;
103*4882a593Smuzhiyun 		case XFER_PIO_1:
104*4882a593Smuzhiyun 			timing = 0x0508;break;
105*4882a593Smuzhiyun 		case XFER_PIO_0:
106*4882a593Smuzhiyun 			timing = 0x0808;break;
107*4882a593Smuzhiyun 		default:
108*4882a593Smuzhiyun 			BUG();
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 	triflex_timing &= ~ (0xFFFF << (16 * is_slave));
111*4882a593Smuzhiyun 	triflex_timing |= (timing << (16 * is_slave));
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	if (triflex_timing != old_triflex_timing)
114*4882a593Smuzhiyun 		pci_write_config_dword(pdev, channel_offset, triflex_timing);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun /**
118*4882a593Smuzhiyun  *	triflex_set_piomode	-	set initial PIO mode data
119*4882a593Smuzhiyun  *	@ap: ATA interface
120*4882a593Smuzhiyun  *	@adev: ATA device
121*4882a593Smuzhiyun  *
122*4882a593Smuzhiyun  *	Use the timing loader to set up the PIO mode. We have to do this
123*4882a593Smuzhiyun  *	because DMA start/stop will only be called once DMA occurs. If there
124*4882a593Smuzhiyun  *	has been no DMA then the PIO timings are still needed.
125*4882a593Smuzhiyun  */
triflex_set_piomode(struct ata_port * ap,struct ata_device * adev)126*4882a593Smuzhiyun static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	triflex_load_timing(ap, adev, adev->pio_mode);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /**
132*4882a593Smuzhiyun  *	triflex_dma_start	-	DMA start callback
133*4882a593Smuzhiyun  *	@qc: Command in progress
134*4882a593Smuzhiyun  *
135*4882a593Smuzhiyun  *	Usually drivers set the DMA timing at the point the set_dmamode call
136*4882a593Smuzhiyun  *	is made. Triflex however requires we load new timings on the
137*4882a593Smuzhiyun  *	transition or keep matching PIO/DMA pairs (ie MWDMA2/PIO4 etc).
138*4882a593Smuzhiyun  *	We load the DMA timings just before starting DMA and then restore
139*4882a593Smuzhiyun  *	the PIO timing when the DMA is finished.
140*4882a593Smuzhiyun  */
141*4882a593Smuzhiyun 
triflex_bmdma_start(struct ata_queued_cmd * qc)142*4882a593Smuzhiyun static void triflex_bmdma_start(struct ata_queued_cmd *qc)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	triflex_load_timing(qc->ap, qc->dev, qc->dev->dma_mode);
145*4882a593Smuzhiyun 	ata_bmdma_start(qc);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /**
149*4882a593Smuzhiyun  *	triflex_dma_stop	-	DMA stop callback
150*4882a593Smuzhiyun  *	@ap: ATA interface
151*4882a593Smuzhiyun  *	@adev: ATA device
152*4882a593Smuzhiyun  *
153*4882a593Smuzhiyun  *	We loaded new timings in dma_start, as a result we need to restore
154*4882a593Smuzhiyun  *	the PIO timings in dma_stop so that the next command issue gets the
155*4882a593Smuzhiyun  *	right clock values.
156*4882a593Smuzhiyun  */
157*4882a593Smuzhiyun 
triflex_bmdma_stop(struct ata_queued_cmd * qc)158*4882a593Smuzhiyun static void triflex_bmdma_stop(struct ata_queued_cmd *qc)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	ata_bmdma_stop(qc);
161*4882a593Smuzhiyun 	triflex_load_timing(qc->ap, qc->dev, qc->dev->pio_mode);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static struct scsi_host_template triflex_sht = {
165*4882a593Smuzhiyun 	ATA_BMDMA_SHT(DRV_NAME),
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun static struct ata_port_operations triflex_port_ops = {
169*4882a593Smuzhiyun 	.inherits	= &ata_bmdma_port_ops,
170*4882a593Smuzhiyun 	.bmdma_start 	= triflex_bmdma_start,
171*4882a593Smuzhiyun 	.bmdma_stop	= triflex_bmdma_stop,
172*4882a593Smuzhiyun 	.cable_detect	= ata_cable_40wire,
173*4882a593Smuzhiyun 	.set_piomode	= triflex_set_piomode,
174*4882a593Smuzhiyun 	.prereset	= triflex_prereset,
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
triflex_init_one(struct pci_dev * dev,const struct pci_device_id * id)177*4882a593Smuzhiyun static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	static const struct ata_port_info info = {
180*4882a593Smuzhiyun 		.flags = ATA_FLAG_SLAVE_POSS,
181*4882a593Smuzhiyun 		.pio_mask = ATA_PIO4,
182*4882a593Smuzhiyun 		.mwdma_mask = ATA_MWDMA2,
183*4882a593Smuzhiyun 		.port_ops = &triflex_port_ops
184*4882a593Smuzhiyun 	};
185*4882a593Smuzhiyun 	const struct ata_port_info *ppi[] = { &info, NULL };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	ata_print_version_once(&dev->dev, DRV_VERSION);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	return ata_pci_bmdma_init_one(dev, ppi, &triflex_sht, NULL, 0);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun static const struct pci_device_id triflex[] = {
193*4882a593Smuzhiyun 	{ PCI_VDEVICE(COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE), },
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	{ },
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
triflex_ata_pci_device_suspend(struct pci_dev * pdev,pm_message_t mesg)199*4882a593Smuzhiyun static int triflex_ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	struct ata_host *host = pci_get_drvdata(pdev);
202*4882a593Smuzhiyun 	int rc = 0;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	rc = ata_host_suspend(host, mesg);
205*4882a593Smuzhiyun 	if (rc)
206*4882a593Smuzhiyun 		return rc;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	/*
209*4882a593Smuzhiyun 	 * We must not disable or powerdown the device.
210*4882a593Smuzhiyun 	 * APM bios refuses to suspend if IDE is not accessible.
211*4882a593Smuzhiyun 	 */
212*4882a593Smuzhiyun 	pci_save_state(pdev);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun #endif
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun static struct pci_driver triflex_pci_driver = {
220*4882a593Smuzhiyun 	.name 		= DRV_NAME,
221*4882a593Smuzhiyun 	.id_table	= triflex,
222*4882a593Smuzhiyun 	.probe 		= triflex_init_one,
223*4882a593Smuzhiyun 	.remove		= ata_pci_remove_one,
224*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
225*4882a593Smuzhiyun 	.suspend	= triflex_ata_pci_device_suspend,
226*4882a593Smuzhiyun 	.resume		= ata_pci_device_resume,
227*4882a593Smuzhiyun #endif
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun module_pci_driver(triflex_pci_driver);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun MODULE_AUTHOR("Alan Cox");
233*4882a593Smuzhiyun MODULE_DESCRIPTION("low-level driver for Compaq Triflex");
234*4882a593Smuzhiyun MODULE_LICENSE("GPL");
235*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, triflex);
236*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
237