xref: /OK3568_Linux_fs/kernel/drivers/ata/pata_sc1200.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * New ATA layer SC1200 driver		Alan Cox <alan@lxorguk.ukuu.org.uk>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * TODO: Mode selection filtering
6*4882a593Smuzhiyun  * TODO: Needs custom DMA cleanup code
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Based very heavily on
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * linux/drivers/ide/pci/sc1200.c		Version 0.91	28-Jan-2003
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Copyright (C) 2000-2002		Mark Lord <mlord@pobox.com>
13*4882a593Smuzhiyun  * May be copied or modified under the terms of the GNU General Public License
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Development of this chipset driver was funded
16*4882a593Smuzhiyun  * by the nice folks at National Semiconductor.
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/kernel.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/pci.h>
22*4882a593Smuzhiyun #include <linux/blkdev.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <scsi/scsi_host.h>
25*4882a593Smuzhiyun #include <linux/libata.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define DRV_NAME	"pata_sc1200"
28*4882a593Smuzhiyun #define DRV_VERSION	"0.2.6"
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define SC1200_REV_A	0x00
31*4882a593Smuzhiyun #define SC1200_REV_B1	0x01
32*4882a593Smuzhiyun #define SC1200_REV_B3	0x02
33*4882a593Smuzhiyun #define SC1200_REV_C1	0x03
34*4882a593Smuzhiyun #define SC1200_REV_D1	0x04
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /**
37*4882a593Smuzhiyun  *	sc1200_clock	-	PCI clock
38*4882a593Smuzhiyun  *
39*4882a593Smuzhiyun  *	Return the PCI bus clocking for the SC1200 chipset configuration
40*4882a593Smuzhiyun  *	in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun 
sc1200_clock(void)43*4882a593Smuzhiyun static int sc1200_clock(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	/* Magic registers that give us the chipset data */
46*4882a593Smuzhiyun 	u8 chip_id = inb(0x903C);
47*4882a593Smuzhiyun 	u8 silicon_rev = inb(0x903D);
48*4882a593Smuzhiyun 	u16 pci_clock;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
51*4882a593Smuzhiyun 		return 0;	/* 33 MHz mode */
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
54*4882a593Smuzhiyun 	   0/3 is 33Mhz 1 is 48 2 is 66 */
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	pci_clock = inw(0x901E);
57*4882a593Smuzhiyun 	pci_clock >>= 8;
58*4882a593Smuzhiyun 	pci_clock &= 0x03;
59*4882a593Smuzhiyun 	if (pci_clock == 3)
60*4882a593Smuzhiyun 		pci_clock = 0;
61*4882a593Smuzhiyun 	return pci_clock;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /**
65*4882a593Smuzhiyun  *	sc1200_set_piomode		-	PIO setup
66*4882a593Smuzhiyun  *	@ap: ATA interface
67*4882a593Smuzhiyun  *	@adev: device on the interface
68*4882a593Smuzhiyun  *
69*4882a593Smuzhiyun  *	Set our PIO requirements. This is fairly simple on the SC1200
70*4882a593Smuzhiyun  */
71*4882a593Smuzhiyun 
sc1200_set_piomode(struct ata_port * ap,struct ata_device * adev)72*4882a593Smuzhiyun static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	static const u32 pio_timings[4][5] = {
75*4882a593Smuzhiyun 		/* format0, 33Mhz */
76*4882a593Smuzhiyun 		{ 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 },
77*4882a593Smuzhiyun 		/* format1, 33Mhz */
78*4882a593Smuzhiyun 		{ 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 },
79*4882a593Smuzhiyun 		/* format1, 48Mhz */
80*4882a593Smuzhiyun 		{ 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 },
81*4882a593Smuzhiyun 		/* format1, 66Mhz */
82*4882a593Smuzhiyun 		{ 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 }
83*4882a593Smuzhiyun 	};
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
86*4882a593Smuzhiyun 	u32 format;
87*4882a593Smuzhiyun 	unsigned int reg = 0x40 + 0x10 * ap->port_no;
88*4882a593Smuzhiyun 	int mode = adev->pio_mode - XFER_PIO_0;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	pci_read_config_dword(pdev, reg + 4, &format);
91*4882a593Smuzhiyun 	format >>= 31;
92*4882a593Smuzhiyun 	format += sc1200_clock();
93*4882a593Smuzhiyun 	pci_write_config_dword(pdev, reg + 8 * adev->devno,
94*4882a593Smuzhiyun 				pio_timings[format][mode]);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun  *	sc1200_set_dmamode		-	DMA timing setup
99*4882a593Smuzhiyun  *	@ap: ATA interface
100*4882a593Smuzhiyun  *	@adev: Device being configured
101*4882a593Smuzhiyun  *
102*4882a593Smuzhiyun  *	We cannot mix MWDMA and UDMA without reloading timings each switch
103*4882a593Smuzhiyun  *	master to slave.
104*4882a593Smuzhiyun  */
105*4882a593Smuzhiyun 
sc1200_set_dmamode(struct ata_port * ap,struct ata_device * adev)106*4882a593Smuzhiyun static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	static const u32 udma_timing[3][3] = {
109*4882a593Smuzhiyun 		{ 0x00921250, 0x00911140, 0x00911030 },
110*4882a593Smuzhiyun 		{ 0x00932470, 0x00922260, 0x00922140 },
111*4882a593Smuzhiyun 		{ 0x009436A1, 0x00933481, 0x00923261 }
112*4882a593Smuzhiyun 	};
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	static const u32 mwdma_timing[3][3] = {
115*4882a593Smuzhiyun 		{ 0x00077771, 0x00012121, 0x00002020 },
116*4882a593Smuzhiyun 		{ 0x000BBBB2, 0x00024241, 0x00013131 },
117*4882a593Smuzhiyun 		{ 0x000FFFF3, 0x00035352, 0x00015151 }
118*4882a593Smuzhiyun 	};
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	int clock = sc1200_clock();
121*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
122*4882a593Smuzhiyun 	unsigned int reg = 0x40 + 0x10 * ap->port_no;
123*4882a593Smuzhiyun 	int mode = adev->dma_mode;
124*4882a593Smuzhiyun 	u32 format;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	if (mode >= XFER_UDMA_0)
127*4882a593Smuzhiyun 		format = udma_timing[clock][mode - XFER_UDMA_0];
128*4882a593Smuzhiyun 	else
129*4882a593Smuzhiyun 		format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	if (adev->devno == 0) {
132*4882a593Smuzhiyun 		u32 timings;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 		pci_read_config_dword(pdev, reg + 4, &timings);
135*4882a593Smuzhiyun 		timings &= 0x80000000UL;
136*4882a593Smuzhiyun 		timings |= format;
137*4882a593Smuzhiyun 		pci_write_config_dword(pdev, reg + 4, timings);
138*4882a593Smuzhiyun 	} else
139*4882a593Smuzhiyun 		pci_write_config_dword(pdev, reg + 12, format);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /**
143*4882a593Smuzhiyun  *	sc1200_qc_issue		-	command issue
144*4882a593Smuzhiyun  *	@qc: command pending
145*4882a593Smuzhiyun  *
146*4882a593Smuzhiyun  *	Called when the libata layer is about to issue a command. We wrap
147*4882a593Smuzhiyun  *	this interface so that we can load the correct ATA timings if
148*4882a593Smuzhiyun  *	necessary.  Specifically we have a problem that there is only
149*4882a593Smuzhiyun  *	one MWDMA/UDMA bit.
150*4882a593Smuzhiyun  */
151*4882a593Smuzhiyun 
sc1200_qc_issue(struct ata_queued_cmd * qc)152*4882a593Smuzhiyun static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	struct ata_port *ap = qc->ap;
155*4882a593Smuzhiyun 	struct ata_device *adev = qc->dev;
156*4882a593Smuzhiyun 	struct ata_device *prev = ap->private_data;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* See if the DMA settings could be wrong */
159*4882a593Smuzhiyun 	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
160*4882a593Smuzhiyun 		/* Maybe, but do the channels match MWDMA/UDMA ? */
161*4882a593Smuzhiyun 		if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
162*4882a593Smuzhiyun 		    (ata_using_udma(prev) && !ata_using_udma(adev)))
163*4882a593Smuzhiyun 		    	/* Switch the mode bits */
164*4882a593Smuzhiyun 		    	sc1200_set_dmamode(ap, adev);
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	return ata_bmdma_qc_issue(qc);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /**
171*4882a593Smuzhiyun  *	sc1200_qc_defer	-	implement serialization
172*4882a593Smuzhiyun  *	@qc: command
173*4882a593Smuzhiyun  *
174*4882a593Smuzhiyun  *	Serialize command issue on this controller.
175*4882a593Smuzhiyun  */
176*4882a593Smuzhiyun 
sc1200_qc_defer(struct ata_queued_cmd * qc)177*4882a593Smuzhiyun static int sc1200_qc_defer(struct ata_queued_cmd *qc)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	struct ata_host *host = qc->ap->host;
180*4882a593Smuzhiyun 	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
181*4882a593Smuzhiyun 	int rc;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	/* First apply the usual rules */
184*4882a593Smuzhiyun 	rc = ata_std_qc_defer(qc);
185*4882a593Smuzhiyun 	if (rc != 0)
186*4882a593Smuzhiyun 		return rc;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* Now apply serialization rules. Only allow a command if the
189*4882a593Smuzhiyun 	   other channel state machine is idle */
190*4882a593Smuzhiyun 	if (alt && alt->qc_active)
191*4882a593Smuzhiyun 		return	ATA_DEFER_PORT;
192*4882a593Smuzhiyun 	return 0;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun static struct scsi_host_template sc1200_sht = {
196*4882a593Smuzhiyun 	ATA_BMDMA_SHT(DRV_NAME),
197*4882a593Smuzhiyun 	.sg_tablesize	= LIBATA_DUMB_MAX_PRD,
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun static struct ata_port_operations sc1200_port_ops = {
201*4882a593Smuzhiyun 	.inherits	= &ata_bmdma_port_ops,
202*4882a593Smuzhiyun 	.qc_prep 	= ata_bmdma_dumb_qc_prep,
203*4882a593Smuzhiyun 	.qc_issue	= sc1200_qc_issue,
204*4882a593Smuzhiyun 	.qc_defer	= sc1200_qc_defer,
205*4882a593Smuzhiyun 	.cable_detect	= ata_cable_40wire,
206*4882a593Smuzhiyun 	.set_piomode	= sc1200_set_piomode,
207*4882a593Smuzhiyun 	.set_dmamode	= sc1200_set_dmamode,
208*4882a593Smuzhiyun };
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun  *	sc1200_init_one		-	Initialise an SC1200
212*4882a593Smuzhiyun  *	@dev: PCI device
213*4882a593Smuzhiyun  *	@id: Entry in match table
214*4882a593Smuzhiyun  *
215*4882a593Smuzhiyun  *	Just throw the needed data at the libata helper and it does all
216*4882a593Smuzhiyun  *	our work.
217*4882a593Smuzhiyun  */
218*4882a593Smuzhiyun 
sc1200_init_one(struct pci_dev * dev,const struct pci_device_id * id)219*4882a593Smuzhiyun static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	static const struct ata_port_info info = {
222*4882a593Smuzhiyun 		.flags = ATA_FLAG_SLAVE_POSS,
223*4882a593Smuzhiyun 		.pio_mask = ATA_PIO4,
224*4882a593Smuzhiyun 		.mwdma_mask = ATA_MWDMA2,
225*4882a593Smuzhiyun 		.udma_mask = ATA_UDMA2,
226*4882a593Smuzhiyun 		.port_ops = &sc1200_port_ops
227*4882a593Smuzhiyun 	};
228*4882a593Smuzhiyun 	const struct ata_port_info *ppi[] = { &info, NULL };
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun static const struct pci_device_id sc1200[] = {
234*4882a593Smuzhiyun 	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	{ },
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun static struct pci_driver sc1200_pci_driver = {
240*4882a593Smuzhiyun 	.name 		= DRV_NAME,
241*4882a593Smuzhiyun 	.id_table	= sc1200,
242*4882a593Smuzhiyun 	.probe 		= sc1200_init_one,
243*4882a593Smuzhiyun 	.remove		= ata_pci_remove_one,
244*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
245*4882a593Smuzhiyun 	.suspend	= ata_pci_device_suspend,
246*4882a593Smuzhiyun 	.resume		= ata_pci_device_resume,
247*4882a593Smuzhiyun #endif
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun module_pci_driver(sc1200_pci_driver);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun MODULE_AUTHOR("Alan Cox, Mark Lord");
253*4882a593Smuzhiyun MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
254*4882a593Smuzhiyun MODULE_LICENSE("GPL");
255*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, sc1200);
256*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
257