1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * RZ1000/1001 driver based upon
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * linux/drivers/ide/pci/rz1000.c Version 0.06 January 12, 2003
6*4882a593Smuzhiyun * Copyright (C) 1995-1998 Linus Torvalds & author (see below)
7*4882a593Smuzhiyun * Principal Author: mlord@pobox.com (Mark Lord)
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * See linux/MAINTAINERS for address of current maintainer.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This file provides support for disabling the buggy read-ahead
12*4882a593Smuzhiyun * mode of the RZ1000 IDE chipset, commonly used on Intel motherboards.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/pci.h>
18*4882a593Smuzhiyun #include <linux/blkdev.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <scsi/scsi_host.h>
21*4882a593Smuzhiyun #include <linux/libata.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define DRV_NAME "pata_rz1000"
24*4882a593Smuzhiyun #define DRV_VERSION "0.2.4"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /**
28*4882a593Smuzhiyun * rz1000_set_mode - mode setting function
29*4882a593Smuzhiyun * @link: ATA link
30*4882a593Smuzhiyun * @unused: returned device on set_mode failure
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * Use a non standard set_mode function. We don't want to be tuned. We
33*4882a593Smuzhiyun * would prefer to be BIOS generic but for the fact our hardware is
34*4882a593Smuzhiyun * whacked out.
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun
rz1000_set_mode(struct ata_link * link,struct ata_device ** unused)37*4882a593Smuzhiyun static int rz1000_set_mode(struct ata_link *link, struct ata_device **unused)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct ata_device *dev;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun ata_for_each_dev(dev, link, ENABLED) {
42*4882a593Smuzhiyun /* We don't really care */
43*4882a593Smuzhiyun dev->pio_mode = XFER_PIO_0;
44*4882a593Smuzhiyun dev->xfer_mode = XFER_PIO_0;
45*4882a593Smuzhiyun dev->xfer_shift = ATA_SHIFT_PIO;
46*4882a593Smuzhiyun dev->flags |= ATA_DFLAG_PIO;
47*4882a593Smuzhiyun ata_dev_info(dev, "configured for PIO\n");
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static struct scsi_host_template rz1000_sht = {
54*4882a593Smuzhiyun ATA_PIO_SHT(DRV_NAME),
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static struct ata_port_operations rz1000_port_ops = {
58*4882a593Smuzhiyun .inherits = &ata_sff_port_ops,
59*4882a593Smuzhiyun .cable_detect = ata_cable_40wire,
60*4882a593Smuzhiyun .set_mode = rz1000_set_mode,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
rz1000_fifo_disable(struct pci_dev * pdev)63*4882a593Smuzhiyun static int rz1000_fifo_disable(struct pci_dev *pdev)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun u16 reg;
66*4882a593Smuzhiyun /* Be exceptionally paranoid as we must be sure to apply the fix */
67*4882a593Smuzhiyun if (pci_read_config_word(pdev, 0x40, ®) != 0)
68*4882a593Smuzhiyun return -1;
69*4882a593Smuzhiyun reg &= 0xDFFF;
70*4882a593Smuzhiyun if (pci_write_config_word(pdev, 0x40, reg) != 0)
71*4882a593Smuzhiyun return -1;
72*4882a593Smuzhiyun printk(KERN_INFO DRV_NAME ": disabled chipset readahead.\n");
73*4882a593Smuzhiyun return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /**
77*4882a593Smuzhiyun * rz1000_init_one - Register RZ1000 ATA PCI device with kernel services
78*4882a593Smuzhiyun * @pdev: PCI device to register
79*4882a593Smuzhiyun * @ent: Entry in rz1000_pci_tbl matching with @pdev
80*4882a593Smuzhiyun *
81*4882a593Smuzhiyun * Configure an RZ1000 interface. This doesn't require much special
82*4882a593Smuzhiyun * handling except that we *MUST* kill the chipset readahead or the
83*4882a593Smuzhiyun * user may experience data corruption.
84*4882a593Smuzhiyun */
85*4882a593Smuzhiyun
rz1000_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)86*4882a593Smuzhiyun static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun static const struct ata_port_info info = {
89*4882a593Smuzhiyun .flags = ATA_FLAG_SLAVE_POSS,
90*4882a593Smuzhiyun .pio_mask = ATA_PIO4,
91*4882a593Smuzhiyun .port_ops = &rz1000_port_ops
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun const struct ata_port_info *ppi[] = { &info, NULL };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun ata_print_version_once(&pdev->dev, DRV_VERSION);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (rz1000_fifo_disable(pdev) == 0)
98*4882a593Smuzhiyun return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL, 0);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n");
101*4882a593Smuzhiyun /* Not safe to use so skip */
102*4882a593Smuzhiyun return -ENODEV;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
rz1000_reinit_one(struct pci_dev * pdev)106*4882a593Smuzhiyun static int rz1000_reinit_one(struct pci_dev *pdev)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct ata_host *host = pci_get_drvdata(pdev);
109*4882a593Smuzhiyun int rc;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun rc = ata_pci_device_do_resume(pdev);
112*4882a593Smuzhiyun if (rc)
113*4882a593Smuzhiyun return rc;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /* If this fails on resume (which is a "can't happen" case), we
116*4882a593Smuzhiyun must stop as any progress risks data loss */
117*4882a593Smuzhiyun if (rz1000_fifo_disable(pdev))
118*4882a593Smuzhiyun panic("rz1000 fifo");
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ata_host_resume(host);
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun #endif
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct pci_device_id pata_rz1000[] = {
126*4882a593Smuzhiyun { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000), },
127*4882a593Smuzhiyun { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001), },
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun { },
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static struct pci_driver rz1000_pci_driver = {
133*4882a593Smuzhiyun .name = DRV_NAME,
134*4882a593Smuzhiyun .id_table = pata_rz1000,
135*4882a593Smuzhiyun .probe = rz1000_init_one,
136*4882a593Smuzhiyun .remove = ata_pci_remove_one,
137*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
138*4882a593Smuzhiyun .suspend = ata_pci_device_suspend,
139*4882a593Smuzhiyun .resume = rz1000_reinit_one,
140*4882a593Smuzhiyun #endif
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun module_pci_driver(rz1000_pci_driver);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun MODULE_AUTHOR("Alan Cox");
146*4882a593Smuzhiyun MODULE_DESCRIPTION("low-level driver for RZ1000 PCI ATA");
147*4882a593Smuzhiyun MODULE_LICENSE("GPL");
148*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, pata_rz1000);
149*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
150