xref: /OK3568_Linux_fs/kernel/drivers/ata/pata_ns87410.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * pata_ns87410.c 	- National Semiconductor 87410 PATA for new ATA layer
4*4882a593Smuzhiyun  *			  (C) 2006 Red Hat Inc
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun #include <linux/blkdev.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <scsi/scsi_host.h>
13*4882a593Smuzhiyun #include <linux/libata.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define DRV_NAME "pata_ns87410"
16*4882a593Smuzhiyun #define DRV_VERSION "0.4.6"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /**
19*4882a593Smuzhiyun  *	ns87410_pre_reset		-	probe begin
20*4882a593Smuzhiyun  *	@link: ATA link
21*4882a593Smuzhiyun  *	@deadline: deadline jiffies for the operation
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  *	Check enabled ports
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
ns87410_pre_reset(struct ata_link * link,unsigned long deadline)26*4882a593Smuzhiyun static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	struct ata_port *ap = link->ap;
29*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
30*4882a593Smuzhiyun 	static const struct pci_bits ns87410_enable_bits[] = {
31*4882a593Smuzhiyun 		{ 0x43, 1, 0x08, 0x08 },
32*4882a593Smuzhiyun 		{ 0x47, 1, 0x08, 0x08 }
33*4882a593Smuzhiyun 	};
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
36*4882a593Smuzhiyun 		return -ENOENT;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	return ata_sff_prereset(link, deadline);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /**
42*4882a593Smuzhiyun  *	ns87410_set_piomode	-	set initial PIO mode data
43*4882a593Smuzhiyun  *	@ap: ATA interface
44*4882a593Smuzhiyun  *	@adev: ATA device
45*4882a593Smuzhiyun  *
46*4882a593Smuzhiyun  *	Program timing data. This is kept per channel not per device,
47*4882a593Smuzhiyun  *	and only affects the data port.
48*4882a593Smuzhiyun  */
49*4882a593Smuzhiyun 
ns87410_set_piomode(struct ata_port * ap,struct ata_device * adev)50*4882a593Smuzhiyun static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
53*4882a593Smuzhiyun 	int port = 0x40 + 4 * ap->port_no;
54*4882a593Smuzhiyun 	u8 idetcr, idefr;
55*4882a593Smuzhiyun 	struct ata_timing at;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	static const u8 activebits[15] = {
58*4882a593Smuzhiyun 		0, 1, 2, 3, 4,
59*4882a593Smuzhiyun 		5, 5, 6, 6, 6,
60*4882a593Smuzhiyun 		6, 7, 7, 7, 7
61*4882a593Smuzhiyun 	};
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	static const u8 recoverbits[12] = {
64*4882a593Smuzhiyun 		0, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7
65*4882a593Smuzhiyun 	};
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	pci_read_config_byte(pdev, port + 3, &idefr);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	if (ata_pio_need_iordy(adev))
70*4882a593Smuzhiyun 		idefr |= 0x04;	/* IORDY enable */
71*4882a593Smuzhiyun 	else
72*4882a593Smuzhiyun 		idefr &= ~0x04;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
75*4882a593Smuzhiyun 		dev_err(&pdev->dev, "unknown mode %d\n", adev->pio_mode);
76*4882a593Smuzhiyun 		return;
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	at.active = clamp_val(at.active, 2, 16) - 2;
80*4882a593Smuzhiyun 	at.setup = clamp_val(at.setup, 1, 4) - 1;
81*4882a593Smuzhiyun 	at.recover = clamp_val(at.recover, 1, 12) - 1;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active];
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	pci_write_config_byte(pdev, port, idetcr);
86*4882a593Smuzhiyun 	pci_write_config_byte(pdev, port + 3, idefr);
87*4882a593Smuzhiyun 	/* We use ap->private_data as a pointer to the device currently
88*4882a593Smuzhiyun 	   loaded for timing */
89*4882a593Smuzhiyun 	ap->private_data = adev;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /**
93*4882a593Smuzhiyun  *	ns87410_qc_issue	-	command issue
94*4882a593Smuzhiyun  *	@qc: command pending
95*4882a593Smuzhiyun  *
96*4882a593Smuzhiyun  *	Called when the libata layer is about to issue a command. We wrap
97*4882a593Smuzhiyun  *	this interface so that we can load the correct ATA timings if
98*4882a593Smuzhiyun  *	necessary.
99*4882a593Smuzhiyun  */
100*4882a593Smuzhiyun 
ns87410_qc_issue(struct ata_queued_cmd * qc)101*4882a593Smuzhiyun static unsigned int ns87410_qc_issue(struct ata_queued_cmd *qc)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct ata_port *ap = qc->ap;
104*4882a593Smuzhiyun 	struct ata_device *adev = qc->dev;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	/* If modes have been configured and the channel data is not loaded
107*4882a593Smuzhiyun 	   then load it. We have to check if pio_mode is set as the core code
108*4882a593Smuzhiyun 	   does not set adev->pio_mode to XFER_PIO_0 while probing as would be
109*4882a593Smuzhiyun 	   logical */
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	if (adev->pio_mode && adev != ap->private_data)
112*4882a593Smuzhiyun 		ns87410_set_piomode(ap, adev);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return ata_sff_qc_issue(qc);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static struct scsi_host_template ns87410_sht = {
118*4882a593Smuzhiyun 	ATA_PIO_SHT(DRV_NAME),
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static struct ata_port_operations ns87410_port_ops = {
122*4882a593Smuzhiyun 	.inherits	= &ata_sff_port_ops,
123*4882a593Smuzhiyun 	.qc_issue	= ns87410_qc_issue,
124*4882a593Smuzhiyun 	.cable_detect	= ata_cable_40wire,
125*4882a593Smuzhiyun 	.set_piomode	= ns87410_set_piomode,
126*4882a593Smuzhiyun 	.prereset	= ns87410_pre_reset,
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
ns87410_init_one(struct pci_dev * dev,const struct pci_device_id * id)129*4882a593Smuzhiyun static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	static const struct ata_port_info info = {
132*4882a593Smuzhiyun 		.flags = ATA_FLAG_SLAVE_POSS,
133*4882a593Smuzhiyun 		.pio_mask = ATA_PIO3,
134*4882a593Smuzhiyun 		.port_ops = &ns87410_port_ops
135*4882a593Smuzhiyun 	};
136*4882a593Smuzhiyun 	const struct ata_port_info *ppi[] = { &info, NULL };
137*4882a593Smuzhiyun 	return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun static const struct pci_device_id ns87410[] = {
141*4882a593Smuzhiyun 	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), },
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	{ },
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun static struct pci_driver ns87410_pci_driver = {
147*4882a593Smuzhiyun 	.name 		= DRV_NAME,
148*4882a593Smuzhiyun 	.id_table	= ns87410,
149*4882a593Smuzhiyun 	.probe 		= ns87410_init_one,
150*4882a593Smuzhiyun 	.remove		= ata_pci_remove_one,
151*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
152*4882a593Smuzhiyun 	.suspend	= ata_pci_device_suspend,
153*4882a593Smuzhiyun 	.resume		= ata_pci_device_resume,
154*4882a593Smuzhiyun #endif
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun module_pci_driver(ns87410_pci_driver);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun MODULE_AUTHOR("Alan Cox");
160*4882a593Smuzhiyun MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
161*4882a593Smuzhiyun MODULE_LICENSE("GPL");
162*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, ns87410);
163*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
164