1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Per Atp867 data sheet rev 1.2, Acard.
8*4882a593Smuzhiyun * Based in part on early ide code from
9*4882a593Smuzhiyun * 2003-2004 by Eric Uhrhane, Google, Inc.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * TODO:
12*4882a593Smuzhiyun * 1. RAID features [comparison, XOR, striping, mirroring, etc.]
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/pci.h>
18*4882a593Smuzhiyun #include <linux/blkdev.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/device.h>
21*4882a593Smuzhiyun #include <linux/gfp.h>
22*4882a593Smuzhiyun #include <scsi/scsi_host.h>
23*4882a593Smuzhiyun #include <linux/libata.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define DRV_NAME "pata_atp867x"
26*4882a593Smuzhiyun #define DRV_VERSION "0.7.5"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * IO Registers
30*4882a593Smuzhiyun * Note that all runtime hot priv ports are cached in ap private_data
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun enum {
34*4882a593Smuzhiyun ATP867X_IO_CHANNEL_OFFSET = 0x10,
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * IO Register Bitfields
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
41*4882a593Smuzhiyun ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
44*4882a593Smuzhiyun ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
45*4882a593Smuzhiyun ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
46*4882a593Smuzhiyun ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
49*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
50*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
51*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
52*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
53*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
54*4882a593Smuzhiyun ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
55*4882a593Smuzhiyun ATP867X_IO_DMAMODE_DISABLE = 0x00,
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun ATP867X_IO_SYS_INFO_66MHZ = 0x04,
58*4882a593Smuzhiyun ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
59*4882a593Smuzhiyun ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun ATP867X_IO_PORTSPD_VAL = 0x1143,
62*4882a593Smuzhiyun ATP867X_PREREAD_VAL = 0x0200,
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun ATP867X_NUM_PORTS = 4,
65*4882a593Smuzhiyun ATP867X_BAR_IOBASE = 0,
66*4882a593Smuzhiyun ATP867X_BAR_ROMBASE = 6,
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
70*4882a593Smuzhiyun #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
73*4882a593Smuzhiyun (port) * ATP867X_IO_CHANNEL_OFFSET)
74*4882a593Smuzhiyun #define ATP867X_IO_DMABASE(ap, port) (0x40 + \
75*4882a593Smuzhiyun ATP867X_IO_PORTBASE((ap), (port)))
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun #define ATP867X_IO_STATUS(ap, port) (0x07 + \
78*4882a593Smuzhiyun ATP867X_IO_PORTBASE((ap), (port)))
79*4882a593Smuzhiyun #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
80*4882a593Smuzhiyun ATP867X_IO_PORTBASE((ap), (port)))
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /*
83*4882a593Smuzhiyun * hot priv ports
84*4882a593Smuzhiyun */
85*4882a593Smuzhiyun #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
86*4882a593Smuzhiyun ATP867X_IO_DMABASE((ap), (port)))
87*4882a593Smuzhiyun #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
88*4882a593Smuzhiyun ATP867X_IO_DMABASE((ap), (port)))
89*4882a593Smuzhiyun #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
90*4882a593Smuzhiyun ATP867X_IO_DMABASE((ap), (port)))
91*4882a593Smuzhiyun #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
92*4882a593Smuzhiyun ATP867X_IO_DMABASE((ap), (port)))
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
95*4882a593Smuzhiyun ATP867X_IO_PORTBASE((ap), (port)))
96*4882a593Smuzhiyun #define ATP867X_IO_PREREAD(ap, port) (0x4C + \
97*4882a593Smuzhiyun ATP867X_IO_PORTBASE((ap), (port)))
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun struct atp867x_priv {
100*4882a593Smuzhiyun void __iomem *dma_mode;
101*4882a593Smuzhiyun void __iomem *mstr_piospd;
102*4882a593Smuzhiyun void __iomem *slave_piospd;
103*4882a593Smuzhiyun void __iomem *eightb_piospd;
104*4882a593Smuzhiyun int pci66mhz;
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
atp867x_set_dmamode(struct ata_port * ap,struct ata_device * adev)107*4882a593Smuzhiyun static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(ap->host->dev);
110*4882a593Smuzhiyun struct atp867x_priv *dp = ap->private_data;
111*4882a593Smuzhiyun u8 speed = adev->dma_mode;
112*4882a593Smuzhiyun u8 b;
113*4882a593Smuzhiyun u8 mode = speed - XFER_UDMA_0 + 1;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /*
116*4882a593Smuzhiyun * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
117*4882a593Smuzhiyun * on 66MHz bus
118*4882a593Smuzhiyun * rev-A: UDMA_1~4 (5, 6 no change)
119*4882a593Smuzhiyun * rev-B: all UDMA modes
120*4882a593Smuzhiyun * UDMA_0 stays not to disable UDMA
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
123*4882a593Smuzhiyun (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
124*4882a593Smuzhiyun mode < ATP867X_IO_DMAMODE_UDMA_5))
125*4882a593Smuzhiyun mode--;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun b = ioread8(dp->dma_mode);
128*4882a593Smuzhiyun if (adev->devno & 1) {
129*4882a593Smuzhiyun b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
130*4882a593Smuzhiyun (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
131*4882a593Smuzhiyun } else {
132*4882a593Smuzhiyun b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
133*4882a593Smuzhiyun (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun iowrite8(b, dp->dma_mode);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
atp867x_get_active_clocks_shifted(struct ata_port * ap,unsigned int clk)138*4882a593Smuzhiyun static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
139*4882a593Smuzhiyun unsigned int clk)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct atp867x_priv *dp = ap->private_data;
142*4882a593Smuzhiyun unsigned char clocks = clk;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
146*4882a593Smuzhiyun * on 66MHz bus
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun if (dp->pci66mhz)
149*4882a593Smuzhiyun clocks++;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun switch (clocks) {
152*4882a593Smuzhiyun case 0:
153*4882a593Smuzhiyun clocks = 1;
154*4882a593Smuzhiyun break;
155*4882a593Smuzhiyun case 1 ... 6:
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun default:
158*4882a593Smuzhiyun printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
159*4882a593Smuzhiyun "Using 12clk.\n", clk);
160*4882a593Smuzhiyun fallthrough;
161*4882a593Smuzhiyun case 9 ... 12:
162*4882a593Smuzhiyun clocks = 7; /* 12 clk */
163*4882a593Smuzhiyun break;
164*4882a593Smuzhiyun case 7:
165*4882a593Smuzhiyun case 8: /* default 8 clk */
166*4882a593Smuzhiyun clocks = 0;
167*4882a593Smuzhiyun goto active_clock_shift_done;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun active_clock_shift_done:
171*4882a593Smuzhiyun return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
atp867x_get_recover_clocks_shifted(unsigned int clk)174*4882a593Smuzhiyun static int atp867x_get_recover_clocks_shifted(unsigned int clk)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun unsigned char clocks = clk;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun switch (clocks) {
179*4882a593Smuzhiyun case 0:
180*4882a593Smuzhiyun clocks = 1;
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun case 1 ... 11:
183*4882a593Smuzhiyun break;
184*4882a593Smuzhiyun case 13:
185*4882a593Smuzhiyun case 14:
186*4882a593Smuzhiyun --clocks; /* by the spec */
187*4882a593Smuzhiyun break;
188*4882a593Smuzhiyun case 15:
189*4882a593Smuzhiyun break;
190*4882a593Smuzhiyun default:
191*4882a593Smuzhiyun printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
192*4882a593Smuzhiyun "Using default 12clk.\n", clk);
193*4882a593Smuzhiyun fallthrough;
194*4882a593Smuzhiyun case 12: /* default 12 clk */
195*4882a593Smuzhiyun clocks = 0;
196*4882a593Smuzhiyun break;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
atp867x_set_piomode(struct ata_port * ap,struct ata_device * adev)202*4882a593Smuzhiyun static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun struct ata_device *peer = ata_dev_pair(adev);
205*4882a593Smuzhiyun struct atp867x_priv *dp = ap->private_data;
206*4882a593Smuzhiyun u8 speed = adev->pio_mode;
207*4882a593Smuzhiyun struct ata_timing t, p;
208*4882a593Smuzhiyun int T, UT;
209*4882a593Smuzhiyun u8 b;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun T = 1000000000 / 33333;
212*4882a593Smuzhiyun UT = T / 4;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun ata_timing_compute(adev, speed, &t, T, UT);
215*4882a593Smuzhiyun if (peer && peer->pio_mode) {
216*4882a593Smuzhiyun ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
217*4882a593Smuzhiyun ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun b = ioread8(dp->dma_mode);
221*4882a593Smuzhiyun if (adev->devno & 1)
222*4882a593Smuzhiyun b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
223*4882a593Smuzhiyun else
224*4882a593Smuzhiyun b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
225*4882a593Smuzhiyun iowrite8(b, dp->dma_mode);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun b = atp867x_get_active_clocks_shifted(ap, t.active) |
228*4882a593Smuzhiyun atp867x_get_recover_clocks_shifted(t.recover);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (adev->devno & 1)
231*4882a593Smuzhiyun iowrite8(b, dp->slave_piospd);
232*4882a593Smuzhiyun else
233*4882a593Smuzhiyun iowrite8(b, dp->mstr_piospd);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
236*4882a593Smuzhiyun atp867x_get_recover_clocks_shifted(t.rec8b);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun iowrite8(b, dp->eightb_piospd);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
atp867x_cable_override(struct pci_dev * pdev)241*4882a593Smuzhiyun static int atp867x_cable_override(struct pci_dev *pdev)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
244*4882a593Smuzhiyun (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
245*4882a593Smuzhiyun pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
246*4882a593Smuzhiyun return 1;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
atp867x_cable_detect(struct ata_port * ap)251*4882a593Smuzhiyun static int atp867x_cable_detect(struct ata_port *ap)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(ap->host->dev);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (atp867x_cable_override(pdev))
256*4882a593Smuzhiyun return ATA_CBL_PATA40_SHORT;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun return ATA_CBL_PATA_UNK;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun static struct scsi_host_template atp867x_sht = {
262*4882a593Smuzhiyun ATA_BMDMA_SHT(DRV_NAME),
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun static struct ata_port_operations atp867x_ops = {
266*4882a593Smuzhiyun .inherits = &ata_bmdma_port_ops,
267*4882a593Smuzhiyun .cable_detect = atp867x_cable_detect,
268*4882a593Smuzhiyun .set_piomode = atp867x_set_piomode,
269*4882a593Smuzhiyun .set_dmamode = atp867x_set_dmamode,
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun #ifdef ATP867X_DEBUG
atp867x_check_res(struct pci_dev * pdev)274*4882a593Smuzhiyun static void atp867x_check_res(struct pci_dev *pdev)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun int i;
277*4882a593Smuzhiyun unsigned long start, len;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /* Check the PCI resources for this channel are enabled */
280*4882a593Smuzhiyun for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
281*4882a593Smuzhiyun start = pci_resource_start(pdev, i);
282*4882a593Smuzhiyun len = pci_resource_len(pdev, i);
283*4882a593Smuzhiyun printk(KERN_DEBUG "ATP867X: resource start:len=%lx:%lx\n",
284*4882a593Smuzhiyun start, len);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
atp867x_check_ports(struct ata_port * ap,int port)288*4882a593Smuzhiyun static void atp867x_check_ports(struct ata_port *ap, int port)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun struct ata_ioports *ioaddr = &ap->ioaddr;
291*4882a593Smuzhiyun struct atp867x_priv *dp = ap->private_data;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun printk(KERN_DEBUG "ATP867X: port[%d] addresses\n"
294*4882a593Smuzhiyun " cmd_addr =0x%llx, 0x%llx\n"
295*4882a593Smuzhiyun " ctl_addr =0x%llx, 0x%llx\n"
296*4882a593Smuzhiyun " bmdma_addr =0x%llx, 0x%llx\n"
297*4882a593Smuzhiyun " data_addr =0x%llx\n"
298*4882a593Smuzhiyun " error_addr =0x%llx\n"
299*4882a593Smuzhiyun " feature_addr =0x%llx\n"
300*4882a593Smuzhiyun " nsect_addr =0x%llx\n"
301*4882a593Smuzhiyun " lbal_addr =0x%llx\n"
302*4882a593Smuzhiyun " lbam_addr =0x%llx\n"
303*4882a593Smuzhiyun " lbah_addr =0x%llx\n"
304*4882a593Smuzhiyun " device_addr =0x%llx\n"
305*4882a593Smuzhiyun " status_addr =0x%llx\n"
306*4882a593Smuzhiyun " command_addr =0x%llx\n"
307*4882a593Smuzhiyun " dp->dma_mode =0x%llx\n"
308*4882a593Smuzhiyun " dp->mstr_piospd =0x%llx\n"
309*4882a593Smuzhiyun " dp->slave_piospd =0x%llx\n"
310*4882a593Smuzhiyun " dp->eightb_piospd =0x%llx\n"
311*4882a593Smuzhiyun " dp->pci66mhz =0x%lx\n",
312*4882a593Smuzhiyun port,
313*4882a593Smuzhiyun (unsigned long long)ioaddr->cmd_addr,
314*4882a593Smuzhiyun (unsigned long long)ATP867X_IO_PORTBASE(ap, port),
315*4882a593Smuzhiyun (unsigned long long)ioaddr->ctl_addr,
316*4882a593Smuzhiyun (unsigned long long)ATP867X_IO_ALTSTATUS(ap, port),
317*4882a593Smuzhiyun (unsigned long long)ioaddr->bmdma_addr,
318*4882a593Smuzhiyun (unsigned long long)ATP867X_IO_DMABASE(ap, port),
319*4882a593Smuzhiyun (unsigned long long)ioaddr->data_addr,
320*4882a593Smuzhiyun (unsigned long long)ioaddr->error_addr,
321*4882a593Smuzhiyun (unsigned long long)ioaddr->feature_addr,
322*4882a593Smuzhiyun (unsigned long long)ioaddr->nsect_addr,
323*4882a593Smuzhiyun (unsigned long long)ioaddr->lbal_addr,
324*4882a593Smuzhiyun (unsigned long long)ioaddr->lbam_addr,
325*4882a593Smuzhiyun (unsigned long long)ioaddr->lbah_addr,
326*4882a593Smuzhiyun (unsigned long long)ioaddr->device_addr,
327*4882a593Smuzhiyun (unsigned long long)ioaddr->status_addr,
328*4882a593Smuzhiyun (unsigned long long)ioaddr->command_addr,
329*4882a593Smuzhiyun (unsigned long long)dp->dma_mode,
330*4882a593Smuzhiyun (unsigned long long)dp->mstr_piospd,
331*4882a593Smuzhiyun (unsigned long long)dp->slave_piospd,
332*4882a593Smuzhiyun (unsigned long long)dp->eightb_piospd,
333*4882a593Smuzhiyun (unsigned long)dp->pci66mhz);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun #endif
336*4882a593Smuzhiyun
atp867x_set_priv(struct ata_port * ap)337*4882a593Smuzhiyun static int atp867x_set_priv(struct ata_port *ap)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(ap->host->dev);
340*4882a593Smuzhiyun struct atp867x_priv *dp;
341*4882a593Smuzhiyun int port = ap->port_no;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun dp = ap->private_data =
344*4882a593Smuzhiyun devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
345*4882a593Smuzhiyun if (dp == NULL)
346*4882a593Smuzhiyun return -ENOMEM;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
349*4882a593Smuzhiyun dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
350*4882a593Smuzhiyun dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
351*4882a593Smuzhiyun dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun dp->pci66mhz =
354*4882a593Smuzhiyun ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun return 0;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
atp867x_fixup(struct ata_host * host)359*4882a593Smuzhiyun static void atp867x_fixup(struct ata_host *host)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(host->dev);
362*4882a593Smuzhiyun struct ata_port *ap = host->ports[0];
363*4882a593Smuzhiyun int i;
364*4882a593Smuzhiyun u8 v;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /*
367*4882a593Smuzhiyun * Broken BIOS might not set latency high enough
368*4882a593Smuzhiyun */
369*4882a593Smuzhiyun pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
370*4882a593Smuzhiyun if (v < 0x80) {
371*4882a593Smuzhiyun v = 0x80;
372*4882a593Smuzhiyun pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
373*4882a593Smuzhiyun printk(KERN_DEBUG "ATP867X: set latency timer of device %s"
374*4882a593Smuzhiyun " to %d\n", pci_name(pdev), v);
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /*
378*4882a593Smuzhiyun * init 8bit io ports speed(0aaarrrr) to 43h and
379*4882a593Smuzhiyun * init udma modes of master/slave to 0/0(11h)
380*4882a593Smuzhiyun */
381*4882a593Smuzhiyun for (i = 0; i < ATP867X_NUM_PORTS; i++)
382*4882a593Smuzhiyun iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun /*
385*4882a593Smuzhiyun * init PreREAD counts
386*4882a593Smuzhiyun */
387*4882a593Smuzhiyun for (i = 0; i < ATP867X_NUM_PORTS; i++)
388*4882a593Smuzhiyun iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun v = ioread8(ATP867X_IOBASE(ap) + 0x28);
391*4882a593Smuzhiyun v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
392*4882a593Smuzhiyun v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
393*4882a593Smuzhiyun iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun /*
396*4882a593Smuzhiyun * Turn off the over clocked udma5 mode, only for Rev-B
397*4882a593Smuzhiyun */
398*4882a593Smuzhiyun v = ioread8(ATP867X_SYS_INFO(ap));
399*4882a593Smuzhiyun v &= ATP867X_IO_SYS_MASK_RESERVED;
400*4882a593Smuzhiyun if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
401*4882a593Smuzhiyun v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
402*4882a593Smuzhiyun iowrite8(v, ATP867X_SYS_INFO(ap));
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
atp867x_ata_pci_sff_init_host(struct ata_host * host)405*4882a593Smuzhiyun static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun struct device *gdev = host->dev;
408*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(gdev);
409*4882a593Smuzhiyun unsigned int mask = 0;
410*4882a593Smuzhiyun int i, rc;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /*
413*4882a593Smuzhiyun * do not map rombase
414*4882a593Smuzhiyun */
415*4882a593Smuzhiyun rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
416*4882a593Smuzhiyun if (rc == -EBUSY)
417*4882a593Smuzhiyun pcim_pin_device(pdev);
418*4882a593Smuzhiyun if (rc)
419*4882a593Smuzhiyun return rc;
420*4882a593Smuzhiyun host->iomap = pcim_iomap_table(pdev);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun #ifdef ATP867X_DEBUG
423*4882a593Smuzhiyun atp867x_check_res(pdev);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun for (i = 0; i < PCI_STD_NUM_BARS; i++)
426*4882a593Smuzhiyun printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i,
427*4882a593Smuzhiyun (unsigned long long)(host->iomap[i]));
428*4882a593Smuzhiyun #endif
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun /*
431*4882a593Smuzhiyun * request, iomap BARs and init port addresses accordingly
432*4882a593Smuzhiyun */
433*4882a593Smuzhiyun for (i = 0; i < host->n_ports; i++) {
434*4882a593Smuzhiyun struct ata_port *ap = host->ports[i];
435*4882a593Smuzhiyun struct ata_ioports *ioaddr = &ap->ioaddr;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
438*4882a593Smuzhiyun ioaddr->ctl_addr = ioaddr->altstatus_addr
439*4882a593Smuzhiyun = ATP867X_IO_ALTSTATUS(ap, i);
440*4882a593Smuzhiyun ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun ata_sff_std_ports(ioaddr);
443*4882a593Smuzhiyun rc = atp867x_set_priv(ap);
444*4882a593Smuzhiyun if (rc)
445*4882a593Smuzhiyun return rc;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun #ifdef ATP867X_DEBUG
448*4882a593Smuzhiyun atp867x_check_ports(ap, i);
449*4882a593Smuzhiyun #endif
450*4882a593Smuzhiyun ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
451*4882a593Smuzhiyun (unsigned long)ioaddr->cmd_addr,
452*4882a593Smuzhiyun (unsigned long)ioaddr->ctl_addr);
453*4882a593Smuzhiyun ata_port_desc(ap, "bmdma 0x%lx",
454*4882a593Smuzhiyun (unsigned long)ioaddr->bmdma_addr);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun mask |= 1 << i;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun if (!mask) {
460*4882a593Smuzhiyun dev_err(gdev, "no available native port\n");
461*4882a593Smuzhiyun return -ENODEV;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun atp867x_fixup(host);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
atp867x_init_one(struct pci_dev * pdev,const struct pci_device_id * id)469*4882a593Smuzhiyun static int atp867x_init_one(struct pci_dev *pdev,
470*4882a593Smuzhiyun const struct pci_device_id *id)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun static const struct ata_port_info info_867x = {
473*4882a593Smuzhiyun .flags = ATA_FLAG_SLAVE_POSS,
474*4882a593Smuzhiyun .pio_mask = ATA_PIO4,
475*4882a593Smuzhiyun .udma_mask = ATA_UDMA6,
476*4882a593Smuzhiyun .port_ops = &atp867x_ops,
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun struct ata_host *host;
480*4882a593Smuzhiyun const struct ata_port_info *ppi[] = { &info_867x, NULL };
481*4882a593Smuzhiyun int rc;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun ata_print_version_once(&pdev->dev, DRV_VERSION);
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun rc = pcim_enable_device(pdev);
486*4882a593Smuzhiyun if (rc)
487*4882a593Smuzhiyun return rc;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
490*4882a593Smuzhiyun pdev->device);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
493*4882a593Smuzhiyun if (!host) {
494*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to allocate ATA host\n");
495*4882a593Smuzhiyun rc = -ENOMEM;
496*4882a593Smuzhiyun goto err_out;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun rc = atp867x_ata_pci_sff_init_host(host);
500*4882a593Smuzhiyun if (rc) {
501*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to init host\n");
502*4882a593Smuzhiyun goto err_out;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun pci_set_master(pdev);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
508*4882a593Smuzhiyun IRQF_SHARED, &atp867x_sht);
509*4882a593Smuzhiyun if (rc)
510*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to activate host\n");
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun err_out:
513*4882a593Smuzhiyun return rc;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
atp867x_reinit_one(struct pci_dev * pdev)517*4882a593Smuzhiyun static int atp867x_reinit_one(struct pci_dev *pdev)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun struct ata_host *host = pci_get_drvdata(pdev);
520*4882a593Smuzhiyun int rc;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun rc = ata_pci_device_do_resume(pdev);
523*4882a593Smuzhiyun if (rc)
524*4882a593Smuzhiyun return rc;
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun atp867x_fixup(host);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun ata_host_resume(host);
529*4882a593Smuzhiyun return 0;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun #endif
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun static struct pci_device_id atp867x_pci_tbl[] = {
534*4882a593Smuzhiyun { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
535*4882a593Smuzhiyun { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
536*4882a593Smuzhiyun { },
537*4882a593Smuzhiyun };
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun static struct pci_driver atp867x_driver = {
540*4882a593Smuzhiyun .name = DRV_NAME,
541*4882a593Smuzhiyun .id_table = atp867x_pci_tbl,
542*4882a593Smuzhiyun .probe = atp867x_init_one,
543*4882a593Smuzhiyun .remove = ata_pci_remove_one,
544*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
545*4882a593Smuzhiyun .suspend = ata_pci_device_suspend,
546*4882a593Smuzhiyun .resume = atp867x_reinit_one,
547*4882a593Smuzhiyun #endif
548*4882a593Smuzhiyun };
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun module_pci_driver(atp867x_driver);
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
553*4882a593Smuzhiyun MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
554*4882a593Smuzhiyun MODULE_LICENSE("GPL");
555*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
556*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
557