xref: /OK3568_Linux_fs/kernel/drivers/ata/ahci_seattle.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * AMD Seattle AHCI SATA driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2015, Advanced Micro Devices
6*4882a593Smuzhiyun  * Author: Brijesh Singh <brijesh.singh@amd.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pm.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/of_device.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/libata.h>
18*4882a593Smuzhiyun #include <linux/ahci_platform.h>
19*4882a593Smuzhiyun #include <linux/acpi.h>
20*4882a593Smuzhiyun #include <linux/pci_ids.h>
21*4882a593Smuzhiyun #include "ahci.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* SGPIO Control Register definition
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * Bit		Type		Description
26*4882a593Smuzhiyun  * 31		RW		OD7.2 (activity)
27*4882a593Smuzhiyun  * 30		RW		OD7.1 (locate)
28*4882a593Smuzhiyun  * 29		RW		OD7.0 (fault)
29*4882a593Smuzhiyun  * 28...8	RW		OD6.2...OD0.0 (3bits per port, 1 bit per LED)
30*4882a593Smuzhiyun  * 7		RO		SGPIO feature flag
31*4882a593Smuzhiyun  * 6:4		RO		Reserved
32*4882a593Smuzhiyun  * 3:0		RO		Number of ports (0 means no port supported)
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun #define ACTIVITY_BIT_POS(x)		(8 + (3 * x))
35*4882a593Smuzhiyun #define LOCATE_BIT_POS(x)		(ACTIVITY_BIT_POS(x) + 1)
36*4882a593Smuzhiyun #define FAULT_BIT_POS(x)		(LOCATE_BIT_POS(x) + 1)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define ACTIVITY_MASK			0x00010000
39*4882a593Smuzhiyun #define LOCATE_MASK			0x00080000
40*4882a593Smuzhiyun #define FAULT_MASK			0x00400000
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define DRV_NAME "ahci-seattle"
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
45*4882a593Smuzhiyun 					    ssize_t size);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun struct seattle_plat_data {
48*4882a593Smuzhiyun 	void __iomem *sgpio_ctrl;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static struct ata_port_operations ahci_port_ops = {
52*4882a593Smuzhiyun 	.inherits		= &ahci_ops,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static const struct ata_port_info ahci_port_info = {
56*4882a593Smuzhiyun 	.flags		= AHCI_FLAG_COMMON,
57*4882a593Smuzhiyun 	.pio_mask	= ATA_PIO4,
58*4882a593Smuzhiyun 	.udma_mask	= ATA_UDMA6,
59*4882a593Smuzhiyun 	.port_ops	= &ahci_port_ops,
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static struct ata_port_operations ahci_seattle_ops = {
63*4882a593Smuzhiyun 	.inherits		= &ahci_ops,
64*4882a593Smuzhiyun 	.transmit_led_message   = seattle_transmit_led_message,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static const struct ata_port_info ahci_port_seattle_info = {
68*4882a593Smuzhiyun 	.flags		= AHCI_FLAG_COMMON | ATA_FLAG_EM | ATA_FLAG_SW_ACTIVITY,
69*4882a593Smuzhiyun 	.link_flags	= ATA_LFLAG_SW_ACTIVITY,
70*4882a593Smuzhiyun 	.pio_mask	= ATA_PIO4,
71*4882a593Smuzhiyun 	.udma_mask	= ATA_UDMA6,
72*4882a593Smuzhiyun 	.port_ops	= &ahci_seattle_ops,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static struct scsi_host_template ahci_platform_sht = {
76*4882a593Smuzhiyun 	AHCI_SHT(DRV_NAME),
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
seattle_transmit_led_message(struct ata_port * ap,u32 state,ssize_t size)79*4882a593Smuzhiyun static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
80*4882a593Smuzhiyun 					    ssize_t size)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct ahci_host_priv *hpriv = ap->host->private_data;
83*4882a593Smuzhiyun 	struct ahci_port_priv *pp = ap->private_data;
84*4882a593Smuzhiyun 	struct seattle_plat_data *plat_data = hpriv->plat_data;
85*4882a593Smuzhiyun 	unsigned long flags;
86*4882a593Smuzhiyun 	int pmp;
87*4882a593Smuzhiyun 	struct ahci_em_priv *emp;
88*4882a593Smuzhiyun 	u32 val;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	/* get the slot number from the message */
91*4882a593Smuzhiyun 	pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
92*4882a593Smuzhiyun 	if (pmp >= EM_MAX_SLOTS)
93*4882a593Smuzhiyun 		return -EINVAL;
94*4882a593Smuzhiyun 	emp = &pp->em_priv[pmp];
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	val = ioread32(plat_data->sgpio_ctrl);
97*4882a593Smuzhiyun 	if (state & ACTIVITY_MASK)
98*4882a593Smuzhiyun 		val |= 1 << ACTIVITY_BIT_POS((ap->port_no));
99*4882a593Smuzhiyun 	else
100*4882a593Smuzhiyun 		val &= ~(1 << ACTIVITY_BIT_POS((ap->port_no)));
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (state & LOCATE_MASK)
103*4882a593Smuzhiyun 		val |= 1 << LOCATE_BIT_POS((ap->port_no));
104*4882a593Smuzhiyun 	else
105*4882a593Smuzhiyun 		val &= ~(1 << LOCATE_BIT_POS((ap->port_no)));
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	if (state & FAULT_MASK)
108*4882a593Smuzhiyun 		val |= 1 << FAULT_BIT_POS((ap->port_no));
109*4882a593Smuzhiyun 	else
110*4882a593Smuzhiyun 		val &= ~(1 << FAULT_BIT_POS((ap->port_no)));
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	iowrite32(val, plat_data->sgpio_ctrl);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	spin_lock_irqsave(ap->lock, flags);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* save off new led state for port/slot */
117*4882a593Smuzhiyun 	emp->led_state = state;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	spin_unlock_irqrestore(ap->lock, flags);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	return size;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
ahci_seattle_get_port_info(struct platform_device * pdev,struct ahci_host_priv * hpriv)124*4882a593Smuzhiyun static const struct ata_port_info *ahci_seattle_get_port_info(
125*4882a593Smuzhiyun 		struct platform_device *pdev, struct ahci_host_priv *hpriv)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
128*4882a593Smuzhiyun 	struct seattle_plat_data *plat_data;
129*4882a593Smuzhiyun 	u32 val;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL);
132*4882a593Smuzhiyun 	if (!plat_data)
133*4882a593Smuzhiyun 		return &ahci_port_info;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	plat_data->sgpio_ctrl = devm_ioremap_resource(dev,
136*4882a593Smuzhiyun 			      platform_get_resource(pdev, IORESOURCE_MEM, 1));
137*4882a593Smuzhiyun 	if (IS_ERR(plat_data->sgpio_ctrl))
138*4882a593Smuzhiyun 		return &ahci_port_info;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	val = ioread32(plat_data->sgpio_ctrl);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (!(val & 0xf))
143*4882a593Smuzhiyun 		return &ahci_port_info;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	hpriv->em_loc = 0;
146*4882a593Smuzhiyun 	hpriv->em_buf_sz = 4;
147*4882a593Smuzhiyun 	hpriv->em_msg_type = EM_MSG_TYPE_LED;
148*4882a593Smuzhiyun 	hpriv->plat_data = plat_data;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	dev_info(dev, "SGPIO LED control is enabled.\n");
151*4882a593Smuzhiyun 	return &ahci_port_seattle_info;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
ahci_seattle_probe(struct platform_device * pdev)154*4882a593Smuzhiyun static int ahci_seattle_probe(struct platform_device *pdev)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	int rc;
157*4882a593Smuzhiyun 	struct ahci_host_priv *hpriv;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	hpriv = ahci_platform_get_resources(pdev, 0);
160*4882a593Smuzhiyun 	if (IS_ERR(hpriv))
161*4882a593Smuzhiyun 		return PTR_ERR(hpriv);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	rc = ahci_platform_enable_resources(hpriv);
164*4882a593Smuzhiyun 	if (rc)
165*4882a593Smuzhiyun 		return rc;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	rc = ahci_platform_init_host(pdev, hpriv,
168*4882a593Smuzhiyun 				     ahci_seattle_get_port_info(pdev, hpriv),
169*4882a593Smuzhiyun 				     &ahci_platform_sht);
170*4882a593Smuzhiyun 	if (rc)
171*4882a593Smuzhiyun 		goto disable_resources;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	return 0;
174*4882a593Smuzhiyun disable_resources:
175*4882a593Smuzhiyun 	ahci_platform_disable_resources(hpriv);
176*4882a593Smuzhiyun 	return rc;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
180*4882a593Smuzhiyun 			 ahci_platform_resume);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun static const struct acpi_device_id ahci_acpi_match[] = {
183*4882a593Smuzhiyun 	{ "AMDI0600", 0 },
184*4882a593Smuzhiyun 	{}
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun static struct platform_driver ahci_seattle_driver = {
189*4882a593Smuzhiyun 	.probe = ahci_seattle_probe,
190*4882a593Smuzhiyun 	.remove = ata_platform_remove_one,
191*4882a593Smuzhiyun 	.driver = {
192*4882a593Smuzhiyun 		.name = DRV_NAME,
193*4882a593Smuzhiyun 		.acpi_match_table = ahci_acpi_match,
194*4882a593Smuzhiyun 		.pm = &ahci_pm_ops,
195*4882a593Smuzhiyun 	},
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun module_platform_driver(ahci_seattle_driver);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun MODULE_DESCRIPTION("Seattle AHCI SATA platform driver");
200*4882a593Smuzhiyun MODULE_AUTHOR("Brijesh Singh <brijesh.singh@amd.com>");
201*4882a593Smuzhiyun MODULE_LICENSE("GPL");
202*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRV_NAME);
203