1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * XPower AXP288 PMIC operation region driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Intel Corporation. All rights reserved.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/acpi.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/mfd/axp20x.h>
11*4882a593Smuzhiyun #include <linux/regmap.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <asm/iosf_mbi.h>
14*4882a593Smuzhiyun #include "intel_pmic.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define XPOWER_GPADC_LOW 0x5b
17*4882a593Smuzhiyun #define XPOWER_GPI1_CTRL 0x92
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define GPI1_LDO_MASK GENMASK(2, 0)
20*4882a593Smuzhiyun #define GPI1_LDO_ON (3 << 0)
21*4882a593Smuzhiyun #define GPI1_LDO_OFF (4 << 0)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define AXP288_ADC_TS_CURRENT_ON_OFF_MASK GENMASK(1, 0)
24*4882a593Smuzhiyun #define AXP288_ADC_TS_CURRENT_OFF (0 << 0)
25*4882a593Smuzhiyun #define AXP288_ADC_TS_CURRENT_ON_WHEN_CHARGING (1 << 0)
26*4882a593Smuzhiyun #define AXP288_ADC_TS_CURRENT_ON_ONDEMAND (2 << 0)
27*4882a593Smuzhiyun #define AXP288_ADC_TS_CURRENT_ON (3 << 0)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun static struct pmic_table power_table[] = {
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun .address = 0x00,
32*4882a593Smuzhiyun .reg = 0x13,
33*4882a593Smuzhiyun .bit = 0x05,
34*4882a593Smuzhiyun }, /* ALD1 */
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun .address = 0x04,
37*4882a593Smuzhiyun .reg = 0x13,
38*4882a593Smuzhiyun .bit = 0x06,
39*4882a593Smuzhiyun }, /* ALD2 */
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun .address = 0x08,
42*4882a593Smuzhiyun .reg = 0x13,
43*4882a593Smuzhiyun .bit = 0x07,
44*4882a593Smuzhiyun }, /* ALD3 */
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun .address = 0x0c,
47*4882a593Smuzhiyun .reg = 0x12,
48*4882a593Smuzhiyun .bit = 0x03,
49*4882a593Smuzhiyun }, /* DLD1 */
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun .address = 0x10,
52*4882a593Smuzhiyun .reg = 0x12,
53*4882a593Smuzhiyun .bit = 0x04,
54*4882a593Smuzhiyun }, /* DLD2 */
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun .address = 0x14,
57*4882a593Smuzhiyun .reg = 0x12,
58*4882a593Smuzhiyun .bit = 0x05,
59*4882a593Smuzhiyun }, /* DLD3 */
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun .address = 0x18,
62*4882a593Smuzhiyun .reg = 0x12,
63*4882a593Smuzhiyun .bit = 0x06,
64*4882a593Smuzhiyun }, /* DLD4 */
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun .address = 0x1c,
67*4882a593Smuzhiyun .reg = 0x12,
68*4882a593Smuzhiyun .bit = 0x00,
69*4882a593Smuzhiyun }, /* ELD1 */
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun .address = 0x20,
72*4882a593Smuzhiyun .reg = 0x12,
73*4882a593Smuzhiyun .bit = 0x01,
74*4882a593Smuzhiyun }, /* ELD2 */
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun .address = 0x24,
77*4882a593Smuzhiyun .reg = 0x12,
78*4882a593Smuzhiyun .bit = 0x02,
79*4882a593Smuzhiyun }, /* ELD3 */
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun .address = 0x28,
82*4882a593Smuzhiyun .reg = 0x13,
83*4882a593Smuzhiyun .bit = 0x02,
84*4882a593Smuzhiyun }, /* FLD1 */
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun .address = 0x2c,
87*4882a593Smuzhiyun .reg = 0x13,
88*4882a593Smuzhiyun .bit = 0x03,
89*4882a593Smuzhiyun }, /* FLD2 */
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun .address = 0x30,
92*4882a593Smuzhiyun .reg = 0x13,
93*4882a593Smuzhiyun .bit = 0x04,
94*4882a593Smuzhiyun }, /* FLD3 */
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun .address = 0x34,
97*4882a593Smuzhiyun .reg = 0x10,
98*4882a593Smuzhiyun .bit = 0x03,
99*4882a593Smuzhiyun }, /* BUC1 */
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun .address = 0x38,
102*4882a593Smuzhiyun .reg = 0x10,
103*4882a593Smuzhiyun .bit = 0x06,
104*4882a593Smuzhiyun }, /* BUC2 */
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun .address = 0x3c,
107*4882a593Smuzhiyun .reg = 0x10,
108*4882a593Smuzhiyun .bit = 0x05,
109*4882a593Smuzhiyun }, /* BUC3 */
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun .address = 0x40,
112*4882a593Smuzhiyun .reg = 0x10,
113*4882a593Smuzhiyun .bit = 0x04,
114*4882a593Smuzhiyun }, /* BUC4 */
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun .address = 0x44,
117*4882a593Smuzhiyun .reg = 0x10,
118*4882a593Smuzhiyun .bit = 0x01,
119*4882a593Smuzhiyun }, /* BUC5 */
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun .address = 0x48,
122*4882a593Smuzhiyun .reg = 0x10,
123*4882a593Smuzhiyun .bit = 0x00
124*4882a593Smuzhiyun }, /* BUC6 */
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun .address = 0x4c,
127*4882a593Smuzhiyun .reg = 0x92,
128*4882a593Smuzhiyun }, /* GPI1 */
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* TMP0 - TMP5 are the same, all from GPADC */
132*4882a593Smuzhiyun static struct pmic_table thermal_table[] = {
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun .address = 0x00,
135*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun .address = 0x0c,
139*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
140*4882a593Smuzhiyun },
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun .address = 0x18,
143*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
144*4882a593Smuzhiyun },
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun .address = 0x24,
147*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
148*4882a593Smuzhiyun },
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun .address = 0x30,
151*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
152*4882a593Smuzhiyun },
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun .address = 0x3c,
155*4882a593Smuzhiyun .reg = XPOWER_GPADC_LOW
156*4882a593Smuzhiyun },
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
intel_xpower_pmic_get_power(struct regmap * regmap,int reg,int bit,u64 * value)159*4882a593Smuzhiyun static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg,
160*4882a593Smuzhiyun int bit, u64 *value)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun int data;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (regmap_read(regmap, reg, &data))
165*4882a593Smuzhiyun return -EIO;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* GPIO1 LDO regulator needs special handling */
168*4882a593Smuzhiyun if (reg == XPOWER_GPI1_CTRL)
169*4882a593Smuzhiyun *value = ((data & GPI1_LDO_MASK) == GPI1_LDO_ON);
170*4882a593Smuzhiyun else
171*4882a593Smuzhiyun *value = (data & BIT(bit)) ? 1 : 0;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun return 0;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
intel_xpower_pmic_update_power(struct regmap * regmap,int reg,int bit,bool on)176*4882a593Smuzhiyun static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg,
177*4882a593Smuzhiyun int bit, bool on)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun int data, ret;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* GPIO1 LDO regulator needs special handling */
182*4882a593Smuzhiyun if (reg == XPOWER_GPI1_CTRL)
183*4882a593Smuzhiyun return regmap_update_bits(regmap, reg, GPI1_LDO_MASK,
184*4882a593Smuzhiyun on ? GPI1_LDO_ON : GPI1_LDO_OFF);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun ret = iosf_mbi_block_punit_i2c_access();
187*4882a593Smuzhiyun if (ret)
188*4882a593Smuzhiyun return ret;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (regmap_read(regmap, reg, &data)) {
191*4882a593Smuzhiyun ret = -EIO;
192*4882a593Smuzhiyun goto out;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun if (on)
196*4882a593Smuzhiyun data |= BIT(bit);
197*4882a593Smuzhiyun else
198*4882a593Smuzhiyun data &= ~BIT(bit);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (regmap_write(regmap, reg, data))
201*4882a593Smuzhiyun ret = -EIO;
202*4882a593Smuzhiyun out:
203*4882a593Smuzhiyun iosf_mbi_unblock_punit_i2c_access();
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun return ret;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun /**
209*4882a593Smuzhiyun * intel_xpower_pmic_get_raw_temp(): Get raw temperature reading from the PMIC
210*4882a593Smuzhiyun *
211*4882a593Smuzhiyun * @regmap: regmap of the PMIC device
212*4882a593Smuzhiyun * @reg: register to get the reading
213*4882a593Smuzhiyun *
214*4882a593Smuzhiyun * Return a positive value on success, errno on failure.
215*4882a593Smuzhiyun */
intel_xpower_pmic_get_raw_temp(struct regmap * regmap,int reg)216*4882a593Smuzhiyun static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun int ret, adc_ts_pin_ctrl;
219*4882a593Smuzhiyun u8 buf[2];
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun /*
222*4882a593Smuzhiyun * The current-source used for the battery temp-sensor (TS) is shared
223*4882a593Smuzhiyun * with the GPADC. For proper fuel-gauge and charger operation the TS
224*4882a593Smuzhiyun * current-source needs to be permanently on. But to read the GPADC we
225*4882a593Smuzhiyun * need to temporary switch the TS current-source to ondemand, so that
226*4882a593Smuzhiyun * the GPADC can use it, otherwise we will always read an all 0 value.
227*4882a593Smuzhiyun *
228*4882a593Smuzhiyun * Note that the switching from on to on-ondemand is not necessary
229*4882a593Smuzhiyun * when the TS current-source is off (this happens on devices which
230*4882a593Smuzhiyun * do not use the TS-pin).
231*4882a593Smuzhiyun */
232*4882a593Smuzhiyun ret = regmap_read(regmap, AXP288_ADC_TS_PIN_CTRL, &adc_ts_pin_ctrl);
233*4882a593Smuzhiyun if (ret)
234*4882a593Smuzhiyun return ret;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (adc_ts_pin_ctrl & AXP288_ADC_TS_CURRENT_ON_OFF_MASK) {
237*4882a593Smuzhiyun ret = regmap_update_bits(regmap, AXP288_ADC_TS_PIN_CTRL,
238*4882a593Smuzhiyun AXP288_ADC_TS_CURRENT_ON_OFF_MASK,
239*4882a593Smuzhiyun AXP288_ADC_TS_CURRENT_ON_ONDEMAND);
240*4882a593Smuzhiyun if (ret)
241*4882a593Smuzhiyun return ret;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* Wait a bit after switching the current-source */
244*4882a593Smuzhiyun usleep_range(6000, 10000);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun ret = regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2);
248*4882a593Smuzhiyun if (ret == 0)
249*4882a593Smuzhiyun ret = (buf[0] << 4) + ((buf[1] >> 4) & 0x0f);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun if (adc_ts_pin_ctrl & AXP288_ADC_TS_CURRENT_ON_OFF_MASK) {
252*4882a593Smuzhiyun regmap_update_bits(regmap, AXP288_ADC_TS_PIN_CTRL,
253*4882a593Smuzhiyun AXP288_ADC_TS_CURRENT_ON_OFF_MASK,
254*4882a593Smuzhiyun AXP288_ADC_TS_CURRENT_ON);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return ret;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = {
261*4882a593Smuzhiyun .get_power = intel_xpower_pmic_get_power,
262*4882a593Smuzhiyun .update_power = intel_xpower_pmic_update_power,
263*4882a593Smuzhiyun .get_raw_temp = intel_xpower_pmic_get_raw_temp,
264*4882a593Smuzhiyun .power_table = power_table,
265*4882a593Smuzhiyun .power_table_count = ARRAY_SIZE(power_table),
266*4882a593Smuzhiyun .thermal_table = thermal_table,
267*4882a593Smuzhiyun .thermal_table_count = ARRAY_SIZE(thermal_table),
268*4882a593Smuzhiyun .pmic_i2c_address = 0x34,
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
intel_xpower_pmic_gpio_handler(u32 function,acpi_physical_address address,u32 bit_width,u64 * value,void * handler_context,void * region_context)271*4882a593Smuzhiyun static acpi_status intel_xpower_pmic_gpio_handler(u32 function,
272*4882a593Smuzhiyun acpi_physical_address address, u32 bit_width, u64 *value,
273*4882a593Smuzhiyun void *handler_context, void *region_context)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun return AE_OK;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
intel_xpower_pmic_opregion_probe(struct platform_device * pdev)278*4882a593Smuzhiyun static int intel_xpower_pmic_opregion_probe(struct platform_device *pdev)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun struct device *parent = pdev->dev.parent;
281*4882a593Smuzhiyun struct axp20x_dev *axp20x = dev_get_drvdata(parent);
282*4882a593Smuzhiyun acpi_status status;
283*4882a593Smuzhiyun int result;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun status = acpi_install_address_space_handler(ACPI_HANDLE(parent),
286*4882a593Smuzhiyun ACPI_ADR_SPACE_GPIO, intel_xpower_pmic_gpio_handler,
287*4882a593Smuzhiyun NULL, NULL);
288*4882a593Smuzhiyun if (ACPI_FAILURE(status))
289*4882a593Smuzhiyun return -ENODEV;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun result = intel_pmic_install_opregion_handler(&pdev->dev,
292*4882a593Smuzhiyun ACPI_HANDLE(parent), axp20x->regmap,
293*4882a593Smuzhiyun &intel_xpower_pmic_opregion_data);
294*4882a593Smuzhiyun if (result)
295*4882a593Smuzhiyun acpi_remove_address_space_handler(ACPI_HANDLE(parent),
296*4882a593Smuzhiyun ACPI_ADR_SPACE_GPIO,
297*4882a593Smuzhiyun intel_xpower_pmic_gpio_handler);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return result;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun static struct platform_driver intel_xpower_pmic_opregion_driver = {
303*4882a593Smuzhiyun .probe = intel_xpower_pmic_opregion_probe,
304*4882a593Smuzhiyun .driver = {
305*4882a593Smuzhiyun .name = "axp288_pmic_acpi",
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun builtin_platform_driver(intel_xpower_pmic_opregion_driver);
309