1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Dollar Cove TI PMIC operation region driver
4*4882a593Smuzhiyun * Copyright (C) 2014 Intel Corporation. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Rewritten and cleaned up
7*4882a593Smuzhiyun * Copyright (C) 2017 Takashi Iwai <tiwai@suse.de>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/acpi.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/mfd/intel_soc_pmic.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include "intel_pmic.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* registers stored in 16bit BE (high:low, total 10bit) */
17*4882a593Smuzhiyun #define CHTDC_TI_VBAT 0x54
18*4882a593Smuzhiyun #define CHTDC_TI_DIETEMP 0x56
19*4882a593Smuzhiyun #define CHTDC_TI_BPTHERM 0x58
20*4882a593Smuzhiyun #define CHTDC_TI_GPADC 0x5a
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static struct pmic_table chtdc_ti_power_table[] = {
23*4882a593Smuzhiyun { .address = 0x00, .reg = 0x41 },
24*4882a593Smuzhiyun { .address = 0x04, .reg = 0x42 },
25*4882a593Smuzhiyun { .address = 0x08, .reg = 0x43 },
26*4882a593Smuzhiyun { .address = 0x0c, .reg = 0x45 },
27*4882a593Smuzhiyun { .address = 0x10, .reg = 0x46 },
28*4882a593Smuzhiyun { .address = 0x14, .reg = 0x47 },
29*4882a593Smuzhiyun { .address = 0x18, .reg = 0x48 },
30*4882a593Smuzhiyun { .address = 0x1c, .reg = 0x49 },
31*4882a593Smuzhiyun { .address = 0x20, .reg = 0x4a },
32*4882a593Smuzhiyun { .address = 0x24, .reg = 0x4b },
33*4882a593Smuzhiyun { .address = 0x28, .reg = 0x4c },
34*4882a593Smuzhiyun { .address = 0x2c, .reg = 0x4d },
35*4882a593Smuzhiyun { .address = 0x30, .reg = 0x4e },
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct pmic_table chtdc_ti_thermal_table[] = {
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun .address = 0x00,
41*4882a593Smuzhiyun .reg = CHTDC_TI_GPADC
42*4882a593Smuzhiyun },
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun .address = 0x0c,
45*4882a593Smuzhiyun .reg = CHTDC_TI_GPADC
46*4882a593Smuzhiyun },
47*4882a593Smuzhiyun /* TMP2 -> SYSTEMP */
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun .address = 0x18,
50*4882a593Smuzhiyun .reg = CHTDC_TI_GPADC
51*4882a593Smuzhiyun },
52*4882a593Smuzhiyun /* TMP3 -> BPTHERM */
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun .address = 0x24,
55*4882a593Smuzhiyun .reg = CHTDC_TI_BPTHERM
56*4882a593Smuzhiyun },
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun .address = 0x30,
59*4882a593Smuzhiyun .reg = CHTDC_TI_GPADC
60*4882a593Smuzhiyun },
61*4882a593Smuzhiyun /* TMP5 -> DIETEMP */
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun .address = 0x3c,
64*4882a593Smuzhiyun .reg = CHTDC_TI_DIETEMP
65*4882a593Smuzhiyun },
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
chtdc_ti_pmic_get_power(struct regmap * regmap,int reg,int bit,u64 * value)68*4882a593Smuzhiyun static int chtdc_ti_pmic_get_power(struct regmap *regmap, int reg, int bit,
69*4882a593Smuzhiyun u64 *value)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun int data;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun if (regmap_read(regmap, reg, &data))
74*4882a593Smuzhiyun return -EIO;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun *value = data & 1;
77*4882a593Smuzhiyun return 0;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
chtdc_ti_pmic_update_power(struct regmap * regmap,int reg,int bit,bool on)80*4882a593Smuzhiyun static int chtdc_ti_pmic_update_power(struct regmap *regmap, int reg, int bit,
81*4882a593Smuzhiyun bool on)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun return regmap_update_bits(regmap, reg, 1, on);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
chtdc_ti_pmic_get_raw_temp(struct regmap * regmap,int reg)86*4882a593Smuzhiyun static int chtdc_ti_pmic_get_raw_temp(struct regmap *regmap, int reg)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun u8 buf[2];
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (regmap_bulk_read(regmap, reg, buf, 2))
91*4882a593Smuzhiyun return -EIO;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* stored in big-endian */
94*4882a593Smuzhiyun return ((buf[0] & 0x03) << 8) | buf[1];
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static struct intel_pmic_opregion_data chtdc_ti_pmic_opregion_data = {
98*4882a593Smuzhiyun .get_power = chtdc_ti_pmic_get_power,
99*4882a593Smuzhiyun .update_power = chtdc_ti_pmic_update_power,
100*4882a593Smuzhiyun .get_raw_temp = chtdc_ti_pmic_get_raw_temp,
101*4882a593Smuzhiyun .power_table = chtdc_ti_power_table,
102*4882a593Smuzhiyun .power_table_count = ARRAY_SIZE(chtdc_ti_power_table),
103*4882a593Smuzhiyun .thermal_table = chtdc_ti_thermal_table,
104*4882a593Smuzhiyun .thermal_table_count = ARRAY_SIZE(chtdc_ti_thermal_table),
105*4882a593Smuzhiyun .pmic_i2c_address = 0x5e,
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
chtdc_ti_pmic_opregion_probe(struct platform_device * pdev)108*4882a593Smuzhiyun static int chtdc_ti_pmic_opregion_probe(struct platform_device *pdev)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
111*4882a593Smuzhiyun int err;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun err = intel_pmic_install_opregion_handler(&pdev->dev,
114*4882a593Smuzhiyun ACPI_HANDLE(pdev->dev.parent), pmic->regmap,
115*4882a593Smuzhiyun &chtdc_ti_pmic_opregion_data);
116*4882a593Smuzhiyun if (err < 0)
117*4882a593Smuzhiyun return err;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Re-enumerate devices depending on PMIC */
120*4882a593Smuzhiyun acpi_walk_dep_device_list(ACPI_HANDLE(pdev->dev.parent));
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static const struct platform_device_id chtdc_ti_pmic_opregion_id_table[] = {
125*4882a593Smuzhiyun { .name = "chtdc_ti_region" },
126*4882a593Smuzhiyun {},
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun static struct platform_driver chtdc_ti_pmic_opregion_driver = {
130*4882a593Smuzhiyun .probe = chtdc_ti_pmic_opregion_probe,
131*4882a593Smuzhiyun .driver = {
132*4882a593Smuzhiyun .name = "cht_dollar_cove_ti_pmic",
133*4882a593Smuzhiyun },
134*4882a593Smuzhiyun .id_table = chtdc_ti_pmic_opregion_id_table,
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun builtin_platform_driver(chtdc_ti_pmic_opregion_driver);
137