xref: /OK3568_Linux_fs/kernel/drivers/acpi/acpica/rsirq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2*4882a593Smuzhiyun /*******************************************************************************
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Module Name: rsirq - IRQ resource descriptors
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  ******************************************************************************/
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <acpi/acpi.h>
9*4882a593Smuzhiyun #include "accommon.h"
10*4882a593Smuzhiyun #include "acresrc.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define _COMPONENT          ACPI_RESOURCES
13*4882a593Smuzhiyun ACPI_MODULE_NAME("rsirq")
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /*******************************************************************************
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * acpi_rs_get_irq
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  ******************************************************************************/
20*4882a593Smuzhiyun struct acpi_rsconvert_info acpi_rs_get_irq[9] = {
21*4882a593Smuzhiyun 	{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_IRQ,
22*4882a593Smuzhiyun 	 ACPI_RS_SIZE(struct acpi_resource_irq),
23*4882a593Smuzhiyun 	 ACPI_RSC_TABLE_SIZE(acpi_rs_get_irq)},
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	/* Get the IRQ mask (bytes 1:2) */
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	{ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
28*4882a593Smuzhiyun 	 AML_OFFSET(irq.irq_mask),
29*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.interrupt_count)},
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	/* Set default flags (others are zero) */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	{ACPI_RSC_SET8, ACPI_RS_OFFSET(data.irq.triggering),
34*4882a593Smuzhiyun 	 ACPI_EDGE_SENSITIVE,
35*4882a593Smuzhiyun 	 1},
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	/* Get the descriptor length (2 or 3 for IRQ descriptor) */
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.descriptor_length),
40*4882a593Smuzhiyun 	 AML_OFFSET(irq.descriptor_type),
41*4882a593Smuzhiyun 	 0},
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	/* All done if no flag byte present in descriptor */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	/* Get flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
50*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
51*4882a593Smuzhiyun 	 0},
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity),
54*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
55*4882a593Smuzhiyun 	 3},
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.shareable),
58*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
59*4882a593Smuzhiyun 	 4},
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable),
62*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
63*4882a593Smuzhiyun 	 5}
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /*******************************************************************************
67*4882a593Smuzhiyun  *
68*4882a593Smuzhiyun  * acpi_rs_set_irq
69*4882a593Smuzhiyun  *
70*4882a593Smuzhiyun  ******************************************************************************/
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct acpi_rsconvert_info acpi_rs_set_irq[14] = {
73*4882a593Smuzhiyun 	/* Start with a default descriptor of length 3 */
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_IRQ,
76*4882a593Smuzhiyun 	 sizeof(struct aml_resource_irq),
77*4882a593Smuzhiyun 	 ACPI_RSC_TABLE_SIZE(acpi_rs_set_irq)},
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/* Convert interrupt list to 16-bit IRQ bitmask */
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	{ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
82*4882a593Smuzhiyun 	 AML_OFFSET(irq.irq_mask),
83*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.interrupt_count)},
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* Set flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
88*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
89*4882a593Smuzhiyun 	 0},
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity),
92*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
93*4882a593Smuzhiyun 	 3},
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.shareable),
96*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
97*4882a593Smuzhiyun 	 4},
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable),
100*4882a593Smuzhiyun 	 AML_OFFSET(irq.flags),
101*4882a593Smuzhiyun 	 5},
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/*
104*4882a593Smuzhiyun 	 * All done if the output descriptor length is required to be 3
105*4882a593Smuzhiyun 	 * (i.e., optimization to 2 bytes cannot be attempted)
106*4882a593Smuzhiyun 	 */
107*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
108*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.descriptor_length),
109*4882a593Smuzhiyun 	 3},
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	/* Set length to 2 bytes (no flags byte) */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)},
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	/*
116*4882a593Smuzhiyun 	 * All done if the output descriptor length is required to be 2.
117*4882a593Smuzhiyun 	 *
118*4882a593Smuzhiyun 	 * TBD: Perhaps we should check for error if input flags are not
119*4882a593Smuzhiyun 	 * compatible with a 2-byte descriptor.
120*4882a593Smuzhiyun 	 */
121*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
122*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.descriptor_length),
123*4882a593Smuzhiyun 	 2},
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* Reset length to 3 bytes (descriptor with flags byte) */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq)},
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	/*
130*4882a593Smuzhiyun 	 * Check if the flags byte is necessary. Not needed if the flags are:
131*4882a593Smuzhiyun 	 * ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH, ACPI_EXCLUSIVE
132*4882a593Smuzhiyun 	 */
133*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
134*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.triggering),
135*4882a593Smuzhiyun 	 ACPI_EDGE_SENSITIVE},
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
138*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.polarity),
139*4882a593Smuzhiyun 	 ACPI_ACTIVE_HIGH},
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
142*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.irq.shareable),
143*4882a593Smuzhiyun 	 ACPI_EXCLUSIVE},
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	/* We can optimize to a 2-byte irq_no_flags() descriptor */
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)}
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun /*******************************************************************************
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  * acpi_rs_convert_ext_irq
153*4882a593Smuzhiyun  *
154*4882a593Smuzhiyun  ******************************************************************************/
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun struct acpi_rsconvert_info acpi_rs_convert_ext_irq[10] = {
157*4882a593Smuzhiyun 	{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_EXTENDED_IRQ,
158*4882a593Smuzhiyun 	 ACPI_RS_SIZE(struct acpi_resource_extended_irq),
159*4882a593Smuzhiyun 	 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_ext_irq)},
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_EXTENDED_IRQ,
162*4882a593Smuzhiyun 	 sizeof(struct aml_resource_extended_irq),
163*4882a593Smuzhiyun 	 0},
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/*
166*4882a593Smuzhiyun 	 * Flags: Producer/Consumer[0], Triggering[1], Polarity[2],
167*4882a593Smuzhiyun 	 *        Sharing[3], Wake[4]
168*4882a593Smuzhiyun 	 */
169*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.producer_consumer),
170*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.flags),
171*4882a593Smuzhiyun 	 0},
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.triggering),
174*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.flags),
175*4882a593Smuzhiyun 	 1},
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.polarity),
178*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.flags),
179*4882a593Smuzhiyun 	 2},
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.shareable),
182*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.flags),
183*4882a593Smuzhiyun 	 3},
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.wake_capable),
186*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.flags),
187*4882a593Smuzhiyun 	 4},
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	/* IRQ Table length (Byte4) */
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	{ACPI_RSC_COUNT, ACPI_RS_OFFSET(data.extended_irq.interrupt_count),
192*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.interrupt_count),
193*4882a593Smuzhiyun 	 sizeof(u32)},
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	/* Copy every IRQ in the table, each is 32 bits */
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	{ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
198*4882a593Smuzhiyun 	 AML_OFFSET(extended_irq.interrupts[0]),
199*4882a593Smuzhiyun 	 0},
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	/* Optional resource_source (Index and String) */
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	{ACPI_RSC_SOURCEX, ACPI_RS_OFFSET(data.extended_irq.resource_source),
204*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
205*4882a593Smuzhiyun 	 sizeof(struct aml_resource_extended_irq)}
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun /*******************************************************************************
209*4882a593Smuzhiyun  *
210*4882a593Smuzhiyun  * acpi_rs_convert_dma
211*4882a593Smuzhiyun  *
212*4882a593Smuzhiyun  ******************************************************************************/
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun struct acpi_rsconvert_info acpi_rs_convert_dma[6] = {
215*4882a593Smuzhiyun 	{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_DMA,
216*4882a593Smuzhiyun 	 ACPI_RS_SIZE(struct acpi_resource_dma),
217*4882a593Smuzhiyun 	 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_dma)},
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_DMA,
220*4882a593Smuzhiyun 	 sizeof(struct aml_resource_dma),
221*4882a593Smuzhiyun 	 0},
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/* Flags: transfer preference, bus mastering, channel speed */
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.transfer),
226*4882a593Smuzhiyun 	 AML_OFFSET(dma.flags),
227*4882a593Smuzhiyun 	 0},
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.dma.bus_master),
230*4882a593Smuzhiyun 	 AML_OFFSET(dma.flags),
231*4882a593Smuzhiyun 	 2},
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.type),
234*4882a593Smuzhiyun 	 AML_OFFSET(dma.flags),
235*4882a593Smuzhiyun 	 5},
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/* DMA channel mask bits */
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	{ACPI_RSC_BITMASK, ACPI_RS_OFFSET(data.dma.channels[0]),
240*4882a593Smuzhiyun 	 AML_OFFSET(dma.dma_channel_mask),
241*4882a593Smuzhiyun 	 ACPI_RS_OFFSET(data.dma.channel_count)}
242*4882a593Smuzhiyun };
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /*******************************************************************************
245*4882a593Smuzhiyun  *
246*4882a593Smuzhiyun  * acpi_rs_convert_fixed_dma
247*4882a593Smuzhiyun  *
248*4882a593Smuzhiyun  ******************************************************************************/
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun struct acpi_rsconvert_info acpi_rs_convert_fixed_dma[4] = {
251*4882a593Smuzhiyun 	{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_FIXED_DMA,
252*4882a593Smuzhiyun 	 ACPI_RS_SIZE(struct acpi_resource_fixed_dma),
253*4882a593Smuzhiyun 	 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_fixed_dma)},
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_FIXED_DMA,
256*4882a593Smuzhiyun 	 sizeof(struct aml_resource_fixed_dma),
257*4882a593Smuzhiyun 	 0},
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/*
260*4882a593Smuzhiyun 	 * These fields are contiguous in both the source and destination:
261*4882a593Smuzhiyun 	 * request_lines
262*4882a593Smuzhiyun 	 * Channels
263*4882a593Smuzhiyun 	 */
264*4882a593Smuzhiyun 	{ACPI_RSC_MOVE16, ACPI_RS_OFFSET(data.fixed_dma.request_lines),
265*4882a593Smuzhiyun 	 AML_OFFSET(fixed_dma.request_lines),
266*4882a593Smuzhiyun 	 2},
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	{ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.fixed_dma.width),
269*4882a593Smuzhiyun 	 AML_OFFSET(fixed_dma.width),
270*4882a593Smuzhiyun 	 1},
271*4882a593Smuzhiyun };
272