xref: /OK3568_Linux_fs/kernel/drivers/acpi/acpica/hwsleep.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Name: hwsleep.c - ACPI Hardware Sleep/Wake Support functions for the
5*4882a593Smuzhiyun  *                   original/legacy sleep/PM registers.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2000 - 2020, Intel Corp.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *****************************************************************************/
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <acpi/acpi.h>
12*4882a593Smuzhiyun #include "accommon.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define _COMPONENT          ACPI_HARDWARE
15*4882a593Smuzhiyun ACPI_MODULE_NAME("hwsleep")
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #if (!ACPI_REDUCED_HARDWARE)	/* Entire module */
18*4882a593Smuzhiyun /*******************************************************************************
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * FUNCTION:    acpi_hw_legacy_sleep
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * PARAMETERS:  sleep_state         - Which sleep state to enter
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * RETURN:      Status
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * DESCRIPTION: Enter a system sleep state via the legacy FADT PM registers
27*4882a593Smuzhiyun  *              THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  ******************************************************************************/
acpi_hw_legacy_sleep(u8 sleep_state)30*4882a593Smuzhiyun acpi_status acpi_hw_legacy_sleep(u8 sleep_state)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	struct acpi_bit_register_info *sleep_type_reg_info;
33*4882a593Smuzhiyun 	struct acpi_bit_register_info *sleep_enable_reg_info;
34*4882a593Smuzhiyun 	u32 pm1a_control;
35*4882a593Smuzhiyun 	u32 pm1b_control;
36*4882a593Smuzhiyun 	u32 in_value;
37*4882a593Smuzhiyun 	acpi_status status;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	ACPI_FUNCTION_TRACE(hw_legacy_sleep);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	sleep_type_reg_info =
42*4882a593Smuzhiyun 	    acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE);
43*4882a593Smuzhiyun 	sleep_enable_reg_info =
44*4882a593Smuzhiyun 	    acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	/* Clear wake status */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	status = acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS,
49*4882a593Smuzhiyun 					 ACPI_CLEAR_STATUS);
50*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
51*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Disable all GPEs */
55*4882a593Smuzhiyun 	status = acpi_hw_disable_all_gpes();
56*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
57*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 	status = acpi_hw_clear_acpi_status();
60*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
61*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
62*4882a593Smuzhiyun 	}
63*4882a593Smuzhiyun 	acpi_gbl_system_awake_and_running = FALSE;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	 /* Enable all wakeup GPEs */
66*4882a593Smuzhiyun 	status = acpi_hw_enable_all_wakeup_gpes();
67*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
68*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	/* Get current value of PM1A control */
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
74*4882a593Smuzhiyun 				       &pm1a_control);
75*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
76*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 	ACPI_DEBUG_PRINT((ACPI_DB_INIT,
79*4882a593Smuzhiyun 			  "Entering sleep state [S%u]\n", sleep_state));
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	/* Clear the SLP_EN and SLP_TYP fields */
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	pm1a_control &= ~(sleep_type_reg_info->access_bit_mask |
84*4882a593Smuzhiyun 			  sleep_enable_reg_info->access_bit_mask);
85*4882a593Smuzhiyun 	pm1b_control = pm1a_control;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* Insert the SLP_TYP bits */
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	pm1a_control |=
90*4882a593Smuzhiyun 	    (acpi_gbl_sleep_type_a << sleep_type_reg_info->bit_position);
91*4882a593Smuzhiyun 	pm1b_control |=
92*4882a593Smuzhiyun 	    (acpi_gbl_sleep_type_b << sleep_type_reg_info->bit_position);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	/*
95*4882a593Smuzhiyun 	 * We split the writes of SLP_TYP and SLP_EN to workaround
96*4882a593Smuzhiyun 	 * poorly implemented hardware.
97*4882a593Smuzhiyun 	 */
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	/* Write #1: write the SLP_TYP data to the PM1 Control registers */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control);
102*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
103*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	/* Insert the sleep enable (SLP_EN) bit */
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	pm1a_control |= sleep_enable_reg_info->access_bit_mask;
109*4882a593Smuzhiyun 	pm1b_control |= sleep_enable_reg_info->access_bit_mask;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	/* Flush caches, as per ACPI specification */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	if (sleep_state < ACPI_STATE_S4) {
114*4882a593Smuzhiyun 		ACPI_FLUSH_CPU_CACHE();
115*4882a593Smuzhiyun 	}
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	status = acpi_os_enter_sleep(sleep_state, pm1a_control, pm1b_control);
118*4882a593Smuzhiyun 	if (status == AE_CTRL_TERMINATE) {
119*4882a593Smuzhiyun 		return_ACPI_STATUS(AE_OK);
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
122*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
123*4882a593Smuzhiyun 	}
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* Write #2: Write both SLP_TYP + SLP_EN */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control);
128*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
129*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
130*4882a593Smuzhiyun 	}
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	if (sleep_state > ACPI_STATE_S3) {
133*4882a593Smuzhiyun 		/*
134*4882a593Smuzhiyun 		 * We wanted to sleep > S3, but it didn't happen (by virtue of the
135*4882a593Smuzhiyun 		 * fact that we are still executing!)
136*4882a593Smuzhiyun 		 *
137*4882a593Smuzhiyun 		 * Wait ten seconds, then try again. This is to get S4/S5 to work on
138*4882a593Smuzhiyun 		 * all machines.
139*4882a593Smuzhiyun 		 *
140*4882a593Smuzhiyun 		 * We wait so long to allow chipsets that poll this reg very slowly
141*4882a593Smuzhiyun 		 * to still read the right value. Ideally, this block would go
142*4882a593Smuzhiyun 		 * away entirely.
143*4882a593Smuzhiyun 		 */
144*4882a593Smuzhiyun 		acpi_os_stall(10 * ACPI_USEC_PER_SEC);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 		status = acpi_hw_register_write(ACPI_REGISTER_PM1_CONTROL,
147*4882a593Smuzhiyun 						sleep_enable_reg_info->
148*4882a593Smuzhiyun 						access_bit_mask);
149*4882a593Smuzhiyun 		if (ACPI_FAILURE(status)) {
150*4882a593Smuzhiyun 			return_ACPI_STATUS(status);
151*4882a593Smuzhiyun 		}
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	/* Wait for transition back to Working State */
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	do {
157*4882a593Smuzhiyun 		status =
158*4882a593Smuzhiyun 		    acpi_read_bit_register(ACPI_BITREG_WAKE_STATUS, &in_value);
159*4882a593Smuzhiyun 		if (ACPI_FAILURE(status)) {
160*4882a593Smuzhiyun 			return_ACPI_STATUS(status);
161*4882a593Smuzhiyun 		}
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	} while (!in_value);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	return_ACPI_STATUS(AE_OK);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun /*******************************************************************************
169*4882a593Smuzhiyun  *
170*4882a593Smuzhiyun  * FUNCTION:    acpi_hw_legacy_wake_prep
171*4882a593Smuzhiyun  *
172*4882a593Smuzhiyun  * PARAMETERS:  sleep_state         - Which sleep state we just exited
173*4882a593Smuzhiyun  *
174*4882a593Smuzhiyun  * RETURN:      Status
175*4882a593Smuzhiyun  *
176*4882a593Smuzhiyun  * DESCRIPTION: Perform the first state of OS-independent ACPI cleanup after a
177*4882a593Smuzhiyun  *              sleep.
178*4882a593Smuzhiyun  *              Called with interrupts ENABLED.
179*4882a593Smuzhiyun  *
180*4882a593Smuzhiyun  ******************************************************************************/
181*4882a593Smuzhiyun 
acpi_hw_legacy_wake_prep(u8 sleep_state)182*4882a593Smuzhiyun acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	acpi_status status = AE_OK;
185*4882a593Smuzhiyun 	struct acpi_bit_register_info *sleep_type_reg_info;
186*4882a593Smuzhiyun 	struct acpi_bit_register_info *sleep_enable_reg_info;
187*4882a593Smuzhiyun 	u32 pm1a_control;
188*4882a593Smuzhiyun 	u32 pm1b_control;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ACPI_FUNCTION_TRACE(hw_legacy_wake_prep);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	/*
193*4882a593Smuzhiyun 	 * Set SLP_TYPE and SLP_EN to state S0.
194*4882a593Smuzhiyun 	 * This is unclear from the ACPI Spec, but it is required
195*4882a593Smuzhiyun 	 * by some machines.
196*4882a593Smuzhiyun 	 */
197*4882a593Smuzhiyun 	if (acpi_gbl_sleep_type_a_s0 != ACPI_SLEEP_TYPE_INVALID) {
198*4882a593Smuzhiyun 		sleep_type_reg_info =
199*4882a593Smuzhiyun 		    acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE);
200*4882a593Smuzhiyun 		sleep_enable_reg_info =
201*4882a593Smuzhiyun 		    acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 		/* Get current value of PM1A control */
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 		status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
206*4882a593Smuzhiyun 					       &pm1a_control);
207*4882a593Smuzhiyun 		if (ACPI_SUCCESS(status)) {
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 			/* Clear the SLP_EN and SLP_TYP fields */
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 			pm1a_control &= ~(sleep_type_reg_info->access_bit_mask |
212*4882a593Smuzhiyun 					  sleep_enable_reg_info->
213*4882a593Smuzhiyun 					  access_bit_mask);
214*4882a593Smuzhiyun 			pm1b_control = pm1a_control;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 			/* Insert the SLP_TYP bits */
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 			pm1a_control |= (acpi_gbl_sleep_type_a_s0 <<
219*4882a593Smuzhiyun 					 sleep_type_reg_info->bit_position);
220*4882a593Smuzhiyun 			pm1b_control |= (acpi_gbl_sleep_type_b_s0 <<
221*4882a593Smuzhiyun 					 sleep_type_reg_info->bit_position);
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 			/* Write the control registers and ignore any errors */
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 			(void)acpi_hw_write_pm1_control(pm1a_control,
226*4882a593Smuzhiyun 							pm1b_control);
227*4882a593Smuzhiyun 		}
228*4882a593Smuzhiyun 	}
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return_ACPI_STATUS(status);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun /*******************************************************************************
234*4882a593Smuzhiyun  *
235*4882a593Smuzhiyun  * FUNCTION:    acpi_hw_legacy_wake
236*4882a593Smuzhiyun  *
237*4882a593Smuzhiyun  * PARAMETERS:  sleep_state         - Which sleep state we just exited
238*4882a593Smuzhiyun  *
239*4882a593Smuzhiyun  * RETURN:      Status
240*4882a593Smuzhiyun  *
241*4882a593Smuzhiyun  * DESCRIPTION: Perform OS-independent ACPI cleanup after a sleep
242*4882a593Smuzhiyun  *              Called with interrupts ENABLED.
243*4882a593Smuzhiyun  *
244*4882a593Smuzhiyun  ******************************************************************************/
245*4882a593Smuzhiyun 
acpi_hw_legacy_wake(u8 sleep_state)246*4882a593Smuzhiyun acpi_status acpi_hw_legacy_wake(u8 sleep_state)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	acpi_status status;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ACPI_FUNCTION_TRACE(hw_legacy_wake);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	/* Ensure enter_sleep_state_prep -> enter_sleep_state ordering */
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	acpi_gbl_sleep_type_a = ACPI_SLEEP_TYPE_INVALID;
255*4882a593Smuzhiyun 	acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WAKING);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	/*
258*4882a593Smuzhiyun 	 * GPEs must be enabled before _WAK is called as GPEs
259*4882a593Smuzhiyun 	 * might get fired there
260*4882a593Smuzhiyun 	 *
261*4882a593Smuzhiyun 	 * Restore the GPEs:
262*4882a593Smuzhiyun 	 * 1) Disable all GPEs
263*4882a593Smuzhiyun 	 * 2) Enable all runtime GPEs
264*4882a593Smuzhiyun 	 */
265*4882a593Smuzhiyun 	status = acpi_hw_disable_all_gpes();
266*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
267*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	status = acpi_hw_enable_all_runtime_gpes();
271*4882a593Smuzhiyun 	if (ACPI_FAILURE(status)) {
272*4882a593Smuzhiyun 		return_ACPI_STATUS(status);
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/*
276*4882a593Smuzhiyun 	 * Now we can execute _WAK, etc. Some machines require that the GPEs
277*4882a593Smuzhiyun 	 * are enabled before the wake methods are executed.
278*4882a593Smuzhiyun 	 */
279*4882a593Smuzhiyun 	acpi_hw_execute_sleep_method(METHOD_PATHNAME__WAK, sleep_state);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	/*
282*4882a593Smuzhiyun 	 * Some BIOS code assumes that WAK_STS will be cleared on resume
283*4882a593Smuzhiyun 	 * and use it to determine whether the system is rebooting or
284*4882a593Smuzhiyun 	 * resuming. Clear WAK_STS for compatibility.
285*4882a593Smuzhiyun 	 */
286*4882a593Smuzhiyun 	(void)acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS,
287*4882a593Smuzhiyun 				      ACPI_CLEAR_STATUS);
288*4882a593Smuzhiyun 	acpi_gbl_system_awake_and_running = TRUE;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	/* Enable power button */
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	(void)
293*4882a593Smuzhiyun 	    acpi_write_bit_register(acpi_gbl_fixed_event_info
294*4882a593Smuzhiyun 				    [ACPI_EVENT_POWER_BUTTON].
295*4882a593Smuzhiyun 				    enable_register_id, ACPI_ENABLE_EVENT);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	(void)
298*4882a593Smuzhiyun 	    acpi_write_bit_register(acpi_gbl_fixed_event_info
299*4882a593Smuzhiyun 				    [ACPI_EVENT_POWER_BUTTON].
300*4882a593Smuzhiyun 				    status_register_id, ACPI_CLEAR_STATUS);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	/* Enable sleep button */
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	(void)
305*4882a593Smuzhiyun 	    acpi_write_bit_register(acpi_gbl_fixed_event_info
306*4882a593Smuzhiyun 				    [ACPI_EVENT_SLEEP_BUTTON].
307*4882a593Smuzhiyun 				    enable_register_id, ACPI_ENABLE_EVENT);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	(void)
310*4882a593Smuzhiyun 	    acpi_write_bit_register(acpi_gbl_fixed_event_info
311*4882a593Smuzhiyun 				    [ACPI_EVENT_SLEEP_BUTTON].
312*4882a593Smuzhiyun 				    status_register_id, ACPI_CLEAR_STATUS);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WORKING);
315*4882a593Smuzhiyun 	return_ACPI_STATUS(status);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun #endif				/* !ACPI_REDUCED_HARDWARE */
319