1*4882a593Smuzhiyun // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2*4882a593Smuzhiyun /******************************************************************************
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Module Name: hwgpe - Low level GPE enable/disable/clear functions
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2000 - 2020, Intel Corp.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun *****************************************************************************/
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <acpi/acpi.h>
11*4882a593Smuzhiyun #include "accommon.h"
12*4882a593Smuzhiyun #include "acevents.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define _COMPONENT ACPI_HARDWARE
15*4882a593Smuzhiyun ACPI_MODULE_NAME("hwgpe")
16*4882a593Smuzhiyun #if (!ACPI_REDUCED_HARDWARE) /* Entire module */
17*4882a593Smuzhiyun /* Local prototypes */
18*4882a593Smuzhiyun static acpi_status
19*4882a593Smuzhiyun acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
20*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block,
21*4882a593Smuzhiyun void *context);
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static acpi_status
24*4882a593Smuzhiyun acpi_hw_gpe_enable_write(u8 enable_mask,
25*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info);
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /******************************************************************************
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * FUNCTION: acpi_hw_gpe_read
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * PARAMETERS: value - Where the value is returned
32*4882a593Smuzhiyun * reg - GPE register structure
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * RETURN: Status
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * DESCRIPTION: Read from a GPE register in either memory or IO space.
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * LIMITATIONS: <These limitations also apply to acpi_hw_gpe_write>
39*4882a593Smuzhiyun * space_ID must be system_memory or system_IO.
40*4882a593Smuzhiyun *
41*4882a593Smuzhiyun ******************************************************************************/
42*4882a593Smuzhiyun
acpi_hw_gpe_read(u64 * value,struct acpi_gpe_address * reg)43*4882a593Smuzhiyun acpi_status acpi_hw_gpe_read(u64 *value, struct acpi_gpe_address *reg)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun acpi_status status;
46*4882a593Smuzhiyun u32 value32;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
49*4882a593Smuzhiyun #ifdef ACPI_GPE_USE_LOGICAL_ADDRESSES
50*4882a593Smuzhiyun *value = (u64)ACPI_GET8((unsigned long)reg->address);
51*4882a593Smuzhiyun return_ACPI_STATUS(AE_OK);
52*4882a593Smuzhiyun #else
53*4882a593Smuzhiyun return acpi_os_read_memory((acpi_physical_address)reg->address,
54*4882a593Smuzhiyun value, ACPI_GPE_REGISTER_WIDTH);
55*4882a593Smuzhiyun #endif
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun status = acpi_os_read_port((acpi_io_address)reg->address,
59*4882a593Smuzhiyun &value32, ACPI_GPE_REGISTER_WIDTH);
60*4882a593Smuzhiyun if (ACPI_FAILURE(status))
61*4882a593Smuzhiyun return_ACPI_STATUS(status);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun *value = (u64)value32;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return_ACPI_STATUS(AE_OK);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /******************************************************************************
69*4882a593Smuzhiyun *
70*4882a593Smuzhiyun * FUNCTION: acpi_hw_gpe_write
71*4882a593Smuzhiyun *
72*4882a593Smuzhiyun * PARAMETERS: value - Value to be written
73*4882a593Smuzhiyun * reg - GPE register structure
74*4882a593Smuzhiyun *
75*4882a593Smuzhiyun * RETURN: Status
76*4882a593Smuzhiyun *
77*4882a593Smuzhiyun * DESCRIPTION: Write to a GPE register in either memory or IO space.
78*4882a593Smuzhiyun *
79*4882a593Smuzhiyun ******************************************************************************/
80*4882a593Smuzhiyun
acpi_hw_gpe_write(u64 value,struct acpi_gpe_address * reg)81*4882a593Smuzhiyun acpi_status acpi_hw_gpe_write(u64 value, struct acpi_gpe_address *reg)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
84*4882a593Smuzhiyun #ifdef ACPI_GPE_USE_LOGICAL_ADDRESSES
85*4882a593Smuzhiyun ACPI_SET8((unsigned long)reg->address, value);
86*4882a593Smuzhiyun return_ACPI_STATUS(AE_OK);
87*4882a593Smuzhiyun #else
88*4882a593Smuzhiyun return acpi_os_write_memory((acpi_physical_address)reg->address,
89*4882a593Smuzhiyun value, ACPI_GPE_REGISTER_WIDTH);
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return acpi_os_write_port((acpi_io_address)reg->address, (u32)value,
94*4882a593Smuzhiyun ACPI_GPE_REGISTER_WIDTH);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /******************************************************************************
98*4882a593Smuzhiyun *
99*4882a593Smuzhiyun * FUNCTION: acpi_hw_get_gpe_register_bit
100*4882a593Smuzhiyun *
101*4882a593Smuzhiyun * PARAMETERS: gpe_event_info - Info block for the GPE
102*4882a593Smuzhiyun *
103*4882a593Smuzhiyun * RETURN: Register mask with a one in the GPE bit position
104*4882a593Smuzhiyun *
105*4882a593Smuzhiyun * DESCRIPTION: Compute the register mask for this GPE. One bit is set in the
106*4882a593Smuzhiyun * correct position for the input GPE.
107*4882a593Smuzhiyun *
108*4882a593Smuzhiyun ******************************************************************************/
109*4882a593Smuzhiyun
acpi_hw_get_gpe_register_bit(struct acpi_gpe_event_info * gpe_event_info)110*4882a593Smuzhiyun u32 acpi_hw_get_gpe_register_bit(struct acpi_gpe_event_info *gpe_event_info)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun return ((u32)1 <<
114*4882a593Smuzhiyun (gpe_event_info->gpe_number -
115*4882a593Smuzhiyun gpe_event_info->register_info->base_gpe_number));
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /******************************************************************************
119*4882a593Smuzhiyun *
120*4882a593Smuzhiyun * FUNCTION: acpi_hw_low_set_gpe
121*4882a593Smuzhiyun *
122*4882a593Smuzhiyun * PARAMETERS: gpe_event_info - Info block for the GPE to be disabled
123*4882a593Smuzhiyun * action - Enable or disable
124*4882a593Smuzhiyun *
125*4882a593Smuzhiyun * RETURN: Status
126*4882a593Smuzhiyun *
127*4882a593Smuzhiyun * DESCRIPTION: Enable or disable a single GPE in the parent enable register.
128*4882a593Smuzhiyun * The enable_mask field of the involved GPE register must be
129*4882a593Smuzhiyun * updated by the caller if necessary.
130*4882a593Smuzhiyun *
131*4882a593Smuzhiyun ******************************************************************************/
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun acpi_status
acpi_hw_low_set_gpe(struct acpi_gpe_event_info * gpe_event_info,u32 action)134*4882a593Smuzhiyun acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
137*4882a593Smuzhiyun acpi_status status = AE_OK;
138*4882a593Smuzhiyun u64 enable_mask;
139*4882a593Smuzhiyun u32 register_bit;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ACPI_FUNCTION_ENTRY();
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Get the info block for the entire GPE register */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun gpe_register_info = gpe_event_info->register_info;
146*4882a593Smuzhiyun if (!gpe_register_info) {
147*4882a593Smuzhiyun return (AE_NOT_EXIST);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* Get current value of the enable register that contains this GPE */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun status = acpi_hw_gpe_read(&enable_mask,
153*4882a593Smuzhiyun &gpe_register_info->enable_address);
154*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
155*4882a593Smuzhiyun return (status);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* Set or clear just the bit that corresponds to this GPE */
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
161*4882a593Smuzhiyun switch (action) {
162*4882a593Smuzhiyun case ACPI_GPE_CONDITIONAL_ENABLE:
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* Only enable if the corresponding enable_mask bit is set */
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (!(register_bit & gpe_register_info->enable_mask)) {
167*4882a593Smuzhiyun return (AE_BAD_PARAMETER);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /*lint -fallthrough */
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun case ACPI_GPE_ENABLE:
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun ACPI_SET_BIT(enable_mask, register_bit);
175*4882a593Smuzhiyun break;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun case ACPI_GPE_DISABLE:
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun ACPI_CLEAR_BIT(enable_mask, register_bit);
180*4882a593Smuzhiyun break;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun default:
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ACPI_ERROR((AE_INFO, "Invalid GPE Action, %u", action));
185*4882a593Smuzhiyun return (AE_BAD_PARAMETER);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun if (!(register_bit & gpe_register_info->mask_for_run)) {
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* Write the updated enable mask */
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun status = acpi_hw_gpe_write(enable_mask,
193*4882a593Smuzhiyun &gpe_register_info->enable_address);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun return (status);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /******************************************************************************
199*4882a593Smuzhiyun *
200*4882a593Smuzhiyun * FUNCTION: acpi_hw_clear_gpe
201*4882a593Smuzhiyun *
202*4882a593Smuzhiyun * PARAMETERS: gpe_event_info - Info block for the GPE to be cleared
203*4882a593Smuzhiyun *
204*4882a593Smuzhiyun * RETURN: Status
205*4882a593Smuzhiyun *
206*4882a593Smuzhiyun * DESCRIPTION: Clear the status bit for a single GPE.
207*4882a593Smuzhiyun *
208*4882a593Smuzhiyun ******************************************************************************/
209*4882a593Smuzhiyun
acpi_hw_clear_gpe(struct acpi_gpe_event_info * gpe_event_info)210*4882a593Smuzhiyun acpi_status acpi_hw_clear_gpe(struct acpi_gpe_event_info *gpe_event_info)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
213*4882a593Smuzhiyun acpi_status status;
214*4882a593Smuzhiyun u32 register_bit;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun ACPI_FUNCTION_ENTRY();
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* Get the info block for the entire GPE register */
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun gpe_register_info = gpe_event_info->register_info;
221*4882a593Smuzhiyun if (!gpe_register_info) {
222*4882a593Smuzhiyun return (AE_NOT_EXIST);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /*
226*4882a593Smuzhiyun * Write a one to the appropriate bit in the status register to
227*4882a593Smuzhiyun * clear this GPE.
228*4882a593Smuzhiyun */
229*4882a593Smuzhiyun register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun status = acpi_hw_gpe_write(register_bit,
232*4882a593Smuzhiyun &gpe_register_info->status_address);
233*4882a593Smuzhiyun return (status);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /******************************************************************************
237*4882a593Smuzhiyun *
238*4882a593Smuzhiyun * FUNCTION: acpi_hw_get_gpe_status
239*4882a593Smuzhiyun *
240*4882a593Smuzhiyun * PARAMETERS: gpe_event_info - Info block for the GPE to queried
241*4882a593Smuzhiyun * event_status - Where the GPE status is returned
242*4882a593Smuzhiyun *
243*4882a593Smuzhiyun * RETURN: Status
244*4882a593Smuzhiyun *
245*4882a593Smuzhiyun * DESCRIPTION: Return the status of a single GPE.
246*4882a593Smuzhiyun *
247*4882a593Smuzhiyun ******************************************************************************/
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun acpi_status
acpi_hw_get_gpe_status(struct acpi_gpe_event_info * gpe_event_info,acpi_event_status * event_status)250*4882a593Smuzhiyun acpi_hw_get_gpe_status(struct acpi_gpe_event_info *gpe_event_info,
251*4882a593Smuzhiyun acpi_event_status *event_status)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun u64 in_byte;
254*4882a593Smuzhiyun u32 register_bit;
255*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
256*4882a593Smuzhiyun acpi_event_status local_event_status = 0;
257*4882a593Smuzhiyun acpi_status status;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun ACPI_FUNCTION_ENTRY();
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun if (!event_status) {
262*4882a593Smuzhiyun return (AE_BAD_PARAMETER);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* GPE currently handled? */
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (ACPI_GPE_DISPATCH_TYPE(gpe_event_info->flags) !=
268*4882a593Smuzhiyun ACPI_GPE_DISPATCH_NONE) {
269*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_HAS_HANDLER;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* Get the info block for the entire GPE register */
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun gpe_register_info = gpe_event_info->register_info;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Get the register bitmask for this GPE */
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* GPE currently enabled? (enabled for runtime?) */
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun if (register_bit & gpe_register_info->enable_for_run) {
283*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_ENABLED;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /* GPE currently masked? (masked for runtime?) */
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (register_bit & gpe_register_info->mask_for_run) {
289*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_MASKED;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* GPE enabled for wake? */
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (register_bit & gpe_register_info->enable_for_wake) {
295*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_WAKE_ENABLED;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /* GPE currently enabled (enable bit == 1)? */
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun status = acpi_hw_gpe_read(&in_byte, &gpe_register_info->enable_address);
301*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
302*4882a593Smuzhiyun return (status);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun if (register_bit & in_byte) {
306*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_ENABLE_SET;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* GPE currently active (status bit == 1)? */
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun status = acpi_hw_gpe_read(&in_byte, &gpe_register_info->status_address);
312*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
313*4882a593Smuzhiyun return (status);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun if (register_bit & in_byte) {
317*4882a593Smuzhiyun local_event_status |= ACPI_EVENT_FLAG_STATUS_SET;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /* Set return value */
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun (*event_status) = local_event_status;
323*4882a593Smuzhiyun return (AE_OK);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /******************************************************************************
327*4882a593Smuzhiyun *
328*4882a593Smuzhiyun * FUNCTION: acpi_hw_gpe_enable_write
329*4882a593Smuzhiyun *
330*4882a593Smuzhiyun * PARAMETERS: enable_mask - Bit mask to write to the GPE register
331*4882a593Smuzhiyun * gpe_register_info - Gpe Register info
332*4882a593Smuzhiyun *
333*4882a593Smuzhiyun * RETURN: Status
334*4882a593Smuzhiyun *
335*4882a593Smuzhiyun * DESCRIPTION: Write the enable mask byte to the given GPE register.
336*4882a593Smuzhiyun *
337*4882a593Smuzhiyun ******************************************************************************/
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun static acpi_status
acpi_hw_gpe_enable_write(u8 enable_mask,struct acpi_gpe_register_info * gpe_register_info)340*4882a593Smuzhiyun acpi_hw_gpe_enable_write(u8 enable_mask,
341*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun acpi_status status;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun gpe_register_info->enable_mask = enable_mask;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun status = acpi_hw_gpe_write(enable_mask,
348*4882a593Smuzhiyun &gpe_register_info->enable_address);
349*4882a593Smuzhiyun return (status);
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /******************************************************************************
353*4882a593Smuzhiyun *
354*4882a593Smuzhiyun * FUNCTION: acpi_hw_disable_gpe_block
355*4882a593Smuzhiyun *
356*4882a593Smuzhiyun * PARAMETERS: gpe_xrupt_info - GPE Interrupt info
357*4882a593Smuzhiyun * gpe_block - Gpe Block info
358*4882a593Smuzhiyun *
359*4882a593Smuzhiyun * RETURN: Status
360*4882a593Smuzhiyun *
361*4882a593Smuzhiyun * DESCRIPTION: Disable all GPEs within a single GPE block
362*4882a593Smuzhiyun *
363*4882a593Smuzhiyun ******************************************************************************/
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun acpi_status
acpi_hw_disable_gpe_block(struct acpi_gpe_xrupt_info * gpe_xrupt_info,struct acpi_gpe_block_info * gpe_block,void * context)366*4882a593Smuzhiyun acpi_hw_disable_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
367*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block, void *context)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun u32 i;
370*4882a593Smuzhiyun acpi_status status;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun /* Examine each GPE Register within the block */
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun for (i = 0; i < gpe_block->register_count; i++) {
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun /* Disable all GPEs in this register */
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun status =
379*4882a593Smuzhiyun acpi_hw_gpe_enable_write(0x00,
380*4882a593Smuzhiyun &gpe_block->register_info[i]);
381*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
382*4882a593Smuzhiyun return (status);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun return (AE_OK);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /******************************************************************************
390*4882a593Smuzhiyun *
391*4882a593Smuzhiyun * FUNCTION: acpi_hw_clear_gpe_block
392*4882a593Smuzhiyun *
393*4882a593Smuzhiyun * PARAMETERS: gpe_xrupt_info - GPE Interrupt info
394*4882a593Smuzhiyun * gpe_block - Gpe Block info
395*4882a593Smuzhiyun *
396*4882a593Smuzhiyun * RETURN: Status
397*4882a593Smuzhiyun *
398*4882a593Smuzhiyun * DESCRIPTION: Clear status bits for all GPEs within a single GPE block
399*4882a593Smuzhiyun *
400*4882a593Smuzhiyun ******************************************************************************/
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun acpi_status
acpi_hw_clear_gpe_block(struct acpi_gpe_xrupt_info * gpe_xrupt_info,struct acpi_gpe_block_info * gpe_block,void * context)403*4882a593Smuzhiyun acpi_hw_clear_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
404*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block, void *context)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun u32 i;
407*4882a593Smuzhiyun acpi_status status;
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun /* Examine each GPE Register within the block */
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun for (i = 0; i < gpe_block->register_count; i++) {
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* Clear status on all GPEs in this register */
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun status = acpi_hw_gpe_write(0xFF,
416*4882a593Smuzhiyun &gpe_block->register_info[i].status_address);
417*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
418*4882a593Smuzhiyun return (status);
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return (AE_OK);
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun /******************************************************************************
426*4882a593Smuzhiyun *
427*4882a593Smuzhiyun * FUNCTION: acpi_hw_enable_runtime_gpe_block
428*4882a593Smuzhiyun *
429*4882a593Smuzhiyun * PARAMETERS: gpe_xrupt_info - GPE Interrupt info
430*4882a593Smuzhiyun * gpe_block - Gpe Block info
431*4882a593Smuzhiyun *
432*4882a593Smuzhiyun * RETURN: Status
433*4882a593Smuzhiyun *
434*4882a593Smuzhiyun * DESCRIPTION: Enable all "runtime" GPEs within a single GPE block. Includes
435*4882a593Smuzhiyun * combination wake/run GPEs.
436*4882a593Smuzhiyun *
437*4882a593Smuzhiyun ******************************************************************************/
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun acpi_status
acpi_hw_enable_runtime_gpe_block(struct acpi_gpe_xrupt_info * gpe_xrupt_info,struct acpi_gpe_block_info * gpe_block,void * context)440*4882a593Smuzhiyun acpi_hw_enable_runtime_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
441*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block,
442*4882a593Smuzhiyun void *context)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun u32 i;
445*4882a593Smuzhiyun acpi_status status;
446*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
447*4882a593Smuzhiyun u8 enable_mask;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun /* NOTE: assumes that all GPEs are currently disabled */
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* Examine each GPE Register within the block */
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun for (i = 0; i < gpe_block->register_count; i++) {
454*4882a593Smuzhiyun gpe_register_info = &gpe_block->register_info[i];
455*4882a593Smuzhiyun if (!gpe_register_info->enable_for_run) {
456*4882a593Smuzhiyun continue;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /* Enable all "runtime" GPEs in this register */
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun enable_mask = gpe_register_info->enable_for_run &
462*4882a593Smuzhiyun ~gpe_register_info->mask_for_run;
463*4882a593Smuzhiyun status =
464*4882a593Smuzhiyun acpi_hw_gpe_enable_write(enable_mask, gpe_register_info);
465*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
466*4882a593Smuzhiyun return (status);
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun return (AE_OK);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun /******************************************************************************
474*4882a593Smuzhiyun *
475*4882a593Smuzhiyun * FUNCTION: acpi_hw_enable_wakeup_gpe_block
476*4882a593Smuzhiyun *
477*4882a593Smuzhiyun * PARAMETERS: gpe_xrupt_info - GPE Interrupt info
478*4882a593Smuzhiyun * gpe_block - Gpe Block info
479*4882a593Smuzhiyun *
480*4882a593Smuzhiyun * RETURN: Status
481*4882a593Smuzhiyun *
482*4882a593Smuzhiyun * DESCRIPTION: Enable all "wake" GPEs within a single GPE block. Includes
483*4882a593Smuzhiyun * combination wake/run GPEs.
484*4882a593Smuzhiyun *
485*4882a593Smuzhiyun ******************************************************************************/
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun static acpi_status
acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info * gpe_xrupt_info,struct acpi_gpe_block_info * gpe_block,void * context)488*4882a593Smuzhiyun acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
489*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block,
490*4882a593Smuzhiyun void *context)
491*4882a593Smuzhiyun {
492*4882a593Smuzhiyun u32 i;
493*4882a593Smuzhiyun acpi_status status;
494*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun /* Examine each GPE Register within the block */
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun for (i = 0; i < gpe_block->register_count; i++) {
499*4882a593Smuzhiyun gpe_register_info = &gpe_block->register_info[i];
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun /*
502*4882a593Smuzhiyun * Enable all "wake" GPEs in this register and disable the
503*4882a593Smuzhiyun * remaining ones.
504*4882a593Smuzhiyun */
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun status =
507*4882a593Smuzhiyun acpi_hw_gpe_enable_write(gpe_register_info->enable_for_wake,
508*4882a593Smuzhiyun gpe_register_info);
509*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
510*4882a593Smuzhiyun return (status);
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun return (AE_OK);
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun struct acpi_gpe_block_status_context {
518*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_skip_register_info;
519*4882a593Smuzhiyun u8 gpe_skip_mask;
520*4882a593Smuzhiyun u8 retval;
521*4882a593Smuzhiyun };
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /******************************************************************************
524*4882a593Smuzhiyun *
525*4882a593Smuzhiyun * FUNCTION: acpi_hw_get_gpe_block_status
526*4882a593Smuzhiyun *
527*4882a593Smuzhiyun * PARAMETERS: gpe_xrupt_info - GPE Interrupt info
528*4882a593Smuzhiyun * gpe_block - Gpe Block info
529*4882a593Smuzhiyun * context - GPE list walk context data
530*4882a593Smuzhiyun *
531*4882a593Smuzhiyun * RETURN: Success
532*4882a593Smuzhiyun *
533*4882a593Smuzhiyun * DESCRIPTION: Produce a combined GPE status bits mask for the given block.
534*4882a593Smuzhiyun *
535*4882a593Smuzhiyun ******************************************************************************/
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun static acpi_status
acpi_hw_get_gpe_block_status(struct acpi_gpe_xrupt_info * gpe_xrupt_info,struct acpi_gpe_block_info * gpe_block,void * context)538*4882a593Smuzhiyun acpi_hw_get_gpe_block_status(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
539*4882a593Smuzhiyun struct acpi_gpe_block_info *gpe_block,
540*4882a593Smuzhiyun void *context)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct acpi_gpe_block_status_context *c = context;
543*4882a593Smuzhiyun struct acpi_gpe_register_info *gpe_register_info;
544*4882a593Smuzhiyun u64 in_enable, in_status;
545*4882a593Smuzhiyun acpi_status status;
546*4882a593Smuzhiyun u8 ret_mask;
547*4882a593Smuzhiyun u32 i;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* Examine each GPE Register within the block */
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun for (i = 0; i < gpe_block->register_count; i++) {
552*4882a593Smuzhiyun gpe_register_info = &gpe_block->register_info[i];
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun status = acpi_hw_gpe_read(&in_enable,
555*4882a593Smuzhiyun &gpe_register_info->enable_address);
556*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
557*4882a593Smuzhiyun continue;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun status = acpi_hw_gpe_read(&in_status,
561*4882a593Smuzhiyun &gpe_register_info->status_address);
562*4882a593Smuzhiyun if (ACPI_FAILURE(status)) {
563*4882a593Smuzhiyun continue;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun ret_mask = in_enable & in_status;
567*4882a593Smuzhiyun if (ret_mask && c->gpe_skip_register_info == gpe_register_info) {
568*4882a593Smuzhiyun ret_mask &= ~c->gpe_skip_mask;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun c->retval |= ret_mask;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun return (AE_OK);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun /******************************************************************************
577*4882a593Smuzhiyun *
578*4882a593Smuzhiyun * FUNCTION: acpi_hw_disable_all_gpes
579*4882a593Smuzhiyun *
580*4882a593Smuzhiyun * PARAMETERS: None
581*4882a593Smuzhiyun *
582*4882a593Smuzhiyun * RETURN: Status
583*4882a593Smuzhiyun *
584*4882a593Smuzhiyun * DESCRIPTION: Disable and clear all GPEs in all GPE blocks
585*4882a593Smuzhiyun *
586*4882a593Smuzhiyun ******************************************************************************/
587*4882a593Smuzhiyun
acpi_hw_disable_all_gpes(void)588*4882a593Smuzhiyun acpi_status acpi_hw_disable_all_gpes(void)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun acpi_status status;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun ACPI_FUNCTION_TRACE(hw_disable_all_gpes);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun status = acpi_ev_walk_gpe_list(acpi_hw_disable_gpe_block, NULL);
595*4882a593Smuzhiyun return_ACPI_STATUS(status);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun /******************************************************************************
599*4882a593Smuzhiyun *
600*4882a593Smuzhiyun * FUNCTION: acpi_hw_enable_all_runtime_gpes
601*4882a593Smuzhiyun *
602*4882a593Smuzhiyun * PARAMETERS: None
603*4882a593Smuzhiyun *
604*4882a593Smuzhiyun * RETURN: Status
605*4882a593Smuzhiyun *
606*4882a593Smuzhiyun * DESCRIPTION: Enable all "runtime" GPEs, in all GPE blocks
607*4882a593Smuzhiyun *
608*4882a593Smuzhiyun ******************************************************************************/
609*4882a593Smuzhiyun
acpi_hw_enable_all_runtime_gpes(void)610*4882a593Smuzhiyun acpi_status acpi_hw_enable_all_runtime_gpes(void)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun acpi_status status;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun ACPI_FUNCTION_TRACE(hw_enable_all_runtime_gpes);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun status = acpi_ev_walk_gpe_list(acpi_hw_enable_runtime_gpe_block, NULL);
617*4882a593Smuzhiyun return_ACPI_STATUS(status);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun /******************************************************************************
621*4882a593Smuzhiyun *
622*4882a593Smuzhiyun * FUNCTION: acpi_hw_enable_all_wakeup_gpes
623*4882a593Smuzhiyun *
624*4882a593Smuzhiyun * PARAMETERS: None
625*4882a593Smuzhiyun *
626*4882a593Smuzhiyun * RETURN: Status
627*4882a593Smuzhiyun *
628*4882a593Smuzhiyun * DESCRIPTION: Enable all "wakeup" GPEs, in all GPE blocks
629*4882a593Smuzhiyun *
630*4882a593Smuzhiyun ******************************************************************************/
631*4882a593Smuzhiyun
acpi_hw_enable_all_wakeup_gpes(void)632*4882a593Smuzhiyun acpi_status acpi_hw_enable_all_wakeup_gpes(void)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun acpi_status status;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun ACPI_FUNCTION_TRACE(hw_enable_all_wakeup_gpes);
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun status = acpi_ev_walk_gpe_list(acpi_hw_enable_wakeup_gpe_block, NULL);
639*4882a593Smuzhiyun return_ACPI_STATUS(status);
640*4882a593Smuzhiyun }
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun /******************************************************************************
643*4882a593Smuzhiyun *
644*4882a593Smuzhiyun * FUNCTION: acpi_hw_check_all_gpes
645*4882a593Smuzhiyun *
646*4882a593Smuzhiyun * PARAMETERS: gpe_skip_device - GPE devoce of the GPE to skip
647*4882a593Smuzhiyun * gpe_skip_number - Number of the GPE to skip
648*4882a593Smuzhiyun *
649*4882a593Smuzhiyun * RETURN: Combined status of all GPEs
650*4882a593Smuzhiyun *
651*4882a593Smuzhiyun * DESCRIPTION: Check all enabled GPEs in all GPE blocks, except for the one
652*4882a593Smuzhiyun * represented by the "skip" arguments, and return TRUE if the
653*4882a593Smuzhiyun * status bit is set for at least one of them of FALSE otherwise.
654*4882a593Smuzhiyun *
655*4882a593Smuzhiyun ******************************************************************************/
656*4882a593Smuzhiyun
acpi_hw_check_all_gpes(acpi_handle gpe_skip_device,u32 gpe_skip_number)657*4882a593Smuzhiyun u8 acpi_hw_check_all_gpes(acpi_handle gpe_skip_device, u32 gpe_skip_number)
658*4882a593Smuzhiyun {
659*4882a593Smuzhiyun struct acpi_gpe_block_status_context context = {
660*4882a593Smuzhiyun .gpe_skip_register_info = NULL,
661*4882a593Smuzhiyun .retval = 0,
662*4882a593Smuzhiyun };
663*4882a593Smuzhiyun struct acpi_gpe_event_info *gpe_event_info;
664*4882a593Smuzhiyun acpi_cpu_flags flags;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun ACPI_FUNCTION_TRACE(acpi_hw_check_all_gpes);
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun gpe_event_info = acpi_ev_get_gpe_event_info(gpe_skip_device,
671*4882a593Smuzhiyun gpe_skip_number);
672*4882a593Smuzhiyun if (gpe_event_info) {
673*4882a593Smuzhiyun context.gpe_skip_register_info = gpe_event_info->register_info;
674*4882a593Smuzhiyun context.gpe_skip_mask = acpi_hw_get_gpe_register_bit(gpe_event_info);
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun (void)acpi_ev_walk_gpe_list(acpi_hw_get_gpe_block_status, &context);
680*4882a593Smuzhiyun return (context.retval != 0);
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun #endif /* !ACPI_REDUCED_HARDWARE */
684