1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2*4882a593Smuzhiyun /****************************************************************************** 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Module Name: amlresrc.h - AML resource descriptors 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2000 - 2020, Intel Corp. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun *****************************************************************************/ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* acpisrc:struct_defs -- for acpisrc conversion */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __AMLRESRC_H 13*4882a593Smuzhiyun #define __AMLRESRC_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * Resource descriptor tags, as defined in the ACPI specification. 17*4882a593Smuzhiyun * Used to symbolically reference fields within a descriptor. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define ACPI_RESTAG_ADDRESS "_ADR" 20*4882a593Smuzhiyun #define ACPI_RESTAG_ALIGNMENT "_ALN" 21*4882a593Smuzhiyun #define ACPI_RESTAG_ADDRESSSPACE "_ASI" 22*4882a593Smuzhiyun #define ACPI_RESTAG_ACCESSSIZE "_ASZ" 23*4882a593Smuzhiyun #define ACPI_RESTAG_TYPESPECIFICATTRIBUTES "_ATT" 24*4882a593Smuzhiyun #define ACPI_RESTAG_BASEADDRESS "_BAS" 25*4882a593Smuzhiyun #define ACPI_RESTAG_BUSMASTER "_BM_" /* Master(1), Slave(0) */ 26*4882a593Smuzhiyun #define ACPI_RESTAG_DEBOUNCETIME "_DBT" 27*4882a593Smuzhiyun #define ACPI_RESTAG_DECODE "_DEC" 28*4882a593Smuzhiyun #define ACPI_RESTAG_DEVICEPOLARITY "_DPL" 29*4882a593Smuzhiyun #define ACPI_RESTAG_DMA "_DMA" 30*4882a593Smuzhiyun #define ACPI_RESTAG_DMATYPE "_TYP" /* Compatible(0), A(1), B(2), F(3) */ 31*4882a593Smuzhiyun #define ACPI_RESTAG_DRIVESTRENGTH "_DRS" 32*4882a593Smuzhiyun #define ACPI_RESTAG_ENDIANNESS "_END" 33*4882a593Smuzhiyun #define ACPI_RESTAG_FLOWCONTROL "_FLC" 34*4882a593Smuzhiyun #define ACPI_RESTAG_FUNCTION "_FUN" 35*4882a593Smuzhiyun #define ACPI_RESTAG_GRANULARITY "_GRA" 36*4882a593Smuzhiyun #define ACPI_RESTAG_INTERRUPT "_INT" 37*4882a593Smuzhiyun #define ACPI_RESTAG_INTERRUPTLEVEL "_LL_" /* active_lo(1), active_hi(0) */ 38*4882a593Smuzhiyun #define ACPI_RESTAG_INTERRUPTSHARE "_SHR" /* Shareable(1), no_share(0) */ 39*4882a593Smuzhiyun #define ACPI_RESTAG_INTERRUPTTYPE "_HE_" /* Edge(1), Level(0) */ 40*4882a593Smuzhiyun #define ACPI_RESTAG_IORESTRICTION "_IOR" 41*4882a593Smuzhiyun #define ACPI_RESTAG_LENGTH "_LEN" 42*4882a593Smuzhiyun #define ACPI_RESTAG_LINE "_LIN" 43*4882a593Smuzhiyun #define ACPI_RESTAG_MEMATTRIBUTES "_MTP" /* Memory(0), Reserved(1), ACPI(2), NVS(3) */ 44*4882a593Smuzhiyun #define ACPI_RESTAG_MEMTYPE "_MEM" /* non_cache(0), Cacheable(1) Cache+combine(2), Cache+prefetch(3) */ 45*4882a593Smuzhiyun #define ACPI_RESTAG_MAXADDR "_MAX" 46*4882a593Smuzhiyun #define ACPI_RESTAG_MINADDR "_MIN" 47*4882a593Smuzhiyun #define ACPI_RESTAG_MAXTYPE "_MAF" 48*4882a593Smuzhiyun #define ACPI_RESTAG_MINTYPE "_MIF" 49*4882a593Smuzhiyun #define ACPI_RESTAG_MODE "_MOD" 50*4882a593Smuzhiyun #define ACPI_RESTAG_PARITY "_PAR" 51*4882a593Smuzhiyun #define ACPI_RESTAG_PHASE "_PHA" 52*4882a593Smuzhiyun #define ACPI_RESTAG_PIN "_PIN" 53*4882a593Smuzhiyun #define ACPI_RESTAG_PINCONFIG "_PPI" 54*4882a593Smuzhiyun #define ACPI_RESTAG_PINCONFIG_TYPE "_TYP" 55*4882a593Smuzhiyun #define ACPI_RESTAG_PINCONFIG_VALUE "_VAL" 56*4882a593Smuzhiyun #define ACPI_RESTAG_POLARITY "_POL" 57*4882a593Smuzhiyun #define ACPI_RESTAG_REGISTERBITOFFSET "_RBO" 58*4882a593Smuzhiyun #define ACPI_RESTAG_REGISTERBITWIDTH "_RBW" 59*4882a593Smuzhiyun #define ACPI_RESTAG_RANGETYPE "_RNG" 60*4882a593Smuzhiyun #define ACPI_RESTAG_READWRITETYPE "_RW_" /* read_only(0), Writeable (1) */ 61*4882a593Smuzhiyun #define ACPI_RESTAG_LENGTH_RX "_RXL" 62*4882a593Smuzhiyun #define ACPI_RESTAG_LENGTH_TX "_TXL" 63*4882a593Smuzhiyun #define ACPI_RESTAG_SLAVEMODE "_SLV" 64*4882a593Smuzhiyun #define ACPI_RESTAG_SPEED "_SPE" 65*4882a593Smuzhiyun #define ACPI_RESTAG_STOPBITS "_STB" 66*4882a593Smuzhiyun #define ACPI_RESTAG_TRANSLATION "_TRA" 67*4882a593Smuzhiyun #define ACPI_RESTAG_TRANSTYPE "_TRS" /* Sparse(1), Dense(0) */ 68*4882a593Smuzhiyun #define ACPI_RESTAG_TYPE "_TTP" /* Translation(1), Static (0) */ 69*4882a593Smuzhiyun #define ACPI_RESTAG_XFERTYPE "_SIZ" /* 8(0), 8And16(1), 16(2) */ 70*4882a593Smuzhiyun #define ACPI_RESTAG_VENDORDATA "_VEN" 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* Default sizes for "small" resource descriptors */ 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define ASL_RDESC_IRQ_SIZE 0x02 75*4882a593Smuzhiyun #define ASL_RDESC_DMA_SIZE 0x02 76*4882a593Smuzhiyun #define ASL_RDESC_ST_DEPEND_SIZE 0x00 77*4882a593Smuzhiyun #define ASL_RDESC_END_DEPEND_SIZE 0x00 78*4882a593Smuzhiyun #define ASL_RDESC_IO_SIZE 0x07 79*4882a593Smuzhiyun #define ASL_RDESC_FIXED_IO_SIZE 0x03 80*4882a593Smuzhiyun #define ASL_RDESC_FIXED_DMA_SIZE 0x05 81*4882a593Smuzhiyun #define ASL_RDESC_END_TAG_SIZE 0x01 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun struct asl_resource_node { 84*4882a593Smuzhiyun u32 buffer_length; 85*4882a593Smuzhiyun void *buffer; 86*4882a593Smuzhiyun struct asl_resource_node *next; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun struct asl_resource_info { 90*4882a593Smuzhiyun union acpi_parse_object *descriptor_type_op; /* Resource descriptor parse node */ 91*4882a593Smuzhiyun union acpi_parse_object *mapping_op; /* Used for mapfile support */ 92*4882a593Smuzhiyun u32 current_byte_offset; /* Offset in resource template */ 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* Macros used to generate AML resource length fields */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define ACPI_AML_SIZE_LARGE(r) (sizeof (r) - sizeof (struct aml_resource_large_header)) 98*4882a593Smuzhiyun #define ACPI_AML_SIZE_SMALL(r) (sizeof (r) - sizeof (struct aml_resource_small_header)) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* 101*4882a593Smuzhiyun * Resource descriptors defined in the ACPI specification. 102*4882a593Smuzhiyun * 103*4882a593Smuzhiyun * Packing/alignment must be BYTE because these descriptors 104*4882a593Smuzhiyun * are used to overlay the raw AML byte stream. 105*4882a593Smuzhiyun */ 106*4882a593Smuzhiyun #pragma pack(1) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* 109*4882a593Smuzhiyun * SMALL descriptors 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun #define AML_RESOURCE_SMALL_HEADER_COMMON \ 112*4882a593Smuzhiyun u8 descriptor_type; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun struct aml_resource_small_header { 115*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun struct aml_resource_irq { 118*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u16 irq_mask; 119*4882a593Smuzhiyun u8 flags; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun struct aml_resource_irq_noflags { 123*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u16 irq_mask; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun struct aml_resource_dma { 127*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u8 dma_channel_mask; 128*4882a593Smuzhiyun u8 flags; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun struct aml_resource_start_dependent { 132*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u8 flags; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun struct aml_resource_start_dependent_noprio { 136*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun struct aml_resource_end_dependent { 139*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun struct aml_resource_io { 142*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u8 flags; 143*4882a593Smuzhiyun u16 minimum; 144*4882a593Smuzhiyun u16 maximum; 145*4882a593Smuzhiyun u8 alignment; 146*4882a593Smuzhiyun u8 address_length; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun struct aml_resource_fixed_io { 150*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u16 address; 151*4882a593Smuzhiyun u8 address_length; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun struct aml_resource_vendor_small { 155*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun struct aml_resource_end_tag { 158*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u8 checksum; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun struct aml_resource_fixed_dma { 162*4882a593Smuzhiyun AML_RESOURCE_SMALL_HEADER_COMMON u16 request_lines; 163*4882a593Smuzhiyun u16 channels; 164*4882a593Smuzhiyun u8 width; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun /* 168*4882a593Smuzhiyun * LARGE descriptors 169*4882a593Smuzhiyun */ 170*4882a593Smuzhiyun #define AML_RESOURCE_LARGE_HEADER_COMMON \ 171*4882a593Smuzhiyun u8 descriptor_type;\ 172*4882a593Smuzhiyun u16 resource_length; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun struct aml_resource_large_header { 175*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun /* General Flags for address space resource descriptors */ 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define ACPI_RESOURCE_FLAG_DEC 2 180*4882a593Smuzhiyun #define ACPI_RESOURCE_FLAG_MIF 4 181*4882a593Smuzhiyun #define ACPI_RESOURCE_FLAG_MAF 8 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun struct aml_resource_memory24 { 184*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 flags; 185*4882a593Smuzhiyun u16 minimum; 186*4882a593Smuzhiyun u16 maximum; 187*4882a593Smuzhiyun u16 alignment; 188*4882a593Smuzhiyun u16 address_length; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun struct aml_resource_vendor_large { 192*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun struct aml_resource_memory32 { 195*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 flags; 196*4882a593Smuzhiyun u32 minimum; 197*4882a593Smuzhiyun u32 maximum; 198*4882a593Smuzhiyun u32 alignment; 199*4882a593Smuzhiyun u32 address_length; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun struct aml_resource_fixed_memory32 { 203*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 flags; 204*4882a593Smuzhiyun u32 address; 205*4882a593Smuzhiyun u32 address_length; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun #define AML_RESOURCE_ADDRESS_COMMON \ 209*4882a593Smuzhiyun u8 resource_type; \ 210*4882a593Smuzhiyun u8 flags; \ 211*4882a593Smuzhiyun u8 specific_flags; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun struct aml_resource_address { 214*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_ADDRESS_COMMON}; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun struct aml_resource_extended_address64 { 217*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 218*4882a593Smuzhiyun AML_RESOURCE_ADDRESS_COMMON u8 revision_ID; 219*4882a593Smuzhiyun u8 reserved; 220*4882a593Smuzhiyun u64 granularity; 221*4882a593Smuzhiyun u64 minimum; 222*4882a593Smuzhiyun u64 maximum; 223*4882a593Smuzhiyun u64 translation_offset; 224*4882a593Smuzhiyun u64 address_length; 225*4882a593Smuzhiyun u64 type_specific; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun #define AML_RESOURCE_EXTENDED_ADDRESS_REVISION 1 /* ACPI 3.0 */ 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun struct aml_resource_address64 { 231*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 232*4882a593Smuzhiyun AML_RESOURCE_ADDRESS_COMMON u64 granularity; 233*4882a593Smuzhiyun u64 minimum; 234*4882a593Smuzhiyun u64 maximum; 235*4882a593Smuzhiyun u64 translation_offset; 236*4882a593Smuzhiyun u64 address_length; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun struct aml_resource_address32 { 240*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 241*4882a593Smuzhiyun AML_RESOURCE_ADDRESS_COMMON u32 granularity; 242*4882a593Smuzhiyun u32 minimum; 243*4882a593Smuzhiyun u32 maximum; 244*4882a593Smuzhiyun u32 translation_offset; 245*4882a593Smuzhiyun u32 address_length; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun struct aml_resource_address16 { 249*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 250*4882a593Smuzhiyun AML_RESOURCE_ADDRESS_COMMON u16 granularity; 251*4882a593Smuzhiyun u16 minimum; 252*4882a593Smuzhiyun u16 maximum; 253*4882a593Smuzhiyun u16 translation_offset; 254*4882a593Smuzhiyun u16 address_length; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun struct aml_resource_extended_irq { 258*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 flags; 259*4882a593Smuzhiyun u8 interrupt_count; 260*4882a593Smuzhiyun u32 interrupts[1]; 261*4882a593Smuzhiyun /* res_source_index, res_source optional fields follow */ 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun struct aml_resource_generic_register { 265*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 address_space_id; 266*4882a593Smuzhiyun u8 bit_width; 267*4882a593Smuzhiyun u8 bit_offset; 268*4882a593Smuzhiyun u8 access_size; /* ACPI 3.0, was previously Reserved */ 269*4882a593Smuzhiyun u64 address; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun /* Common descriptor for gpio_int and gpio_io (ACPI 5.0) */ 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun struct aml_resource_gpio { 275*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 276*4882a593Smuzhiyun u8 connection_type; 277*4882a593Smuzhiyun u16 flags; 278*4882a593Smuzhiyun u16 int_flags; 279*4882a593Smuzhiyun u8 pin_config; 280*4882a593Smuzhiyun u16 drive_strength; 281*4882a593Smuzhiyun u16 debounce_timeout; 282*4882a593Smuzhiyun u16 pin_table_offset; 283*4882a593Smuzhiyun u8 res_source_index; 284*4882a593Smuzhiyun u16 res_source_offset; 285*4882a593Smuzhiyun u16 vendor_offset; 286*4882a593Smuzhiyun u16 vendor_length; 287*4882a593Smuzhiyun /* 288*4882a593Smuzhiyun * Optional fields follow immediately: 289*4882a593Smuzhiyun * 1) PIN list (Words) 290*4882a593Smuzhiyun * 2) Resource Source String 291*4882a593Smuzhiyun * 3) Vendor Data bytes 292*4882a593Smuzhiyun */ 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun #define AML_RESOURCE_GPIO_REVISION 1 /* ACPI 5.0 */ 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun /* Values for connection_type above */ 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun #define AML_RESOURCE_GPIO_TYPE_INT 0 300*4882a593Smuzhiyun #define AML_RESOURCE_GPIO_TYPE_IO 1 301*4882a593Smuzhiyun #define AML_RESOURCE_MAX_GPIOTYPE 1 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun /* Common preamble for all serial descriptors (ACPI 5.0) */ 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun #define AML_RESOURCE_SERIAL_COMMON \ 306*4882a593Smuzhiyun u8 revision_id; \ 307*4882a593Smuzhiyun u8 res_source_index; \ 308*4882a593Smuzhiyun u8 type; \ 309*4882a593Smuzhiyun u8 flags; \ 310*4882a593Smuzhiyun u16 type_specific_flags; \ 311*4882a593Smuzhiyun u8 type_revision_id; \ 312*4882a593Smuzhiyun u16 type_data_length; \ 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun /* Values for the type field above */ 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun #define AML_RESOURCE_I2C_SERIALBUSTYPE 1 317*4882a593Smuzhiyun #define AML_RESOURCE_SPI_SERIALBUSTYPE 2 318*4882a593Smuzhiyun #define AML_RESOURCE_UART_SERIALBUSTYPE 3 319*4882a593Smuzhiyun #define AML_RESOURCE_MAX_SERIALBUSTYPE 3 320*4882a593Smuzhiyun #define AML_RESOURCE_VENDOR_SERIALBUSTYPE 192 /* Vendor defined is 0xC0-0xFF (NOT SUPPORTED) */ 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun struct aml_resource_common_serialbus { 323*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_SERIAL_COMMON}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun struct aml_resource_i2c_serialbus { 326*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 327*4882a593Smuzhiyun AML_RESOURCE_SERIAL_COMMON u32 connection_speed; 328*4882a593Smuzhiyun u16 slave_address; 329*4882a593Smuzhiyun /* 330*4882a593Smuzhiyun * Optional fields follow immediately: 331*4882a593Smuzhiyun * 1) Vendor Data bytes 332*4882a593Smuzhiyun * 2) Resource Source String 333*4882a593Smuzhiyun */ 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun #define AML_RESOURCE_I2C_REVISION 1 /* ACPI 5.0 */ 337*4882a593Smuzhiyun #define AML_RESOURCE_I2C_TYPE_REVISION 1 /* ACPI 5.0 */ 338*4882a593Smuzhiyun #define AML_RESOURCE_I2C_MIN_DATA_LEN 6 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun struct aml_resource_spi_serialbus { 341*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 342*4882a593Smuzhiyun AML_RESOURCE_SERIAL_COMMON u32 connection_speed; 343*4882a593Smuzhiyun u8 data_bit_length; 344*4882a593Smuzhiyun u8 clock_phase; 345*4882a593Smuzhiyun u8 clock_polarity; 346*4882a593Smuzhiyun u16 device_selection; 347*4882a593Smuzhiyun /* 348*4882a593Smuzhiyun * Optional fields follow immediately: 349*4882a593Smuzhiyun * 1) Vendor Data bytes 350*4882a593Smuzhiyun * 2) Resource Source String 351*4882a593Smuzhiyun */ 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun #define AML_RESOURCE_SPI_REVISION 1 /* ACPI 5.0 */ 355*4882a593Smuzhiyun #define AML_RESOURCE_SPI_TYPE_REVISION 1 /* ACPI 5.0 */ 356*4882a593Smuzhiyun #define AML_RESOURCE_SPI_MIN_DATA_LEN 9 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun struct aml_resource_uart_serialbus { 359*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON 360*4882a593Smuzhiyun AML_RESOURCE_SERIAL_COMMON u32 default_baud_rate; 361*4882a593Smuzhiyun u16 rx_fifo_size; 362*4882a593Smuzhiyun u16 tx_fifo_size; 363*4882a593Smuzhiyun u8 parity; 364*4882a593Smuzhiyun u8 lines_enabled; 365*4882a593Smuzhiyun /* 366*4882a593Smuzhiyun * Optional fields follow immediately: 367*4882a593Smuzhiyun * 1) Vendor Data bytes 368*4882a593Smuzhiyun * 2) Resource Source String 369*4882a593Smuzhiyun */ 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun #define AML_RESOURCE_UART_REVISION 1 /* ACPI 5.0 */ 373*4882a593Smuzhiyun #define AML_RESOURCE_UART_TYPE_REVISION 1 /* ACPI 5.0 */ 374*4882a593Smuzhiyun #define AML_RESOURCE_UART_MIN_DATA_LEN 10 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun struct aml_resource_pin_function { 377*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 378*4882a593Smuzhiyun u16 flags; 379*4882a593Smuzhiyun u8 pin_config; 380*4882a593Smuzhiyun u16 function_number; 381*4882a593Smuzhiyun u16 pin_table_offset; 382*4882a593Smuzhiyun u8 res_source_index; 383*4882a593Smuzhiyun u16 res_source_offset; 384*4882a593Smuzhiyun u16 vendor_offset; 385*4882a593Smuzhiyun u16 vendor_length; 386*4882a593Smuzhiyun /* 387*4882a593Smuzhiyun * Optional fields follow immediately: 388*4882a593Smuzhiyun * 1) PIN list (Words) 389*4882a593Smuzhiyun * 2) Resource Source String 390*4882a593Smuzhiyun * 3) Vendor Data bytes 391*4882a593Smuzhiyun */ 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun #define AML_RESOURCE_PIN_FUNCTION_REVISION 1 /* ACPI 6.2 */ 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun struct aml_resource_pin_config { 397*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 398*4882a593Smuzhiyun u16 flags; 399*4882a593Smuzhiyun u8 pin_config_type; 400*4882a593Smuzhiyun u32 pin_config_value; 401*4882a593Smuzhiyun u16 pin_table_offset; 402*4882a593Smuzhiyun u8 res_source_index; 403*4882a593Smuzhiyun u16 res_source_offset; 404*4882a593Smuzhiyun u16 vendor_offset; 405*4882a593Smuzhiyun u16 vendor_length; 406*4882a593Smuzhiyun /* 407*4882a593Smuzhiyun * Optional fields follow immediately: 408*4882a593Smuzhiyun * 1) PIN list (Words) 409*4882a593Smuzhiyun * 2) Resource Source String 410*4882a593Smuzhiyun * 3) Vendor Data bytes 411*4882a593Smuzhiyun */ 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun #define AML_RESOURCE_PIN_CONFIG_REVISION 1 /* ACPI 6.2 */ 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun struct aml_resource_pin_group { 417*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 418*4882a593Smuzhiyun u16 flags; 419*4882a593Smuzhiyun u16 pin_table_offset; 420*4882a593Smuzhiyun u16 label_offset; 421*4882a593Smuzhiyun u16 vendor_offset; 422*4882a593Smuzhiyun u16 vendor_length; 423*4882a593Smuzhiyun /* 424*4882a593Smuzhiyun * Optional fields follow immediately: 425*4882a593Smuzhiyun * 1) PIN list (Words) 426*4882a593Smuzhiyun * 2) Resource Label String 427*4882a593Smuzhiyun * 3) Vendor Data bytes 428*4882a593Smuzhiyun */ 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun #define AML_RESOURCE_PIN_GROUP_REVISION 1 /* ACPI 6.2 */ 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun struct aml_resource_pin_group_function { 434*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 435*4882a593Smuzhiyun u16 flags; 436*4882a593Smuzhiyun u16 function_number; 437*4882a593Smuzhiyun u8 res_source_index; 438*4882a593Smuzhiyun u16 res_source_offset; 439*4882a593Smuzhiyun u16 res_source_label_offset; 440*4882a593Smuzhiyun u16 vendor_offset; 441*4882a593Smuzhiyun u16 vendor_length; 442*4882a593Smuzhiyun /* 443*4882a593Smuzhiyun * Optional fields follow immediately: 444*4882a593Smuzhiyun * 1) Resource Source String 445*4882a593Smuzhiyun * 2) Resource Source Label String 446*4882a593Smuzhiyun * 3) Vendor Data bytes 447*4882a593Smuzhiyun */ 448*4882a593Smuzhiyun }; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun #define AML_RESOURCE_PIN_GROUP_FUNCTION_REVISION 1 /* ACPI 6.2 */ 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun struct aml_resource_pin_group_config { 453*4882a593Smuzhiyun AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id; 454*4882a593Smuzhiyun u16 flags; 455*4882a593Smuzhiyun u8 pin_config_type; 456*4882a593Smuzhiyun u32 pin_config_value; 457*4882a593Smuzhiyun u8 res_source_index; 458*4882a593Smuzhiyun u16 res_source_offset; 459*4882a593Smuzhiyun u16 res_source_label_offset; 460*4882a593Smuzhiyun u16 vendor_offset; 461*4882a593Smuzhiyun u16 vendor_length; 462*4882a593Smuzhiyun /* 463*4882a593Smuzhiyun * Optional fields follow immediately: 464*4882a593Smuzhiyun * 1) Resource Source String 465*4882a593Smuzhiyun * 2) Resource Source Label String 466*4882a593Smuzhiyun * 3) Vendor Data bytes 467*4882a593Smuzhiyun */ 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun #define AML_RESOURCE_PIN_GROUP_CONFIG_REVISION 1 /* ACPI 6.2 */ 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun /* restore default alignment */ 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun #pragma pack() 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun /* Union of all resource descriptors, so we can allocate the worst case */ 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun union aml_resource { 479*4882a593Smuzhiyun /* Descriptor headers */ 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun u8 descriptor_type; 482*4882a593Smuzhiyun struct aml_resource_small_header small_header; 483*4882a593Smuzhiyun struct aml_resource_large_header large_header; 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun /* Small resource descriptors */ 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun struct aml_resource_irq irq; 488*4882a593Smuzhiyun struct aml_resource_dma dma; 489*4882a593Smuzhiyun struct aml_resource_start_dependent start_dpf; 490*4882a593Smuzhiyun struct aml_resource_end_dependent end_dpf; 491*4882a593Smuzhiyun struct aml_resource_io io; 492*4882a593Smuzhiyun struct aml_resource_fixed_io fixed_io; 493*4882a593Smuzhiyun struct aml_resource_fixed_dma fixed_dma; 494*4882a593Smuzhiyun struct aml_resource_vendor_small vendor_small; 495*4882a593Smuzhiyun struct aml_resource_end_tag end_tag; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun /* Large resource descriptors */ 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun struct aml_resource_memory24 memory24; 500*4882a593Smuzhiyun struct aml_resource_generic_register generic_reg; 501*4882a593Smuzhiyun struct aml_resource_vendor_large vendor_large; 502*4882a593Smuzhiyun struct aml_resource_memory32 memory32; 503*4882a593Smuzhiyun struct aml_resource_fixed_memory32 fixed_memory32; 504*4882a593Smuzhiyun struct aml_resource_address16 address16; 505*4882a593Smuzhiyun struct aml_resource_address32 address32; 506*4882a593Smuzhiyun struct aml_resource_address64 address64; 507*4882a593Smuzhiyun struct aml_resource_extended_address64 ext_address64; 508*4882a593Smuzhiyun struct aml_resource_extended_irq extended_irq; 509*4882a593Smuzhiyun struct aml_resource_gpio gpio; 510*4882a593Smuzhiyun struct aml_resource_i2c_serialbus i2c_serial_bus; 511*4882a593Smuzhiyun struct aml_resource_spi_serialbus spi_serial_bus; 512*4882a593Smuzhiyun struct aml_resource_uart_serialbus uart_serial_bus; 513*4882a593Smuzhiyun struct aml_resource_common_serialbus common_serial_bus; 514*4882a593Smuzhiyun struct aml_resource_pin_function pin_function; 515*4882a593Smuzhiyun struct aml_resource_pin_config pin_config; 516*4882a593Smuzhiyun struct aml_resource_pin_group pin_group; 517*4882a593Smuzhiyun struct aml_resource_pin_group_function pin_group_function; 518*4882a593Smuzhiyun struct aml_resource_pin_group_config pin_group_config; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun /* Utility overlays */ 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun struct aml_resource_address address; 523*4882a593Smuzhiyun u32 dword_item; 524*4882a593Smuzhiyun u16 word_item; 525*4882a593Smuzhiyun u8 byte_item; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun /* Interfaces used by both the disassembler and compiler */ 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun void 531*4882a593Smuzhiyun mp_save_gpio_info(union acpi_parse_object *op, 532*4882a593Smuzhiyun union aml_resource *resource, 533*4882a593Smuzhiyun u32 pin_count, u16 *pin_list, char *device_name); 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun void 536*4882a593Smuzhiyun mp_save_serial_info(union acpi_parse_object *op, 537*4882a593Smuzhiyun union aml_resource *resource, char *device_name); 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun char *mp_get_hid_from_parse_tree(struct acpi_namespace_node *hid_node); 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun char *mp_get_hid_via_namestring(char *device_name); 542*4882a593Smuzhiyun 543*4882a593Smuzhiyun char *mp_get_connection_info(union acpi_parse_object *op, 544*4882a593Smuzhiyun u32 pin_index, 545*4882a593Smuzhiyun struct acpi_namespace_node **target_node, 546*4882a593Smuzhiyun char **target_name); 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun char *mp_get_parent_device_hid(union acpi_parse_object *op, 549*4882a593Smuzhiyun struct acpi_namespace_node **target_node, 550*4882a593Smuzhiyun char **parent_device_name); 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun char *mp_get_ddn_value(char *device_name); 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun char *mp_get_hid_value(struct acpi_namespace_node *device_node); 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun #endif 557