xref: /OK3568_Linux_fs/kernel/crypto/async_tx/async_xor.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * xor offload engine api
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright © 2006, Intel Corporation.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *      Dan Williams <dan.j.williams@intel.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *      with architecture considerations by:
10*4882a593Smuzhiyun  *      Neil Brown <neilb@suse.de>
11*4882a593Smuzhiyun  *      Jeff Garzik <jeff@garzik.org>
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/mm.h>
17*4882a593Smuzhiyun #include <linux/dma-mapping.h>
18*4882a593Smuzhiyun #include <linux/raid/xor.h>
19*4882a593Smuzhiyun #include <linux/async_tx.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* do_async_xor - dma map the pages and perform the xor with an engine */
22*4882a593Smuzhiyun static __async_inline struct dma_async_tx_descriptor *
do_async_xor(struct dma_chan * chan,struct dmaengine_unmap_data * unmap,struct async_submit_ctl * submit)23*4882a593Smuzhiyun do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
24*4882a593Smuzhiyun 	     struct async_submit_ctl *submit)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	struct dma_device *dma = chan->device;
27*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *tx = NULL;
28*4882a593Smuzhiyun 	dma_async_tx_callback cb_fn_orig = submit->cb_fn;
29*4882a593Smuzhiyun 	void *cb_param_orig = submit->cb_param;
30*4882a593Smuzhiyun 	enum async_tx_flags flags_orig = submit->flags;
31*4882a593Smuzhiyun 	enum dma_ctrl_flags dma_flags = 0;
32*4882a593Smuzhiyun 	int src_cnt = unmap->to_cnt;
33*4882a593Smuzhiyun 	int xor_src_cnt;
34*4882a593Smuzhiyun 	dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
35*4882a593Smuzhiyun 	dma_addr_t *src_list = unmap->addr;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	while (src_cnt) {
38*4882a593Smuzhiyun 		dma_addr_t tmp;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 		submit->flags = flags_orig;
41*4882a593Smuzhiyun 		xor_src_cnt = min(src_cnt, (int)dma->max_xor);
42*4882a593Smuzhiyun 		/* if we are submitting additional xors, leave the chain open
43*4882a593Smuzhiyun 		 * and clear the callback parameters
44*4882a593Smuzhiyun 		 */
45*4882a593Smuzhiyun 		if (src_cnt > xor_src_cnt) {
46*4882a593Smuzhiyun 			submit->flags &= ~ASYNC_TX_ACK;
47*4882a593Smuzhiyun 			submit->flags |= ASYNC_TX_FENCE;
48*4882a593Smuzhiyun 			submit->cb_fn = NULL;
49*4882a593Smuzhiyun 			submit->cb_param = NULL;
50*4882a593Smuzhiyun 		} else {
51*4882a593Smuzhiyun 			submit->cb_fn = cb_fn_orig;
52*4882a593Smuzhiyun 			submit->cb_param = cb_param_orig;
53*4882a593Smuzhiyun 		}
54*4882a593Smuzhiyun 		if (submit->cb_fn)
55*4882a593Smuzhiyun 			dma_flags |= DMA_PREP_INTERRUPT;
56*4882a593Smuzhiyun 		if (submit->flags & ASYNC_TX_FENCE)
57*4882a593Smuzhiyun 			dma_flags |= DMA_PREP_FENCE;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 		/* Drivers force forward progress in case they can not provide a
60*4882a593Smuzhiyun 		 * descriptor
61*4882a593Smuzhiyun 		 */
62*4882a593Smuzhiyun 		tmp = src_list[0];
63*4882a593Smuzhiyun 		if (src_list > unmap->addr)
64*4882a593Smuzhiyun 			src_list[0] = dma_dest;
65*4882a593Smuzhiyun 		tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
66*4882a593Smuzhiyun 					      xor_src_cnt, unmap->len,
67*4882a593Smuzhiyun 					      dma_flags);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 		if (unlikely(!tx))
70*4882a593Smuzhiyun 			async_tx_quiesce(&submit->depend_tx);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 		/* spin wait for the preceding transactions to complete */
73*4882a593Smuzhiyun 		while (unlikely(!tx)) {
74*4882a593Smuzhiyun 			dma_async_issue_pending(chan);
75*4882a593Smuzhiyun 			tx = dma->device_prep_dma_xor(chan, dma_dest,
76*4882a593Smuzhiyun 						      src_list,
77*4882a593Smuzhiyun 						      xor_src_cnt, unmap->len,
78*4882a593Smuzhiyun 						      dma_flags);
79*4882a593Smuzhiyun 		}
80*4882a593Smuzhiyun 		src_list[0] = tmp;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 		dma_set_unmap(tx, unmap);
83*4882a593Smuzhiyun 		async_tx_submit(chan, tx, submit);
84*4882a593Smuzhiyun 		submit->depend_tx = tx;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 		if (src_cnt > xor_src_cnt) {
87*4882a593Smuzhiyun 			/* drop completed sources */
88*4882a593Smuzhiyun 			src_cnt -= xor_src_cnt;
89*4882a593Smuzhiyun 			/* use the intermediate result a source */
90*4882a593Smuzhiyun 			src_cnt++;
91*4882a593Smuzhiyun 			src_list += xor_src_cnt - 1;
92*4882a593Smuzhiyun 		} else
93*4882a593Smuzhiyun 			break;
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return tx;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun static void
do_sync_xor_offs(struct page * dest,unsigned int offset,struct page ** src_list,unsigned int * src_offs,int src_cnt,size_t len,struct async_submit_ctl * submit)100*4882a593Smuzhiyun do_sync_xor_offs(struct page *dest, unsigned int offset,
101*4882a593Smuzhiyun 		struct page **src_list, unsigned int *src_offs,
102*4882a593Smuzhiyun 	    int src_cnt, size_t len, struct async_submit_ctl *submit)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	int i;
105*4882a593Smuzhiyun 	int xor_src_cnt = 0;
106*4882a593Smuzhiyun 	int src_off = 0;
107*4882a593Smuzhiyun 	void *dest_buf;
108*4882a593Smuzhiyun 	void **srcs;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (submit->scribble)
111*4882a593Smuzhiyun 		srcs = submit->scribble;
112*4882a593Smuzhiyun 	else
113*4882a593Smuzhiyun 		srcs = (void **) src_list;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	/* convert to buffer pointers */
116*4882a593Smuzhiyun 	for (i = 0; i < src_cnt; i++)
117*4882a593Smuzhiyun 		if (src_list[i])
118*4882a593Smuzhiyun 			srcs[xor_src_cnt++] = page_address(src_list[i]) +
119*4882a593Smuzhiyun 				(src_offs ? src_offs[i] : offset);
120*4882a593Smuzhiyun 	src_cnt = xor_src_cnt;
121*4882a593Smuzhiyun 	/* set destination address */
122*4882a593Smuzhiyun 	dest_buf = page_address(dest) + offset;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
125*4882a593Smuzhiyun 		memset(dest_buf, 0, len);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	while (src_cnt > 0) {
128*4882a593Smuzhiyun 		/* process up to 'MAX_XOR_BLOCKS' sources */
129*4882a593Smuzhiyun 		xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
130*4882a593Smuzhiyun 		xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 		/* drop completed sources */
133*4882a593Smuzhiyun 		src_cnt -= xor_src_cnt;
134*4882a593Smuzhiyun 		src_off += xor_src_cnt;
135*4882a593Smuzhiyun 	}
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	async_tx_sync_epilog(submit);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun static inline bool
dma_xor_aligned_offsets(struct dma_device * device,unsigned int offset,unsigned int * src_offs,int src_cnt,int len)141*4882a593Smuzhiyun dma_xor_aligned_offsets(struct dma_device *device, unsigned int offset,
142*4882a593Smuzhiyun 		unsigned int *src_offs, int src_cnt, int len)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	int i;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (!is_dma_xor_aligned(device, offset, 0, len))
147*4882a593Smuzhiyun 		return false;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (!src_offs)
150*4882a593Smuzhiyun 		return true;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	for (i = 0; i < src_cnt; i++) {
153*4882a593Smuzhiyun 		if (!is_dma_xor_aligned(device, src_offs[i], 0, len))
154*4882a593Smuzhiyun 			return false;
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun 	return true;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun /**
160*4882a593Smuzhiyun  * async_xor_offs - attempt to xor a set of blocks with a dma engine.
161*4882a593Smuzhiyun  * @dest: destination page
162*4882a593Smuzhiyun  * @offset: dst offset to start transaction
163*4882a593Smuzhiyun  * @src_list: array of source pages
164*4882a593Smuzhiyun  * @src_offs: array of source pages offset, NULL means common src/dst offset
165*4882a593Smuzhiyun  * @src_cnt: number of source pages
166*4882a593Smuzhiyun  * @len: length in bytes
167*4882a593Smuzhiyun  * @submit: submission / completion modifiers
168*4882a593Smuzhiyun  *
169*4882a593Smuzhiyun  * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
170*4882a593Smuzhiyun  *
171*4882a593Smuzhiyun  * xor_blocks always uses the dest as a source so the
172*4882a593Smuzhiyun  * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
173*4882a593Smuzhiyun  * the calculation.  The assumption with dma eninges is that they only
174*4882a593Smuzhiyun  * use the destination buffer as a source when it is explicity specified
175*4882a593Smuzhiyun  * in the source list.
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * src_list note: if the dest is also a source it must be at index zero.
178*4882a593Smuzhiyun  * The contents of this array will be overwritten if a scribble region
179*4882a593Smuzhiyun  * is not specified.
180*4882a593Smuzhiyun  */
181*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_xor_offs(struct page * dest,unsigned int offset,struct page ** src_list,unsigned int * src_offs,int src_cnt,size_t len,struct async_submit_ctl * submit)182*4882a593Smuzhiyun async_xor_offs(struct page *dest, unsigned int offset,
183*4882a593Smuzhiyun 		struct page **src_list, unsigned int *src_offs,
184*4882a593Smuzhiyun 		int src_cnt, size_t len, struct async_submit_ctl *submit)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
187*4882a593Smuzhiyun 						      &dest, 1, src_list,
188*4882a593Smuzhiyun 						      src_cnt, len);
189*4882a593Smuzhiyun 	struct dma_device *device = chan ? chan->device : NULL;
190*4882a593Smuzhiyun 	struct dmaengine_unmap_data *unmap = NULL;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	BUG_ON(src_cnt <= 1);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	if (device)
195*4882a593Smuzhiyun 		unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOWAIT);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	if (unmap && dma_xor_aligned_offsets(device, offset,
198*4882a593Smuzhiyun 				src_offs, src_cnt, len)) {
199*4882a593Smuzhiyun 		struct dma_async_tx_descriptor *tx;
200*4882a593Smuzhiyun 		int i, j;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 		/* run the xor asynchronously */
203*4882a593Smuzhiyun 		pr_debug("%s (async): len: %zu\n", __func__, len);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 		unmap->len = len;
206*4882a593Smuzhiyun 		for (i = 0, j = 0; i < src_cnt; i++) {
207*4882a593Smuzhiyun 			if (!src_list[i])
208*4882a593Smuzhiyun 				continue;
209*4882a593Smuzhiyun 			unmap->to_cnt++;
210*4882a593Smuzhiyun 			unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
211*4882a593Smuzhiyun 					src_offs ? src_offs[i] : offset,
212*4882a593Smuzhiyun 					len, DMA_TO_DEVICE);
213*4882a593Smuzhiyun 		}
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 		/* map it bidirectional as it may be re-used as a source */
216*4882a593Smuzhiyun 		unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
217*4882a593Smuzhiyun 					      DMA_BIDIRECTIONAL);
218*4882a593Smuzhiyun 		unmap->bidi_cnt = 1;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 		tx = do_async_xor(chan, unmap, submit);
221*4882a593Smuzhiyun 		dmaengine_unmap_put(unmap);
222*4882a593Smuzhiyun 		return tx;
223*4882a593Smuzhiyun 	} else {
224*4882a593Smuzhiyun 		dmaengine_unmap_put(unmap);
225*4882a593Smuzhiyun 		/* run the xor synchronously */
226*4882a593Smuzhiyun 		pr_debug("%s (sync): len: %zu\n", __func__, len);
227*4882a593Smuzhiyun 		WARN_ONCE(chan, "%s: no space for dma address conversion\n",
228*4882a593Smuzhiyun 			  __func__);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 		/* in the sync case the dest is an implied source
231*4882a593Smuzhiyun 		 * (assumes the dest is the first source)
232*4882a593Smuzhiyun 		 */
233*4882a593Smuzhiyun 		if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
234*4882a593Smuzhiyun 			src_cnt--;
235*4882a593Smuzhiyun 			src_list++;
236*4882a593Smuzhiyun 			if (src_offs)
237*4882a593Smuzhiyun 				src_offs++;
238*4882a593Smuzhiyun 		}
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 		/* wait for any prerequisite operations */
241*4882a593Smuzhiyun 		async_tx_quiesce(&submit->depend_tx);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 		do_sync_xor_offs(dest, offset, src_list, src_offs,
244*4882a593Smuzhiyun 				src_cnt, len, submit);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 		return NULL;
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_xor_offs);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /**
252*4882a593Smuzhiyun  * async_xor - attempt to xor a set of blocks with a dma engine.
253*4882a593Smuzhiyun  * @dest: destination page
254*4882a593Smuzhiyun  * @src_list: array of source pages
255*4882a593Smuzhiyun  * @offset: common src/dst offset to start transaction
256*4882a593Smuzhiyun  * @src_cnt: number of source pages
257*4882a593Smuzhiyun  * @len: length in bytes
258*4882a593Smuzhiyun  * @submit: submission / completion modifiers
259*4882a593Smuzhiyun  *
260*4882a593Smuzhiyun  * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
261*4882a593Smuzhiyun  *
262*4882a593Smuzhiyun  * xor_blocks always uses the dest as a source so the
263*4882a593Smuzhiyun  * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
264*4882a593Smuzhiyun  * the calculation.  The assumption with dma eninges is that they only
265*4882a593Smuzhiyun  * use the destination buffer as a source when it is explicity specified
266*4882a593Smuzhiyun  * in the source list.
267*4882a593Smuzhiyun  *
268*4882a593Smuzhiyun  * src_list note: if the dest is also a source it must be at index zero.
269*4882a593Smuzhiyun  * The contents of this array will be overwritten if a scribble region
270*4882a593Smuzhiyun  * is not specified.
271*4882a593Smuzhiyun  */
272*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_xor(struct page * dest,struct page ** src_list,unsigned int offset,int src_cnt,size_t len,struct async_submit_ctl * submit)273*4882a593Smuzhiyun async_xor(struct page *dest, struct page **src_list, unsigned int offset,
274*4882a593Smuzhiyun 	  int src_cnt, size_t len, struct async_submit_ctl *submit)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	return async_xor_offs(dest, offset, src_list, NULL,
277*4882a593Smuzhiyun 			src_cnt, len, submit);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_xor);
280*4882a593Smuzhiyun 
page_is_zero(struct page * p,unsigned int offset,size_t len)281*4882a593Smuzhiyun static int page_is_zero(struct page *p, unsigned int offset, size_t len)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	return !memchr_inv(page_address(p) + offset, 0, len);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun static inline struct dma_chan *
xor_val_chan(struct async_submit_ctl * submit,struct page * dest,struct page ** src_list,int src_cnt,size_t len)287*4882a593Smuzhiyun xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
288*4882a593Smuzhiyun 		 struct page **src_list, int src_cnt, size_t len)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	#ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
291*4882a593Smuzhiyun 	return NULL;
292*4882a593Smuzhiyun 	#endif
293*4882a593Smuzhiyun 	return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
294*4882a593Smuzhiyun 				     src_cnt, len);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun /**
298*4882a593Smuzhiyun  * async_xor_val_offs - attempt a xor parity check with a dma engine.
299*4882a593Smuzhiyun  * @dest: destination page used if the xor is performed synchronously
300*4882a593Smuzhiyun  * @offset: des offset in pages to start transaction
301*4882a593Smuzhiyun  * @src_list: array of source pages
302*4882a593Smuzhiyun  * @src_offs: array of source pages offset, NULL means common src/det offset
303*4882a593Smuzhiyun  * @src_cnt: number of source pages
304*4882a593Smuzhiyun  * @len: length in bytes
305*4882a593Smuzhiyun  * @result: 0 if sum == 0 else non-zero
306*4882a593Smuzhiyun  * @submit: submission / completion modifiers
307*4882a593Smuzhiyun  *
308*4882a593Smuzhiyun  * honored flags: ASYNC_TX_ACK
309*4882a593Smuzhiyun  *
310*4882a593Smuzhiyun  * src_list note: if the dest is also a source it must be at index zero.
311*4882a593Smuzhiyun  * The contents of this array will be overwritten if a scribble region
312*4882a593Smuzhiyun  * is not specified.
313*4882a593Smuzhiyun  */
314*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_xor_val_offs(struct page * dest,unsigned int offset,struct page ** src_list,unsigned int * src_offs,int src_cnt,size_t len,enum sum_check_flags * result,struct async_submit_ctl * submit)315*4882a593Smuzhiyun async_xor_val_offs(struct page *dest, unsigned int offset,
316*4882a593Smuzhiyun 		struct page **src_list, unsigned int *src_offs,
317*4882a593Smuzhiyun 		int src_cnt, size_t len, enum sum_check_flags *result,
318*4882a593Smuzhiyun 		struct async_submit_ctl *submit)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
321*4882a593Smuzhiyun 	struct dma_device *device = chan ? chan->device : NULL;
322*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *tx = NULL;
323*4882a593Smuzhiyun 	struct dmaengine_unmap_data *unmap = NULL;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	BUG_ON(src_cnt <= 1);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (device)
328*4882a593Smuzhiyun 		unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOWAIT);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	if (unmap && src_cnt <= device->max_xor &&
331*4882a593Smuzhiyun 	    dma_xor_aligned_offsets(device, offset, src_offs, src_cnt, len)) {
332*4882a593Smuzhiyun 		unsigned long dma_prep_flags = 0;
333*4882a593Smuzhiyun 		int i;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 		pr_debug("%s: (async) len: %zu\n", __func__, len);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 		if (submit->cb_fn)
338*4882a593Smuzhiyun 			dma_prep_flags |= DMA_PREP_INTERRUPT;
339*4882a593Smuzhiyun 		if (submit->flags & ASYNC_TX_FENCE)
340*4882a593Smuzhiyun 			dma_prep_flags |= DMA_PREP_FENCE;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 		for (i = 0; i < src_cnt; i++) {
343*4882a593Smuzhiyun 			unmap->addr[i] = dma_map_page(device->dev, src_list[i],
344*4882a593Smuzhiyun 					src_offs ? src_offs[i] : offset,
345*4882a593Smuzhiyun 					len, DMA_TO_DEVICE);
346*4882a593Smuzhiyun 			unmap->to_cnt++;
347*4882a593Smuzhiyun 		}
348*4882a593Smuzhiyun 		unmap->len = len;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 		tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
351*4882a593Smuzhiyun 						     len, result,
352*4882a593Smuzhiyun 						     dma_prep_flags);
353*4882a593Smuzhiyun 		if (unlikely(!tx)) {
354*4882a593Smuzhiyun 			async_tx_quiesce(&submit->depend_tx);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 			while (!tx) {
357*4882a593Smuzhiyun 				dma_async_issue_pending(chan);
358*4882a593Smuzhiyun 				tx = device->device_prep_dma_xor_val(chan,
359*4882a593Smuzhiyun 					unmap->addr, src_cnt, len, result,
360*4882a593Smuzhiyun 					dma_prep_flags);
361*4882a593Smuzhiyun 			}
362*4882a593Smuzhiyun 		}
363*4882a593Smuzhiyun 		dma_set_unmap(tx, unmap);
364*4882a593Smuzhiyun 		async_tx_submit(chan, tx, submit);
365*4882a593Smuzhiyun 	} else {
366*4882a593Smuzhiyun 		enum async_tx_flags flags_orig = submit->flags;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 		pr_debug("%s: (sync) len: %zu\n", __func__, len);
369*4882a593Smuzhiyun 		WARN_ONCE(device && src_cnt <= device->max_xor,
370*4882a593Smuzhiyun 			  "%s: no space for dma address conversion\n",
371*4882a593Smuzhiyun 			  __func__);
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 		submit->flags |= ASYNC_TX_XOR_DROP_DST;
374*4882a593Smuzhiyun 		submit->flags &= ~ASYNC_TX_ACK;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 		tx = async_xor_offs(dest, offset, src_list, src_offs,
377*4882a593Smuzhiyun 				src_cnt, len, submit);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 		async_tx_quiesce(&tx);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 		*result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 		async_tx_sync_epilog(submit);
384*4882a593Smuzhiyun 		submit->flags = flags_orig;
385*4882a593Smuzhiyun 	}
386*4882a593Smuzhiyun 	dmaengine_unmap_put(unmap);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	return tx;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_xor_val_offs);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun /**
393*4882a593Smuzhiyun  * async_xor_val - attempt a xor parity check with a dma engine.
394*4882a593Smuzhiyun  * @dest: destination page used if the xor is performed synchronously
395*4882a593Smuzhiyun  * @src_list: array of source pages
396*4882a593Smuzhiyun  * @offset: offset in pages to start transaction
397*4882a593Smuzhiyun  * @src_cnt: number of source pages
398*4882a593Smuzhiyun  * @len: length in bytes
399*4882a593Smuzhiyun  * @result: 0 if sum == 0 else non-zero
400*4882a593Smuzhiyun  * @submit: submission / completion modifiers
401*4882a593Smuzhiyun  *
402*4882a593Smuzhiyun  * honored flags: ASYNC_TX_ACK
403*4882a593Smuzhiyun  *
404*4882a593Smuzhiyun  * src_list note: if the dest is also a source it must be at index zero.
405*4882a593Smuzhiyun  * The contents of this array will be overwritten if a scribble region
406*4882a593Smuzhiyun  * is not specified.
407*4882a593Smuzhiyun  */
408*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_xor_val(struct page * dest,struct page ** src_list,unsigned int offset,int src_cnt,size_t len,enum sum_check_flags * result,struct async_submit_ctl * submit)409*4882a593Smuzhiyun async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
410*4882a593Smuzhiyun 	      int src_cnt, size_t len, enum sum_check_flags *result,
411*4882a593Smuzhiyun 	      struct async_submit_ctl *submit)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun 	return async_xor_val_offs(dest, offset, src_list, NULL, src_cnt,
414*4882a593Smuzhiyun 			len, result, submit);
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_xor_val);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun MODULE_AUTHOR("Intel Corporation");
419*4882a593Smuzhiyun MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
420*4882a593Smuzhiyun MODULE_LICENSE("GPL");
421