1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Asynchronous RAID-6 recovery calculations ASYNC_TX API.
4*4882a593Smuzhiyun * Copyright(c) 2009 Intel Corporation
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * based on raid6recov.c:
7*4882a593Smuzhiyun * Copyright 2002 H. Peter Anvin
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <linux/raid/pq.h>
14*4882a593Smuzhiyun #include <linux/async_tx.h>
15*4882a593Smuzhiyun #include <linux/dmaengine.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static struct dma_async_tx_descriptor *
async_sum_product(struct page * dest,unsigned int d_off,struct page ** srcs,unsigned int * src_offs,unsigned char * coef,size_t len,struct async_submit_ctl * submit)18*4882a593Smuzhiyun async_sum_product(struct page *dest, unsigned int d_off,
19*4882a593Smuzhiyun struct page **srcs, unsigned int *src_offs, unsigned char *coef,
20*4882a593Smuzhiyun size_t len, struct async_submit_ctl *submit)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
23*4882a593Smuzhiyun &dest, 1, srcs, 2, len);
24*4882a593Smuzhiyun struct dma_device *dma = chan ? chan->device : NULL;
25*4882a593Smuzhiyun struct dmaengine_unmap_data *unmap = NULL;
26*4882a593Smuzhiyun const u8 *amul, *bmul;
27*4882a593Smuzhiyun u8 ax, bx;
28*4882a593Smuzhiyun u8 *a, *b, *c;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun if (dma)
31*4882a593Smuzhiyun unmap = dmaengine_get_unmap_data(dma->dev, 3, GFP_NOWAIT);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun if (unmap) {
34*4882a593Smuzhiyun struct device *dev = dma->dev;
35*4882a593Smuzhiyun dma_addr_t pq[2];
36*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx;
37*4882a593Smuzhiyun enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun if (submit->flags & ASYNC_TX_FENCE)
40*4882a593Smuzhiyun dma_flags |= DMA_PREP_FENCE;
41*4882a593Smuzhiyun unmap->addr[0] = dma_map_page(dev, srcs[0], src_offs[0],
42*4882a593Smuzhiyun len, DMA_TO_DEVICE);
43*4882a593Smuzhiyun unmap->addr[1] = dma_map_page(dev, srcs[1], src_offs[1],
44*4882a593Smuzhiyun len, DMA_TO_DEVICE);
45*4882a593Smuzhiyun unmap->to_cnt = 2;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun unmap->addr[2] = dma_map_page(dev, dest, d_off,
48*4882a593Smuzhiyun len, DMA_BIDIRECTIONAL);
49*4882a593Smuzhiyun unmap->bidi_cnt = 1;
50*4882a593Smuzhiyun /* engine only looks at Q, but expects it to follow P */
51*4882a593Smuzhiyun pq[1] = unmap->addr[2];
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun unmap->len = len;
54*4882a593Smuzhiyun tx = dma->device_prep_dma_pq(chan, pq, unmap->addr, 2, coef,
55*4882a593Smuzhiyun len, dma_flags);
56*4882a593Smuzhiyun if (tx) {
57*4882a593Smuzhiyun dma_set_unmap(tx, unmap);
58*4882a593Smuzhiyun async_tx_submit(chan, tx, submit);
59*4882a593Smuzhiyun dmaengine_unmap_put(unmap);
60*4882a593Smuzhiyun return tx;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* could not get a descriptor, unmap and fall through to
64*4882a593Smuzhiyun * the synchronous path
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun dmaengine_unmap_put(unmap);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* run the operation synchronously */
70*4882a593Smuzhiyun async_tx_quiesce(&submit->depend_tx);
71*4882a593Smuzhiyun amul = raid6_gfmul[coef[0]];
72*4882a593Smuzhiyun bmul = raid6_gfmul[coef[1]];
73*4882a593Smuzhiyun a = page_address(srcs[0]) + src_offs[0];
74*4882a593Smuzhiyun b = page_address(srcs[1]) + src_offs[1];
75*4882a593Smuzhiyun c = page_address(dest) + d_off;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun while (len--) {
78*4882a593Smuzhiyun ax = amul[*a++];
79*4882a593Smuzhiyun bx = bmul[*b++];
80*4882a593Smuzhiyun *c++ = ax ^ bx;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return NULL;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static struct dma_async_tx_descriptor *
async_mult(struct page * dest,unsigned int d_off,struct page * src,unsigned int s_off,u8 coef,size_t len,struct async_submit_ctl * submit)87*4882a593Smuzhiyun async_mult(struct page *dest, unsigned int d_off, struct page *src,
88*4882a593Smuzhiyun unsigned int s_off, u8 coef, size_t len,
89*4882a593Smuzhiyun struct async_submit_ctl *submit)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
92*4882a593Smuzhiyun &dest, 1, &src, 1, len);
93*4882a593Smuzhiyun struct dma_device *dma = chan ? chan->device : NULL;
94*4882a593Smuzhiyun struct dmaengine_unmap_data *unmap = NULL;
95*4882a593Smuzhiyun const u8 *qmul; /* Q multiplier table */
96*4882a593Smuzhiyun u8 *d, *s;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (dma)
99*4882a593Smuzhiyun unmap = dmaengine_get_unmap_data(dma->dev, 3, GFP_NOWAIT);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (unmap) {
102*4882a593Smuzhiyun dma_addr_t dma_dest[2];
103*4882a593Smuzhiyun struct device *dev = dma->dev;
104*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx;
105*4882a593Smuzhiyun enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun if (submit->flags & ASYNC_TX_FENCE)
108*4882a593Smuzhiyun dma_flags |= DMA_PREP_FENCE;
109*4882a593Smuzhiyun unmap->addr[0] = dma_map_page(dev, src, s_off,
110*4882a593Smuzhiyun len, DMA_TO_DEVICE);
111*4882a593Smuzhiyun unmap->to_cnt++;
112*4882a593Smuzhiyun unmap->addr[1] = dma_map_page(dev, dest, d_off,
113*4882a593Smuzhiyun len, DMA_BIDIRECTIONAL);
114*4882a593Smuzhiyun dma_dest[1] = unmap->addr[1];
115*4882a593Smuzhiyun unmap->bidi_cnt++;
116*4882a593Smuzhiyun unmap->len = len;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* this looks funny, but the engine looks for Q at
119*4882a593Smuzhiyun * dma_dest[1] and ignores dma_dest[0] as a dest
120*4882a593Smuzhiyun * due to DMA_PREP_PQ_DISABLE_P
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun tx = dma->device_prep_dma_pq(chan, dma_dest, unmap->addr,
123*4882a593Smuzhiyun 1, &coef, len, dma_flags);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (tx) {
126*4882a593Smuzhiyun dma_set_unmap(tx, unmap);
127*4882a593Smuzhiyun dmaengine_unmap_put(unmap);
128*4882a593Smuzhiyun async_tx_submit(chan, tx, submit);
129*4882a593Smuzhiyun return tx;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* could not get a descriptor, unmap and fall through to
133*4882a593Smuzhiyun * the synchronous path
134*4882a593Smuzhiyun */
135*4882a593Smuzhiyun dmaengine_unmap_put(unmap);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* no channel available, or failed to allocate a descriptor, so
139*4882a593Smuzhiyun * perform the operation synchronously
140*4882a593Smuzhiyun */
141*4882a593Smuzhiyun async_tx_quiesce(&submit->depend_tx);
142*4882a593Smuzhiyun qmul = raid6_gfmul[coef];
143*4882a593Smuzhiyun d = page_address(dest) + d_off;
144*4882a593Smuzhiyun s = page_address(src) + s_off;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun while (len--)
147*4882a593Smuzhiyun *d++ = qmul[*s++];
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun return NULL;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun static struct dma_async_tx_descriptor *
__2data_recov_4(int disks,size_t bytes,int faila,int failb,struct page ** blocks,unsigned int * offs,struct async_submit_ctl * submit)153*4882a593Smuzhiyun __2data_recov_4(int disks, size_t bytes, int faila, int failb,
154*4882a593Smuzhiyun struct page **blocks, unsigned int *offs,
155*4882a593Smuzhiyun struct async_submit_ctl *submit)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
158*4882a593Smuzhiyun struct page *p, *q, *a, *b;
159*4882a593Smuzhiyun unsigned int p_off, q_off, a_off, b_off;
160*4882a593Smuzhiyun struct page *srcs[2];
161*4882a593Smuzhiyun unsigned int src_offs[2];
162*4882a593Smuzhiyun unsigned char coef[2];
163*4882a593Smuzhiyun enum async_tx_flags flags = submit->flags;
164*4882a593Smuzhiyun dma_async_tx_callback cb_fn = submit->cb_fn;
165*4882a593Smuzhiyun void *cb_param = submit->cb_param;
166*4882a593Smuzhiyun void *scribble = submit->scribble;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun p = blocks[disks-2];
169*4882a593Smuzhiyun p_off = offs[disks-2];
170*4882a593Smuzhiyun q = blocks[disks-1];
171*4882a593Smuzhiyun q_off = offs[disks-1];
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun a = blocks[faila];
174*4882a593Smuzhiyun a_off = offs[faila];
175*4882a593Smuzhiyun b = blocks[failb];
176*4882a593Smuzhiyun b_off = offs[failb];
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /* in the 4 disk case P + Pxy == P and Q + Qxy == Q */
179*4882a593Smuzhiyun /* Dx = A*(P+Pxy) + B*(Q+Qxy) */
180*4882a593Smuzhiyun srcs[0] = p;
181*4882a593Smuzhiyun src_offs[0] = p_off;
182*4882a593Smuzhiyun srcs[1] = q;
183*4882a593Smuzhiyun src_offs[1] = q_off;
184*4882a593Smuzhiyun coef[0] = raid6_gfexi[failb-faila];
185*4882a593Smuzhiyun coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]];
186*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
187*4882a593Smuzhiyun tx = async_sum_product(b, b_off, srcs, src_offs, coef, bytes, submit);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* Dy = P+Pxy+Dx */
190*4882a593Smuzhiyun srcs[0] = p;
191*4882a593Smuzhiyun src_offs[0] = p_off;
192*4882a593Smuzhiyun srcs[1] = b;
193*4882a593Smuzhiyun src_offs[1] = b_off;
194*4882a593Smuzhiyun init_async_submit(submit, flags | ASYNC_TX_XOR_ZERO_DST, tx, cb_fn,
195*4882a593Smuzhiyun cb_param, scribble);
196*4882a593Smuzhiyun tx = async_xor_offs(a, a_off, srcs, src_offs, 2, bytes, submit);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun return tx;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static struct dma_async_tx_descriptor *
__2data_recov_5(int disks,size_t bytes,int faila,int failb,struct page ** blocks,unsigned int * offs,struct async_submit_ctl * submit)203*4882a593Smuzhiyun __2data_recov_5(int disks, size_t bytes, int faila, int failb,
204*4882a593Smuzhiyun struct page **blocks, unsigned int *offs,
205*4882a593Smuzhiyun struct async_submit_ctl *submit)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
208*4882a593Smuzhiyun struct page *p, *q, *g, *dp, *dq;
209*4882a593Smuzhiyun unsigned int p_off, q_off, g_off, dp_off, dq_off;
210*4882a593Smuzhiyun struct page *srcs[2];
211*4882a593Smuzhiyun unsigned int src_offs[2];
212*4882a593Smuzhiyun unsigned char coef[2];
213*4882a593Smuzhiyun enum async_tx_flags flags = submit->flags;
214*4882a593Smuzhiyun dma_async_tx_callback cb_fn = submit->cb_fn;
215*4882a593Smuzhiyun void *cb_param = submit->cb_param;
216*4882a593Smuzhiyun void *scribble = submit->scribble;
217*4882a593Smuzhiyun int good_srcs, good, i;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun good_srcs = 0;
220*4882a593Smuzhiyun good = -1;
221*4882a593Smuzhiyun for (i = 0; i < disks-2; i++) {
222*4882a593Smuzhiyun if (blocks[i] == NULL)
223*4882a593Smuzhiyun continue;
224*4882a593Smuzhiyun if (i == faila || i == failb)
225*4882a593Smuzhiyun continue;
226*4882a593Smuzhiyun good = i;
227*4882a593Smuzhiyun good_srcs++;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun BUG_ON(good_srcs > 1);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun p = blocks[disks-2];
232*4882a593Smuzhiyun p_off = offs[disks-2];
233*4882a593Smuzhiyun q = blocks[disks-1];
234*4882a593Smuzhiyun q_off = offs[disks-1];
235*4882a593Smuzhiyun g = blocks[good];
236*4882a593Smuzhiyun g_off = offs[good];
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* Compute syndrome with zero for the missing data pages
239*4882a593Smuzhiyun * Use the dead data pages as temporary storage for delta p and
240*4882a593Smuzhiyun * delta q
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun dp = blocks[faila];
243*4882a593Smuzhiyun dp_off = offs[faila];
244*4882a593Smuzhiyun dq = blocks[failb];
245*4882a593Smuzhiyun dq_off = offs[failb];
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
248*4882a593Smuzhiyun tx = async_memcpy(dp, g, dp_off, g_off, bytes, submit);
249*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
250*4882a593Smuzhiyun tx = async_mult(dq, dq_off, g, g_off,
251*4882a593Smuzhiyun raid6_gfexp[good], bytes, submit);
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* compute P + Pxy */
254*4882a593Smuzhiyun srcs[0] = dp;
255*4882a593Smuzhiyun src_offs[0] = dp_off;
256*4882a593Smuzhiyun srcs[1] = p;
257*4882a593Smuzhiyun src_offs[1] = p_off;
258*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx,
259*4882a593Smuzhiyun NULL, NULL, scribble);
260*4882a593Smuzhiyun tx = async_xor_offs(dp, dp_off, srcs, src_offs, 2, bytes, submit);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* compute Q + Qxy */
263*4882a593Smuzhiyun srcs[0] = dq;
264*4882a593Smuzhiyun src_offs[0] = dq_off;
265*4882a593Smuzhiyun srcs[1] = q;
266*4882a593Smuzhiyun src_offs[1] = q_off;
267*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx,
268*4882a593Smuzhiyun NULL, NULL, scribble);
269*4882a593Smuzhiyun tx = async_xor_offs(dq, dq_off, srcs, src_offs, 2, bytes, submit);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* Dx = A*(P+Pxy) + B*(Q+Qxy) */
272*4882a593Smuzhiyun srcs[0] = dp;
273*4882a593Smuzhiyun src_offs[0] = dp_off;
274*4882a593Smuzhiyun srcs[1] = dq;
275*4882a593Smuzhiyun src_offs[1] = dq_off;
276*4882a593Smuzhiyun coef[0] = raid6_gfexi[failb-faila];
277*4882a593Smuzhiyun coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]];
278*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
279*4882a593Smuzhiyun tx = async_sum_product(dq, dq_off, srcs, src_offs, coef, bytes, submit);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* Dy = P+Pxy+Dx */
282*4882a593Smuzhiyun srcs[0] = dp;
283*4882a593Smuzhiyun src_offs[0] = dp_off;
284*4882a593Smuzhiyun srcs[1] = dq;
285*4882a593Smuzhiyun src_offs[1] = dq_off;
286*4882a593Smuzhiyun init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn,
287*4882a593Smuzhiyun cb_param, scribble);
288*4882a593Smuzhiyun tx = async_xor_offs(dp, dp_off, srcs, src_offs, 2, bytes, submit);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return tx;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun static struct dma_async_tx_descriptor *
__2data_recov_n(int disks,size_t bytes,int faila,int failb,struct page ** blocks,unsigned int * offs,struct async_submit_ctl * submit)294*4882a593Smuzhiyun __2data_recov_n(int disks, size_t bytes, int faila, int failb,
295*4882a593Smuzhiyun struct page **blocks, unsigned int *offs,
296*4882a593Smuzhiyun struct async_submit_ctl *submit)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
299*4882a593Smuzhiyun struct page *p, *q, *dp, *dq;
300*4882a593Smuzhiyun unsigned int p_off, q_off, dp_off, dq_off;
301*4882a593Smuzhiyun struct page *srcs[2];
302*4882a593Smuzhiyun unsigned int src_offs[2];
303*4882a593Smuzhiyun unsigned char coef[2];
304*4882a593Smuzhiyun enum async_tx_flags flags = submit->flags;
305*4882a593Smuzhiyun dma_async_tx_callback cb_fn = submit->cb_fn;
306*4882a593Smuzhiyun void *cb_param = submit->cb_param;
307*4882a593Smuzhiyun void *scribble = submit->scribble;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun p = blocks[disks-2];
310*4882a593Smuzhiyun p_off = offs[disks-2];
311*4882a593Smuzhiyun q = blocks[disks-1];
312*4882a593Smuzhiyun q_off = offs[disks-1];
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* Compute syndrome with zero for the missing data pages
315*4882a593Smuzhiyun * Use the dead data pages as temporary storage for
316*4882a593Smuzhiyun * delta p and delta q
317*4882a593Smuzhiyun */
318*4882a593Smuzhiyun dp = blocks[faila];
319*4882a593Smuzhiyun dp_off = offs[faila];
320*4882a593Smuzhiyun blocks[faila] = NULL;
321*4882a593Smuzhiyun blocks[disks-2] = dp;
322*4882a593Smuzhiyun offs[disks-2] = dp_off;
323*4882a593Smuzhiyun dq = blocks[failb];
324*4882a593Smuzhiyun dq_off = offs[failb];
325*4882a593Smuzhiyun blocks[failb] = NULL;
326*4882a593Smuzhiyun blocks[disks-1] = dq;
327*4882a593Smuzhiyun offs[disks-1] = dq_off;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
330*4882a593Smuzhiyun tx = async_gen_syndrome(blocks, offs, disks, bytes, submit);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /* Restore pointer table */
333*4882a593Smuzhiyun blocks[faila] = dp;
334*4882a593Smuzhiyun offs[faila] = dp_off;
335*4882a593Smuzhiyun blocks[failb] = dq;
336*4882a593Smuzhiyun offs[failb] = dq_off;
337*4882a593Smuzhiyun blocks[disks-2] = p;
338*4882a593Smuzhiyun offs[disks-2] = p_off;
339*4882a593Smuzhiyun blocks[disks-1] = q;
340*4882a593Smuzhiyun offs[disks-1] = q_off;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* compute P + Pxy */
343*4882a593Smuzhiyun srcs[0] = dp;
344*4882a593Smuzhiyun src_offs[0] = dp_off;
345*4882a593Smuzhiyun srcs[1] = p;
346*4882a593Smuzhiyun src_offs[1] = p_off;
347*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx,
348*4882a593Smuzhiyun NULL, NULL, scribble);
349*4882a593Smuzhiyun tx = async_xor_offs(dp, dp_off, srcs, src_offs, 2, bytes, submit);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun /* compute Q + Qxy */
352*4882a593Smuzhiyun srcs[0] = dq;
353*4882a593Smuzhiyun src_offs[0] = dq_off;
354*4882a593Smuzhiyun srcs[1] = q;
355*4882a593Smuzhiyun src_offs[1] = q_off;
356*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx,
357*4882a593Smuzhiyun NULL, NULL, scribble);
358*4882a593Smuzhiyun tx = async_xor_offs(dq, dq_off, srcs, src_offs, 2, bytes, submit);
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /* Dx = A*(P+Pxy) + B*(Q+Qxy) */
361*4882a593Smuzhiyun srcs[0] = dp;
362*4882a593Smuzhiyun src_offs[0] = dp_off;
363*4882a593Smuzhiyun srcs[1] = dq;
364*4882a593Smuzhiyun src_offs[1] = dq_off;
365*4882a593Smuzhiyun coef[0] = raid6_gfexi[failb-faila];
366*4882a593Smuzhiyun coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]];
367*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
368*4882a593Smuzhiyun tx = async_sum_product(dq, dq_off, srcs, src_offs, coef, bytes, submit);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun /* Dy = P+Pxy+Dx */
371*4882a593Smuzhiyun srcs[0] = dp;
372*4882a593Smuzhiyun src_offs[0] = dp_off;
373*4882a593Smuzhiyun srcs[1] = dq;
374*4882a593Smuzhiyun src_offs[1] = dq_off;
375*4882a593Smuzhiyun init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn,
376*4882a593Smuzhiyun cb_param, scribble);
377*4882a593Smuzhiyun tx = async_xor_offs(dp, dp_off, srcs, src_offs, 2, bytes, submit);
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return tx;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /**
383*4882a593Smuzhiyun * async_raid6_2data_recov - asynchronously calculate two missing data blocks
384*4882a593Smuzhiyun * @disks: number of disks in the RAID-6 array
385*4882a593Smuzhiyun * @bytes: block size
386*4882a593Smuzhiyun * @faila: first failed drive index
387*4882a593Smuzhiyun * @failb: second failed drive index
388*4882a593Smuzhiyun * @blocks: array of source pointers where the last two entries are p and q
389*4882a593Smuzhiyun * @offs: array of offset for pages in blocks
390*4882a593Smuzhiyun * @submit: submission/completion modifiers
391*4882a593Smuzhiyun */
392*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_raid6_2data_recov(int disks,size_t bytes,int faila,int failb,struct page ** blocks,unsigned int * offs,struct async_submit_ctl * submit)393*4882a593Smuzhiyun async_raid6_2data_recov(int disks, size_t bytes, int faila, int failb,
394*4882a593Smuzhiyun struct page **blocks, unsigned int *offs,
395*4882a593Smuzhiyun struct async_submit_ctl *submit)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun void *scribble = submit->scribble;
398*4882a593Smuzhiyun int non_zero_srcs, i;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun BUG_ON(faila == failb);
401*4882a593Smuzhiyun if (failb < faila)
402*4882a593Smuzhiyun swap(faila, failb);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* if a dma resource is not available or a scribble buffer is not
407*4882a593Smuzhiyun * available punt to the synchronous path. In the 'dma not
408*4882a593Smuzhiyun * available' case be sure to use the scribble buffer to
409*4882a593Smuzhiyun * preserve the content of 'blocks' as the caller intended.
410*4882a593Smuzhiyun */
411*4882a593Smuzhiyun if (!async_dma_find_channel(DMA_PQ) || !scribble) {
412*4882a593Smuzhiyun void **ptrs = scribble ? scribble : (void **) blocks;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun async_tx_quiesce(&submit->depend_tx);
415*4882a593Smuzhiyun for (i = 0; i < disks; i++)
416*4882a593Smuzhiyun if (blocks[i] == NULL)
417*4882a593Smuzhiyun ptrs[i] = (void *) raid6_empty_zero_page;
418*4882a593Smuzhiyun else
419*4882a593Smuzhiyun ptrs[i] = page_address(blocks[i]) + offs[i];
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun raid6_2data_recov(disks, bytes, faila, failb, ptrs);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun async_tx_sync_epilog(submit);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun return NULL;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun non_zero_srcs = 0;
429*4882a593Smuzhiyun for (i = 0; i < disks-2 && non_zero_srcs < 4; i++)
430*4882a593Smuzhiyun if (blocks[i])
431*4882a593Smuzhiyun non_zero_srcs++;
432*4882a593Smuzhiyun switch (non_zero_srcs) {
433*4882a593Smuzhiyun case 0:
434*4882a593Smuzhiyun case 1:
435*4882a593Smuzhiyun /* There must be at least 2 sources - the failed devices. */
436*4882a593Smuzhiyun BUG();
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun case 2:
439*4882a593Smuzhiyun /* dma devices do not uniformly understand a zero source pq
440*4882a593Smuzhiyun * operation (in contrast to the synchronous case), so
441*4882a593Smuzhiyun * explicitly handle the special case of a 4 disk array with
442*4882a593Smuzhiyun * both data disks missing.
443*4882a593Smuzhiyun */
444*4882a593Smuzhiyun return __2data_recov_4(disks, bytes, faila, failb,
445*4882a593Smuzhiyun blocks, offs, submit);
446*4882a593Smuzhiyun case 3:
447*4882a593Smuzhiyun /* dma devices do not uniformly understand a single
448*4882a593Smuzhiyun * source pq operation (in contrast to the synchronous
449*4882a593Smuzhiyun * case), so explicitly handle the special case of a 5 disk
450*4882a593Smuzhiyun * array with 2 of 3 data disks missing.
451*4882a593Smuzhiyun */
452*4882a593Smuzhiyun return __2data_recov_5(disks, bytes, faila, failb,
453*4882a593Smuzhiyun blocks, offs, submit);
454*4882a593Smuzhiyun default:
455*4882a593Smuzhiyun return __2data_recov_n(disks, bytes, faila, failb,
456*4882a593Smuzhiyun blocks, offs, submit);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_raid6_2data_recov);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun /**
462*4882a593Smuzhiyun * async_raid6_datap_recov - asynchronously calculate a data and the 'p' block
463*4882a593Smuzhiyun * @disks: number of disks in the RAID-6 array
464*4882a593Smuzhiyun * @bytes: block size
465*4882a593Smuzhiyun * @faila: failed drive index
466*4882a593Smuzhiyun * @blocks: array of source pointers where the last two entries are p and q
467*4882a593Smuzhiyun * @offs: array of offset for pages in blocks
468*4882a593Smuzhiyun * @submit: submission/completion modifiers
469*4882a593Smuzhiyun */
470*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_raid6_datap_recov(int disks,size_t bytes,int faila,struct page ** blocks,unsigned int * offs,struct async_submit_ctl * submit)471*4882a593Smuzhiyun async_raid6_datap_recov(int disks, size_t bytes, int faila,
472*4882a593Smuzhiyun struct page **blocks, unsigned int *offs,
473*4882a593Smuzhiyun struct async_submit_ctl *submit)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
476*4882a593Smuzhiyun struct page *p, *q, *dq;
477*4882a593Smuzhiyun unsigned int p_off, q_off, dq_off;
478*4882a593Smuzhiyun u8 coef;
479*4882a593Smuzhiyun enum async_tx_flags flags = submit->flags;
480*4882a593Smuzhiyun dma_async_tx_callback cb_fn = submit->cb_fn;
481*4882a593Smuzhiyun void *cb_param = submit->cb_param;
482*4882a593Smuzhiyun void *scribble = submit->scribble;
483*4882a593Smuzhiyun int good_srcs, good, i;
484*4882a593Smuzhiyun struct page *srcs[2];
485*4882a593Smuzhiyun unsigned int src_offs[2];
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* if a dma resource is not available or a scribble buffer is not
490*4882a593Smuzhiyun * available punt to the synchronous path. In the 'dma not
491*4882a593Smuzhiyun * available' case be sure to use the scribble buffer to
492*4882a593Smuzhiyun * preserve the content of 'blocks' as the caller intended.
493*4882a593Smuzhiyun */
494*4882a593Smuzhiyun if (!async_dma_find_channel(DMA_PQ) || !scribble) {
495*4882a593Smuzhiyun void **ptrs = scribble ? scribble : (void **) blocks;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun async_tx_quiesce(&submit->depend_tx);
498*4882a593Smuzhiyun for (i = 0; i < disks; i++)
499*4882a593Smuzhiyun if (blocks[i] == NULL)
500*4882a593Smuzhiyun ptrs[i] = (void*)raid6_empty_zero_page;
501*4882a593Smuzhiyun else
502*4882a593Smuzhiyun ptrs[i] = page_address(blocks[i]) + offs[i];
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun raid6_datap_recov(disks, bytes, faila, ptrs);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun async_tx_sync_epilog(submit);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun return NULL;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun good_srcs = 0;
512*4882a593Smuzhiyun good = -1;
513*4882a593Smuzhiyun for (i = 0; i < disks-2; i++) {
514*4882a593Smuzhiyun if (i == faila)
515*4882a593Smuzhiyun continue;
516*4882a593Smuzhiyun if (blocks[i]) {
517*4882a593Smuzhiyun good = i;
518*4882a593Smuzhiyun good_srcs++;
519*4882a593Smuzhiyun if (good_srcs > 1)
520*4882a593Smuzhiyun break;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun BUG_ON(good_srcs == 0);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun p = blocks[disks-2];
526*4882a593Smuzhiyun p_off = offs[disks-2];
527*4882a593Smuzhiyun q = blocks[disks-1];
528*4882a593Smuzhiyun q_off = offs[disks-1];
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun /* Compute syndrome with zero for the missing data page
531*4882a593Smuzhiyun * Use the dead data page as temporary storage for delta q
532*4882a593Smuzhiyun */
533*4882a593Smuzhiyun dq = blocks[faila];
534*4882a593Smuzhiyun dq_off = offs[faila];
535*4882a593Smuzhiyun blocks[faila] = NULL;
536*4882a593Smuzhiyun blocks[disks-1] = dq;
537*4882a593Smuzhiyun offs[disks-1] = dq_off;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* in the 4-disk case we only need to perform a single source
540*4882a593Smuzhiyun * multiplication with the one good data block.
541*4882a593Smuzhiyun */
542*4882a593Smuzhiyun if (good_srcs == 1) {
543*4882a593Smuzhiyun struct page *g = blocks[good];
544*4882a593Smuzhiyun unsigned int g_off = offs[good];
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL,
547*4882a593Smuzhiyun scribble);
548*4882a593Smuzhiyun tx = async_memcpy(p, g, p_off, g_off, bytes, submit);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL,
551*4882a593Smuzhiyun scribble);
552*4882a593Smuzhiyun tx = async_mult(dq, dq_off, g, g_off,
553*4882a593Smuzhiyun raid6_gfexp[good], bytes, submit);
554*4882a593Smuzhiyun } else {
555*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL,
556*4882a593Smuzhiyun scribble);
557*4882a593Smuzhiyun tx = async_gen_syndrome(blocks, offs, disks, bytes, submit);
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* Restore pointer table */
561*4882a593Smuzhiyun blocks[faila] = dq;
562*4882a593Smuzhiyun offs[faila] = dq_off;
563*4882a593Smuzhiyun blocks[disks-1] = q;
564*4882a593Smuzhiyun offs[disks-1] = q_off;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun /* calculate g^{-faila} */
567*4882a593Smuzhiyun coef = raid6_gfinv[raid6_gfexp[faila]];
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun srcs[0] = dq;
570*4882a593Smuzhiyun src_offs[0] = dq_off;
571*4882a593Smuzhiyun srcs[1] = q;
572*4882a593Smuzhiyun src_offs[1] = q_off;
573*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx,
574*4882a593Smuzhiyun NULL, NULL, scribble);
575*4882a593Smuzhiyun tx = async_xor_offs(dq, dq_off, srcs, src_offs, 2, bytes, submit);
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble);
578*4882a593Smuzhiyun tx = async_mult(dq, dq_off, dq, dq_off, coef, bytes, submit);
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun srcs[0] = p;
581*4882a593Smuzhiyun src_offs[0] = p_off;
582*4882a593Smuzhiyun srcs[1] = dq;
583*4882a593Smuzhiyun src_offs[1] = dq_off;
584*4882a593Smuzhiyun init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn,
585*4882a593Smuzhiyun cb_param, scribble);
586*4882a593Smuzhiyun tx = async_xor_offs(p, p_off, srcs, src_offs, 2, bytes, submit);
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun return tx;
589*4882a593Smuzhiyun }
590*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_raid6_datap_recov);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun MODULE_AUTHOR("Dan Williams <dan.j.williams@intel.com>");
593*4882a593Smuzhiyun MODULE_DESCRIPTION("asynchronous RAID-6 recovery api");
594*4882a593Smuzhiyun MODULE_LICENSE("GPL");
595