1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * copy offload engine support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright © 2006, Intel Corporation.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Dan Williams <dan.j.williams@intel.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * with architecture considerations by:
10*4882a593Smuzhiyun * Neil Brown <neilb@suse.de>
11*4882a593Smuzhiyun * Jeff Garzik <jeff@garzik.org>
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/highmem.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/mm.h>
17*4882a593Smuzhiyun #include <linux/dma-mapping.h>
18*4882a593Smuzhiyun #include <linux/async_tx.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /**
21*4882a593Smuzhiyun * async_memcpy - attempt to copy memory with a dma engine.
22*4882a593Smuzhiyun * @dest: destination page
23*4882a593Smuzhiyun * @src: src page
24*4882a593Smuzhiyun * @dest_offset: offset into 'dest' to start transaction
25*4882a593Smuzhiyun * @src_offset: offset into 'src' to start transaction
26*4882a593Smuzhiyun * @len: length in bytes
27*4882a593Smuzhiyun * @submit: submission / completion modifiers
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * honored flags: ASYNC_TX_ACK
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun struct dma_async_tx_descriptor *
async_memcpy(struct page * dest,struct page * src,unsigned int dest_offset,unsigned int src_offset,size_t len,struct async_submit_ctl * submit)32*4882a593Smuzhiyun async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
33*4882a593Smuzhiyun unsigned int src_offset, size_t len,
34*4882a593Smuzhiyun struct async_submit_ctl *submit)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
37*4882a593Smuzhiyun &dest, 1, &src, 1, len);
38*4882a593Smuzhiyun struct dma_device *device = chan ? chan->device : NULL;
39*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
40*4882a593Smuzhiyun struct dmaengine_unmap_data *unmap = NULL;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun if (device)
43*4882a593Smuzhiyun unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun if (unmap && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
46*4882a593Smuzhiyun unsigned long dma_prep_flags = 0;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (submit->cb_fn)
49*4882a593Smuzhiyun dma_prep_flags |= DMA_PREP_INTERRUPT;
50*4882a593Smuzhiyun if (submit->flags & ASYNC_TX_FENCE)
51*4882a593Smuzhiyun dma_prep_flags |= DMA_PREP_FENCE;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun unmap->to_cnt = 1;
54*4882a593Smuzhiyun unmap->addr[0] = dma_map_page(device->dev, src, src_offset, len,
55*4882a593Smuzhiyun DMA_TO_DEVICE);
56*4882a593Smuzhiyun unmap->from_cnt = 1;
57*4882a593Smuzhiyun unmap->addr[1] = dma_map_page(device->dev, dest, dest_offset, len,
58*4882a593Smuzhiyun DMA_FROM_DEVICE);
59*4882a593Smuzhiyun unmap->len = len;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun tx = device->device_prep_dma_memcpy(chan, unmap->addr[1],
62*4882a593Smuzhiyun unmap->addr[0], len,
63*4882a593Smuzhiyun dma_prep_flags);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (tx) {
67*4882a593Smuzhiyun pr_debug("%s: (async) len: %zu\n", __func__, len);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun dma_set_unmap(tx, unmap);
70*4882a593Smuzhiyun async_tx_submit(chan, tx, submit);
71*4882a593Smuzhiyun } else {
72*4882a593Smuzhiyun void *dest_buf, *src_buf;
73*4882a593Smuzhiyun pr_debug("%s: (sync) len: %zu\n", __func__, len);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* wait for any prerequisite operations */
76*4882a593Smuzhiyun async_tx_quiesce(&submit->depend_tx);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun dest_buf = kmap_atomic(dest) + dest_offset;
79*4882a593Smuzhiyun src_buf = kmap_atomic(src) + src_offset;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun memcpy(dest_buf, src_buf, len);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun kunmap_atomic(src_buf);
84*4882a593Smuzhiyun kunmap_atomic(dest_buf);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun async_tx_sync_epilog(submit);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun dmaengine_unmap_put(unmap);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun return tx;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(async_memcpy);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun MODULE_AUTHOR("Intel Corporation");
96*4882a593Smuzhiyun MODULE_DESCRIPTION("asynchronous memcpy api");
97*4882a593Smuzhiyun MODULE_LICENSE("GPL");
98