1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/xtensa/include/asm/traps.h
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
5*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
6*4882a593Smuzhiyun * for more details.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2012 Tensilica Inc.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #ifndef _XTENSA_TRAPS_H
11*4882a593Smuzhiyun #define _XTENSA_TRAPS_H
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <asm/ptrace.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * Per-CPU exception handling data structure.
17*4882a593Smuzhiyun * EXCSAVE1 points to it.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun struct exc_table {
20*4882a593Smuzhiyun /* Kernel Stack */
21*4882a593Smuzhiyun void *kstk;
22*4882a593Smuzhiyun /* Double exception save area for a0 */
23*4882a593Smuzhiyun unsigned long double_save;
24*4882a593Smuzhiyun /* Fixup handler */
25*4882a593Smuzhiyun void *fixup;
26*4882a593Smuzhiyun /* For passing a parameter to fixup */
27*4882a593Smuzhiyun void *fixup_param;
28*4882a593Smuzhiyun /* Fast user exception handlers */
29*4882a593Smuzhiyun void *fast_user_handler[EXCCAUSE_N];
30*4882a593Smuzhiyun /* Fast kernel exception handlers */
31*4882a593Smuzhiyun void *fast_kernel_handler[EXCCAUSE_N];
32*4882a593Smuzhiyun /* Default C-Handlers */
33*4882a593Smuzhiyun void *default_handler[EXCCAUSE_N];
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * handler must be either of the following:
38*4882a593Smuzhiyun * void (*)(struct pt_regs *regs);
39*4882a593Smuzhiyun * void (*)(struct pt_regs *regs, unsigned long exccause);
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun extern void * __init trap_set_handler(int cause, void *handler);
42*4882a593Smuzhiyun extern void do_unhandled(struct pt_regs *regs, unsigned long exccause);
43*4882a593Smuzhiyun void fast_second_level_miss(void);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Initialize minimal exc_table structure sufficient for basic paging */
early_trap_init(void)46*4882a593Smuzhiyun static inline void __init early_trap_init(void)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun static struct exc_table exc_table __initdata = {
49*4882a593Smuzhiyun .fast_kernel_handler[EXCCAUSE_DTLB_MISS] =
50*4882a593Smuzhiyun fast_second_level_miss,
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun __asm__ __volatile__("wsr %0, excsave1\n" : : "a" (&exc_table));
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun void secondary_trap_init(void);
56*4882a593Smuzhiyun
spill_registers(void)57*4882a593Smuzhiyun static inline void spill_registers(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun #if XCHAL_NUM_AREGS > 16
60*4882a593Smuzhiyun __asm__ __volatile__ (
61*4882a593Smuzhiyun " call8 1f\n"
62*4882a593Smuzhiyun " _j 2f\n"
63*4882a593Smuzhiyun " retw\n"
64*4882a593Smuzhiyun " .align 4\n"
65*4882a593Smuzhiyun "1:\n"
66*4882a593Smuzhiyun #if XCHAL_NUM_AREGS == 32
67*4882a593Smuzhiyun " _entry a1, 32\n"
68*4882a593Smuzhiyun " addi a8, a0, 3\n"
69*4882a593Smuzhiyun " _entry a1, 16\n"
70*4882a593Smuzhiyun " mov a12, a12\n"
71*4882a593Smuzhiyun " retw\n"
72*4882a593Smuzhiyun #else
73*4882a593Smuzhiyun " _entry a1, 48\n"
74*4882a593Smuzhiyun " call12 1f\n"
75*4882a593Smuzhiyun " retw\n"
76*4882a593Smuzhiyun " .align 4\n"
77*4882a593Smuzhiyun "1:\n"
78*4882a593Smuzhiyun " .rept (" __stringify(XCHAL_NUM_AREGS) " - 16) / 12\n"
79*4882a593Smuzhiyun " _entry a1, 48\n"
80*4882a593Smuzhiyun " mov a12, a0\n"
81*4882a593Smuzhiyun " .endr\n"
82*4882a593Smuzhiyun " _entry a1, 16\n"
83*4882a593Smuzhiyun #if XCHAL_NUM_AREGS % 12 == 0
84*4882a593Smuzhiyun " mov a12, a12\n"
85*4882a593Smuzhiyun #elif XCHAL_NUM_AREGS % 12 == 4
86*4882a593Smuzhiyun " mov a4, a4\n"
87*4882a593Smuzhiyun #elif XCHAL_NUM_AREGS % 12 == 8
88*4882a593Smuzhiyun " mov a8, a8\n"
89*4882a593Smuzhiyun #endif
90*4882a593Smuzhiyun " retw\n"
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun "2:\n"
93*4882a593Smuzhiyun : : : "a8", "a9", "memory");
94*4882a593Smuzhiyun #else
95*4882a593Smuzhiyun __asm__ __volatile__ (
96*4882a593Smuzhiyun " mov a12, a12\n"
97*4882a593Smuzhiyun : : : "memory");
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun struct debug_table {
102*4882a593Smuzhiyun /* Pointer to debug exception handler */
103*4882a593Smuzhiyun void (*debug_exception)(void);
104*4882a593Smuzhiyun /* Temporary register save area */
105*4882a593Smuzhiyun unsigned long debug_save[1];
106*4882a593Smuzhiyun #ifdef CONFIG_HAVE_HW_BREAKPOINT
107*4882a593Smuzhiyun /* Save area for DBREAKC registers */
108*4882a593Smuzhiyun unsigned long dbreakc_save[XCHAL_NUM_DBREAK];
109*4882a593Smuzhiyun /* Saved ICOUNT register */
110*4882a593Smuzhiyun unsigned long icount_save;
111*4882a593Smuzhiyun /* Saved ICOUNTLEVEL register */
112*4882a593Smuzhiyun unsigned long icount_level_save;
113*4882a593Smuzhiyun #endif
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun void debug_exception(void);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #endif /* _XTENSA_TRAPS_H */
119