1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * include/asm-xtensa/pci-bridge.h
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General
5*4882a593Smuzhiyun * Public License. See the file "COPYING" in the main directory of
6*4882a593Smuzhiyun * this archive for more details.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2005 Tensilica Inc.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #ifndef _XTENSA_PCI_BRIDGE_H
12*4882a593Smuzhiyun #define _XTENSA_PCI_BRIDGE_H
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun struct device_node;
15*4882a593Smuzhiyun struct pci_controller;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * pciauto_bus_scan() enumerates the pci space.
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun extern int pciauto_bus_scan(struct pci_controller *, int);
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct pci_space {
24*4882a593Smuzhiyun unsigned long start;
25*4882a593Smuzhiyun unsigned long end;
26*4882a593Smuzhiyun unsigned long base;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun * Structure of a PCI controller (host bridge)
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct pci_controller {
34*4882a593Smuzhiyun int index; /* used for pci_controller_num */
35*4882a593Smuzhiyun struct pci_controller *next;
36*4882a593Smuzhiyun struct pci_bus *bus;
37*4882a593Smuzhiyun void *arch_data;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun int first_busno;
40*4882a593Smuzhiyun int last_busno;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct pci_ops *ops;
43*4882a593Smuzhiyun volatile unsigned int *cfg_addr;
44*4882a593Smuzhiyun volatile unsigned char *cfg_data;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* Currently, we limit ourselves to 1 IO range and 3 mem
47*4882a593Smuzhiyun * ranges since the common pci_bus structure can't handle more
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun struct resource io_resource;
50*4882a593Smuzhiyun struct resource mem_resources[3];
51*4882a593Smuzhiyun int mem_resource_count;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* Host bridge I/O and Memory space
54*4882a593Smuzhiyun * Used for BAR placement algorithms
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun struct pci_space io_space;
57*4882a593Smuzhiyun struct pci_space mem_space;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* Return the interrupt number fo a device. */
60*4882a593Smuzhiyun int (*map_irq)(struct pci_dev*, u8, u8);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
pcibios_init_resource(struct resource * res,unsigned long start,unsigned long end,int flags,char * name)64*4882a593Smuzhiyun static inline void pcibios_init_resource(struct resource *res,
65*4882a593Smuzhiyun unsigned long start, unsigned long end, int flags, char *name)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun res->start = start;
68*4882a593Smuzhiyun res->end = end;
69*4882a593Smuzhiyun res->flags = flags;
70*4882a593Smuzhiyun res->name = name;
71*4882a593Smuzhiyun res->parent = NULL;
72*4882a593Smuzhiyun res->sibling = NULL;
73*4882a593Smuzhiyun res->child = NULL;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* These are used for config access before all the PCI probing has been done. */
78*4882a593Smuzhiyun int early_read_config_byte(struct pci_controller*, int, int, int, u8*);
79*4882a593Smuzhiyun int early_read_config_word(struct pci_controller*, int, int, int, u16*);
80*4882a593Smuzhiyun int early_read_config_dword(struct pci_controller*, int, int, int, u32*);
81*4882a593Smuzhiyun int early_write_config_byte(struct pci_controller*, int, int, int, u8);
82*4882a593Smuzhiyun int early_write_config_word(struct pci_controller*, int, int, int, u16);
83*4882a593Smuzhiyun int early_write_config_dword(struct pci_controller*, int, int, int, u32);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #endif /* _XTENSA_PCI_BRIDGE_H */
86