xref: /OK3568_Linux_fs/kernel/arch/xtensa/include/asm/elf.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * include/asm-xtensa/elf.h
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * ELF register definitions
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
7*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
8*4882a593Smuzhiyun  * for more details.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright (C) 2001 - 2005 Tensilica Inc.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef _XTENSA_ELF_H
14*4882a593Smuzhiyun #define _XTENSA_ELF_H
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/ptrace.h>
17*4882a593Smuzhiyun #include <asm/coprocessor.h>
18*4882a593Smuzhiyun #include <linux/elf-em.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Xtensa processor ELF architecture-magic number */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define EM_XTENSA_OLD	0xABC7
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* Xtensa relocations defined by the ABIs */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define R_XTENSA_NONE           0
27*4882a593Smuzhiyun #define R_XTENSA_32             1
28*4882a593Smuzhiyun #define R_XTENSA_RTLD           2
29*4882a593Smuzhiyun #define R_XTENSA_GLOB_DAT       3
30*4882a593Smuzhiyun #define R_XTENSA_JMP_SLOT       4
31*4882a593Smuzhiyun #define R_XTENSA_RELATIVE       5
32*4882a593Smuzhiyun #define R_XTENSA_PLT            6
33*4882a593Smuzhiyun #define R_XTENSA_OP0            8
34*4882a593Smuzhiyun #define R_XTENSA_OP1            9
35*4882a593Smuzhiyun #define R_XTENSA_OP2            10
36*4882a593Smuzhiyun #define R_XTENSA_ASM_EXPAND	11
37*4882a593Smuzhiyun #define R_XTENSA_ASM_SIMPLIFY	12
38*4882a593Smuzhiyun #define R_XTENSA_GNU_VTINHERIT	15
39*4882a593Smuzhiyun #define R_XTENSA_GNU_VTENTRY	16
40*4882a593Smuzhiyun #define R_XTENSA_DIFF8		17
41*4882a593Smuzhiyun #define R_XTENSA_DIFF16		18
42*4882a593Smuzhiyun #define R_XTENSA_DIFF32		19
43*4882a593Smuzhiyun #define R_XTENSA_SLOT0_OP	20
44*4882a593Smuzhiyun #define R_XTENSA_SLOT1_OP	21
45*4882a593Smuzhiyun #define R_XTENSA_SLOT2_OP	22
46*4882a593Smuzhiyun #define R_XTENSA_SLOT3_OP	23
47*4882a593Smuzhiyun #define R_XTENSA_SLOT4_OP	24
48*4882a593Smuzhiyun #define R_XTENSA_SLOT5_OP	25
49*4882a593Smuzhiyun #define R_XTENSA_SLOT6_OP	26
50*4882a593Smuzhiyun #define R_XTENSA_SLOT7_OP	27
51*4882a593Smuzhiyun #define R_XTENSA_SLOT8_OP	28
52*4882a593Smuzhiyun #define R_XTENSA_SLOT9_OP	29
53*4882a593Smuzhiyun #define R_XTENSA_SLOT10_OP	30
54*4882a593Smuzhiyun #define R_XTENSA_SLOT11_OP	31
55*4882a593Smuzhiyun #define R_XTENSA_SLOT12_OP	32
56*4882a593Smuzhiyun #define R_XTENSA_SLOT13_OP	33
57*4882a593Smuzhiyun #define R_XTENSA_SLOT14_OP	34
58*4882a593Smuzhiyun #define R_XTENSA_SLOT0_ALT	35
59*4882a593Smuzhiyun #define R_XTENSA_SLOT1_ALT	36
60*4882a593Smuzhiyun #define R_XTENSA_SLOT2_ALT	37
61*4882a593Smuzhiyun #define R_XTENSA_SLOT3_ALT	38
62*4882a593Smuzhiyun #define R_XTENSA_SLOT4_ALT	39
63*4882a593Smuzhiyun #define R_XTENSA_SLOT5_ALT	40
64*4882a593Smuzhiyun #define R_XTENSA_SLOT6_ALT	41
65*4882a593Smuzhiyun #define R_XTENSA_SLOT7_ALT	42
66*4882a593Smuzhiyun #define R_XTENSA_SLOT8_ALT	43
67*4882a593Smuzhiyun #define R_XTENSA_SLOT9_ALT	44
68*4882a593Smuzhiyun #define R_XTENSA_SLOT10_ALT	45
69*4882a593Smuzhiyun #define R_XTENSA_SLOT11_ALT	46
70*4882a593Smuzhiyun #define R_XTENSA_SLOT12_ALT	47
71*4882a593Smuzhiyun #define R_XTENSA_SLOT13_ALT	48
72*4882a593Smuzhiyun #define R_XTENSA_SLOT14_ALT	49
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* ELF register definitions. This is needed for core dump support.  */
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun typedef unsigned long elf_greg_t;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun typedef struct user_pt_regs xtensa_gregset_t;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #define ELF_NGREG	(sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun typedef elf_greg_t elf_gregset_t[ELF_NGREG];
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define ELF_NFPREG	18
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun typedef unsigned int elf_fpreg_t;
87*4882a593Smuzhiyun typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun /*
90*4882a593Smuzhiyun  * This is used to ensure we don't load something for the wrong architecture.
91*4882a593Smuzhiyun  */
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA )  || \
94*4882a593Smuzhiyun 			    ( (x)->e_machine == EM_XTENSA_OLD ) )
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun  * These are used to set parameters in the core dumps.
98*4882a593Smuzhiyun  */
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun #ifdef __XTENSA_EL__
101*4882a593Smuzhiyun # define ELF_DATA	ELFDATA2LSB
102*4882a593Smuzhiyun #elif defined(__XTENSA_EB__)
103*4882a593Smuzhiyun # define ELF_DATA	ELFDATA2MSB
104*4882a593Smuzhiyun #else
105*4882a593Smuzhiyun # error processor byte order undefined!
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define ELF_CLASS	ELFCLASS32
109*4882a593Smuzhiyun #define ELF_ARCH	EM_XTENSA
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #define ELF_EXEC_PAGESIZE	PAGE_SIZE
112*4882a593Smuzhiyun #define CORE_DUMP_USE_REGSET
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun /*
115*4882a593Smuzhiyun  * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
116*4882a593Smuzhiyun  * use of this is to invoke "./ld.so someprog" to test out a new version of
117*4882a593Smuzhiyun  * the loader.  We need to make sure that it is out of the way of the program
118*4882a593Smuzhiyun  * that it will "exec", and that there is sufficient room for the brk.
119*4882a593Smuzhiyun  */
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun /*
124*4882a593Smuzhiyun  * This yields a mask that user programs can use to figure out what
125*4882a593Smuzhiyun  * instruction set this CPU supports.  This could be done in user space,
126*4882a593Smuzhiyun  * but it's not easy, and we've already done it here.
127*4882a593Smuzhiyun  */
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #define ELF_HWCAP	(0)
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun  * This yields a string that ld.so will use to load implementation
133*4882a593Smuzhiyun  * specific libraries for optimization.  This is more specific in
134*4882a593Smuzhiyun  * intent than poking at uname or /proc/cpuinfo.
135*4882a593Smuzhiyun  * For the moment, we have only optimizations for the Intel generations,
136*4882a593Smuzhiyun  * but that could change...
137*4882a593Smuzhiyun  */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define ELF_PLATFORM  (NULL)
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun  * The Xtensa processor ABI says that when the program starts, a2
143*4882a593Smuzhiyun  * contains a pointer to a function which might be registered using
144*4882a593Smuzhiyun  * `atexit'.  This provides a mean for the dynamic linker to call
145*4882a593Smuzhiyun  * DT_FINI functions for shared libraries that have been loaded before
146*4882a593Smuzhiyun  * the code runs.
147*4882a593Smuzhiyun  *
148*4882a593Smuzhiyun  * A value of 0 tells we have no such handler.
149*4882a593Smuzhiyun  *
150*4882a593Smuzhiyun  * We might as well make sure everything else is cleared too (except
151*4882a593Smuzhiyun  * for the stack pointer in a1), just to make things more
152*4882a593Smuzhiyun  * deterministic.  Also, clearing a0 terminates debugger backtraces.
153*4882a593Smuzhiyun  */
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun #define ELF_PLAT_INIT(_r, load_addr) \
156*4882a593Smuzhiyun 	do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0;  _r->areg[3]=0;  \
157*4882a593Smuzhiyun 	     _r->areg[4]=0;  _r->areg[5]=0;    _r->areg[6]=0;  _r->areg[7]=0;  \
158*4882a593Smuzhiyun 	     _r->areg[8]=0;  _r->areg[9]=0;    _r->areg[10]=0; _r->areg[11]=0; \
159*4882a593Smuzhiyun 	     _r->areg[12]=0; _r->areg[13]=0;   _r->areg[14]=0; _r->areg[15]=0; \
160*4882a593Smuzhiyun 	} while (0)
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun typedef struct {
163*4882a593Smuzhiyun 	xtregs_opt_t	opt;
164*4882a593Smuzhiyun 	xtregs_user_t	user;
165*4882a593Smuzhiyun #if XTENSA_HAVE_COPROCESSORS
166*4882a593Smuzhiyun 	xtregs_cp0_t	cp0;
167*4882a593Smuzhiyun 	xtregs_cp1_t	cp1;
168*4882a593Smuzhiyun 	xtregs_cp2_t	cp2;
169*4882a593Smuzhiyun 	xtregs_cp3_t	cp3;
170*4882a593Smuzhiyun 	xtregs_cp4_t	cp4;
171*4882a593Smuzhiyun 	xtregs_cp5_t	cp5;
172*4882a593Smuzhiyun 	xtregs_cp6_t	cp6;
173*4882a593Smuzhiyun 	xtregs_cp7_t	cp7;
174*4882a593Smuzhiyun #endif
175*4882a593Smuzhiyun } elf_xtregs_t;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun #define SET_PERSONALITY(ex) \
178*4882a593Smuzhiyun 	set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK)))
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun #endif	/* _XTENSA_ELF_H */
181