1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * include/asm-xtensa/dma.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 5*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 6*4882a593Smuzhiyun * for more details. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2003 - 2005 Tensilica Inc. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef _XTENSA_DMA_H 12*4882a593Smuzhiyun #define _XTENSA_DMA_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/io.h> /* need byte IO */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * This is only to be defined if we have PC-like DMA. 18*4882a593Smuzhiyun * By default this is not true on an Xtensa processor, 19*4882a593Smuzhiyun * however on boards with a PCI bus, such functionality 20*4882a593Smuzhiyun * might be emulated externally. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * NOTE: there still exists driver code that assumes 23*4882a593Smuzhiyun * this is defined, eg. drivers/sound/soundcard.c (as of 2.4). 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun #define MAX_DMA_CHANNELS 8 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * The maximum virtual address to which DMA transfers 29*4882a593Smuzhiyun * can be performed on this platform. 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * NOTE: This is board (platform) specific, not processor-specific! 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * NOTE: This assumes DMA transfers can only be performed on 34*4882a593Smuzhiyun * the section of physical memory contiguously mapped in virtual 35*4882a593Smuzhiyun * space for the kernel. For the Xtensa architecture, this 36*4882a593Smuzhiyun * means the maximum possible size of this DMA area is 37*4882a593Smuzhiyun * the size of the statically mapped kernel segment 38*4882a593Smuzhiyun * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. 39*4882a593Smuzhiyun * 40*4882a593Smuzhiyun * NOTE: When the entire KSEG area is DMA capable, we subtract 41*4882a593Smuzhiyun * one from the max address so that the virt_to_phys() macro 42*4882a593Smuzhiyun * works correctly on the address (otherwise the address 43*4882a593Smuzhiyun * enters another area, and virt_to_phys() may not return 44*4882a593Smuzhiyun * the value desired). 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #ifndef MAX_DMA_ADDRESS 48*4882a593Smuzhiyun #define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KIO_SIZE - 1) 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Reserve and release a DMA channel */ 52*4882a593Smuzhiyun extern int request_dma(unsigned int dmanr, const char * device_id); 53*4882a593Smuzhiyun extern void free_dma(unsigned int dmanr); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #ifdef CONFIG_PCI 56*4882a593Smuzhiyun extern int isa_dma_bridge_buggy; 57*4882a593Smuzhiyun #else 58*4882a593Smuzhiyun #define isa_dma_bridge_buggy (0) 59*4882a593Smuzhiyun #endif 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #endif 63