1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2001 - 2012 Tensilica Inc. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _XTENSA_SYSTEM_H 10*4882a593Smuzhiyun #define _XTENSA_SYSTEM_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/core.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define mb() ({ __asm__ __volatile__("memw" : : : "memory"); }) 15*4882a593Smuzhiyun #define rmb() barrier() 16*4882a593Smuzhiyun #define wmb() mb() 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #if XCHAL_HAVE_S32C1I 19*4882a593Smuzhiyun #define __smp_mb__before_atomic() barrier() 20*4882a593Smuzhiyun #define __smp_mb__after_atomic() barrier() 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #include <asm-generic/barrier.h> 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif /* _XTENSA_SYSTEM_H */ 26