1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include <linux/init.h>
3*4882a593Smuzhiyun #include <linux/thread_info.h>
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <asm/x86_init.h>
6*4882a593Smuzhiyun #include <asm/apic.h>
7*4882a593Smuzhiyun #include <asm/io_apic.h>
8*4882a593Smuzhiyun #include <asm/xen/hypercall.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <xen/xen.h>
11*4882a593Smuzhiyun #include <xen/interface/physdev.h>
12*4882a593Smuzhiyun #include "xen-ops.h"
13*4882a593Smuzhiyun #include "pmu.h"
14*4882a593Smuzhiyun #include "smp.h"
15*4882a593Smuzhiyun
xen_io_apic_read(unsigned apic,unsigned reg)16*4882a593Smuzhiyun static unsigned int xen_io_apic_read(unsigned apic, unsigned reg)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun struct physdev_apic apic_op;
19*4882a593Smuzhiyun int ret;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun apic_op.apic_physbase = mpc_ioapic_addr(apic);
22*4882a593Smuzhiyun apic_op.reg = reg;
23*4882a593Smuzhiyun ret = HYPERVISOR_physdev_op(PHYSDEVOP_apic_read, &apic_op);
24*4882a593Smuzhiyun if (!ret)
25*4882a593Smuzhiyun return apic_op.value;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* fallback to return an emulated IO_APIC values */
28*4882a593Smuzhiyun if (reg == 0x1)
29*4882a593Smuzhiyun return 0x00170020;
30*4882a593Smuzhiyun else if (reg == 0x0)
31*4882a593Smuzhiyun return apic << 24;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return 0xfd;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
xen_set_apic_id(unsigned int x)36*4882a593Smuzhiyun static u32 xen_set_apic_id(unsigned int x)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun WARN_ON(1);
39*4882a593Smuzhiyun return x;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
xen_get_apic_id(unsigned long x)42*4882a593Smuzhiyun static unsigned int xen_get_apic_id(unsigned long x)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun return ((x)>>24) & 0xFFu;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
xen_apic_read(u32 reg)47*4882a593Smuzhiyun static u32 xen_apic_read(u32 reg)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct xen_platform_op op = {
50*4882a593Smuzhiyun .cmd = XENPF_get_cpuinfo,
51*4882a593Smuzhiyun .interface_version = XENPF_INTERFACE_VERSION,
52*4882a593Smuzhiyun .u.pcpu_info.xen_cpuid = 0,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun int ret = 0;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* Shouldn't need this as APIC is turned off for PV, and we only
57*4882a593Smuzhiyun * get called on the bootup processor. But just in case. */
58*4882a593Smuzhiyun if (!xen_initial_domain() || smp_processor_id())
59*4882a593Smuzhiyun return 0;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if (reg == APIC_LVR)
62*4882a593Smuzhiyun return 0x14;
63*4882a593Smuzhiyun if (reg != APIC_ID)
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun ret = HYPERVISOR_platform_op(&op);
67*4882a593Smuzhiyun if (ret)
68*4882a593Smuzhiyun op.u.pcpu_info.apic_id = BAD_APICID;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return op.u.pcpu_info.apic_id << 24;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
xen_apic_write(u32 reg,u32 val)73*4882a593Smuzhiyun static void xen_apic_write(u32 reg, u32 val)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun if (reg == APIC_LVTPC) {
76*4882a593Smuzhiyun (void)pmu_apic_update(reg);
77*4882a593Smuzhiyun return;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Warn to see if there's any stray references */
81*4882a593Smuzhiyun WARN(1,"register: %x, value: %x\n", reg, val);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
xen_apic_icr_read(void)84*4882a593Smuzhiyun static u64 xen_apic_icr_read(void)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
xen_apic_icr_write(u32 low,u32 id)89*4882a593Smuzhiyun static void xen_apic_icr_write(u32 low, u32 id)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun /* Warn to see if there's any stray references */
92*4882a593Smuzhiyun WARN_ON(1);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
xen_safe_apic_wait_icr_idle(void)95*4882a593Smuzhiyun static u32 xen_safe_apic_wait_icr_idle(void)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
xen_apic_probe_pv(void)100*4882a593Smuzhiyun static int xen_apic_probe_pv(void)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun if (xen_pv_domain())
103*4882a593Smuzhiyun return 1;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
xen_madt_oem_check(char * oem_id,char * oem_table_id)108*4882a593Smuzhiyun static int xen_madt_oem_check(char *oem_id, char *oem_table_id)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun return xen_pv_domain();
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
xen_id_always_valid(u32 apicid)113*4882a593Smuzhiyun static int xen_id_always_valid(u32 apicid)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun return 1;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
xen_id_always_registered(void)118*4882a593Smuzhiyun static int xen_id_always_registered(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun return 1;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
xen_phys_pkg_id(int initial_apic_id,int index_msb)123*4882a593Smuzhiyun static int xen_phys_pkg_id(int initial_apic_id, int index_msb)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun return initial_apic_id >> index_msb;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
xen_noop(void)128*4882a593Smuzhiyun static void xen_noop(void)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
xen_silent_inquire(int apicid)132*4882a593Smuzhiyun static void xen_silent_inquire(int apicid)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
xen_cpu_present_to_apicid(int cpu)136*4882a593Smuzhiyun static int xen_cpu_present_to_apicid(int cpu)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun if (cpu_present(cpu))
139*4882a593Smuzhiyun return cpu_data(cpu).apicid;
140*4882a593Smuzhiyun else
141*4882a593Smuzhiyun return BAD_APICID;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static struct apic xen_pv_apic = {
145*4882a593Smuzhiyun .name = "Xen PV",
146*4882a593Smuzhiyun .probe = xen_apic_probe_pv,
147*4882a593Smuzhiyun .acpi_madt_oem_check = xen_madt_oem_check,
148*4882a593Smuzhiyun .apic_id_valid = xen_id_always_valid,
149*4882a593Smuzhiyun .apic_id_registered = xen_id_always_registered,
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /* .irq_delivery_mode - used in native_compose_msi_msg only */
152*4882a593Smuzhiyun /* .irq_dest_mode - used in native_compose_msi_msg only */
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun .disable_esr = 0,
155*4882a593Smuzhiyun /* .dest_logical - default_send_IPI_ use it but we use our own. */
156*4882a593Smuzhiyun .check_apicid_used = default_check_apicid_used, /* Used on 32-bit */
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun .init_apic_ldr = xen_noop, /* setup_local_APIC calls it */
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */
161*4882a593Smuzhiyun .setup_apic_routing = NULL,
162*4882a593Smuzhiyun .cpu_present_to_apicid = xen_cpu_present_to_apicid,
163*4882a593Smuzhiyun .apicid_to_cpu_present = physid_set_mask_of_physid, /* Used on 32-bit */
164*4882a593Smuzhiyun .check_phys_apicid_present = default_check_phys_apicid_present, /* smp_sanity_check needs it */
165*4882a593Smuzhiyun .phys_pkg_id = xen_phys_pkg_id, /* detect_ht */
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun .get_apic_id = xen_get_apic_id,
168*4882a593Smuzhiyun .set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun .calc_dest_apicid = apic_flat_calc_apicid,
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #ifdef CONFIG_SMP
173*4882a593Smuzhiyun .send_IPI_mask = xen_send_IPI_mask,
174*4882a593Smuzhiyun .send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself,
175*4882a593Smuzhiyun .send_IPI_allbutself = xen_send_IPI_allbutself,
176*4882a593Smuzhiyun .send_IPI_all = xen_send_IPI_all,
177*4882a593Smuzhiyun .send_IPI_self = xen_send_IPI_self,
178*4882a593Smuzhiyun #endif
179*4882a593Smuzhiyun /* .wait_for_init_deassert- used by AP bootup - smp_callin which we don't use */
180*4882a593Smuzhiyun .inquire_remote_apic = xen_silent_inquire,
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun .read = xen_apic_read,
183*4882a593Smuzhiyun .write = xen_apic_write,
184*4882a593Smuzhiyun .eoi_write = xen_apic_write,
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun .icr_read = xen_apic_icr_read,
187*4882a593Smuzhiyun .icr_write = xen_apic_icr_write,
188*4882a593Smuzhiyun .wait_icr_idle = xen_noop,
189*4882a593Smuzhiyun .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun
xen_apic_check(void)192*4882a593Smuzhiyun static void __init xen_apic_check(void)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun if (apic == &xen_pv_apic)
195*4882a593Smuzhiyun return;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun pr_info("Switched APIC routing from %s to %s.\n", apic->name,
198*4882a593Smuzhiyun xen_pv_apic.name);
199*4882a593Smuzhiyun apic = &xen_pv_apic;
200*4882a593Smuzhiyun }
xen_init_apic(void)201*4882a593Smuzhiyun void __init xen_init_apic(void)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun x86_apic_ops.io_apic_read = xen_io_apic_read;
204*4882a593Smuzhiyun /* On PV guests the APIC CPUID bit is disabled so none of the
205*4882a593Smuzhiyun * routines end up executing. */
206*4882a593Smuzhiyun if (!xen_initial_domain())
207*4882a593Smuzhiyun apic = &xen_pv_apic;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun x86_platform.apic_post_init = xen_apic_check;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun apic_driver(xen_pv_apic);
212