1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * National Semiconductor SCx200 support.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/errno.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/mutex.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/scx200.h>
16*4882a593Smuzhiyun #include <linux/scx200_gpio.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* Verify that the configuration block really is there */
19*4882a593Smuzhiyun #define scx200_cb_probe(base) (inw((base) + SCx200_CBA) == (base))
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
22*4882a593Smuzhiyun MODULE_DESCRIPTION("NatSemi SCx200 Driver");
23*4882a593Smuzhiyun MODULE_LICENSE("GPL");
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun unsigned scx200_gpio_base = 0;
26*4882a593Smuzhiyun unsigned long scx200_gpio_shadow[2];
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun unsigned scx200_cb_base = 0;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static struct pci_device_id scx200_tbl[] = {
31*4882a593Smuzhiyun { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
32*4882a593Smuzhiyun { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
33*4882a593Smuzhiyun { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_XBUS) },
34*4882a593Smuzhiyun { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SC1100_XBUS) },
35*4882a593Smuzhiyun { },
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci,scx200_tbl);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static int scx200_probe(struct pci_dev *, const struct pci_device_id *);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct pci_driver scx200_pci_driver = {
42*4882a593Smuzhiyun .name = "scx200",
43*4882a593Smuzhiyun .id_table = scx200_tbl,
44*4882a593Smuzhiyun .probe = scx200_probe,
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static DEFINE_MUTEX(scx200_gpio_config_lock);
48*4882a593Smuzhiyun
scx200_init_shadow(void)49*4882a593Smuzhiyun static void scx200_init_shadow(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun int bank;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* read the current values driven on the GPIO signals */
54*4882a593Smuzhiyun for (bank = 0; bank < 2; ++bank)
55*4882a593Smuzhiyun scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
scx200_probe(struct pci_dev * pdev,const struct pci_device_id * ent)58*4882a593Smuzhiyun static int scx200_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun unsigned base;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun if (pdev->device == PCI_DEVICE_ID_NS_SCx200_BRIDGE ||
63*4882a593Smuzhiyun pdev->device == PCI_DEVICE_ID_NS_SC1100_BRIDGE) {
64*4882a593Smuzhiyun base = pci_resource_start(pdev, 0);
65*4882a593Smuzhiyun pr_info("GPIO base 0x%x\n", base);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun if (!request_region(base, SCx200_GPIO_SIZE,
68*4882a593Smuzhiyun "NatSemi SCx200 GPIO")) {
69*4882a593Smuzhiyun pr_err("can't allocate I/O for GPIOs\n");
70*4882a593Smuzhiyun return -EBUSY;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun scx200_gpio_base = base;
74*4882a593Smuzhiyun scx200_init_shadow();
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun } else {
77*4882a593Smuzhiyun /* find the base of the Configuration Block */
78*4882a593Smuzhiyun if (scx200_cb_probe(SCx200_CB_BASE_FIXED)) {
79*4882a593Smuzhiyun scx200_cb_base = SCx200_CB_BASE_FIXED;
80*4882a593Smuzhiyun } else {
81*4882a593Smuzhiyun pci_read_config_dword(pdev, SCx200_CBA_SCRATCH, &base);
82*4882a593Smuzhiyun if (scx200_cb_probe(base)) {
83*4882a593Smuzhiyun scx200_cb_base = base;
84*4882a593Smuzhiyun } else {
85*4882a593Smuzhiyun pr_warn("Configuration Block not found\n");
86*4882a593Smuzhiyun return -ENODEV;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun pr_info("Configuration Block base 0x%x\n", scx200_cb_base);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
scx200_gpio_configure(unsigned index,u32 mask,u32 bits)95*4882a593Smuzhiyun u32 scx200_gpio_configure(unsigned index, u32 mask, u32 bits)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun u32 config, new_config;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun mutex_lock(&scx200_gpio_config_lock);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun outl(index, scx200_gpio_base + 0x20);
102*4882a593Smuzhiyun config = inl(scx200_gpio_base + 0x24);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun new_config = (config & mask) | bits;
105*4882a593Smuzhiyun outl(new_config, scx200_gpio_base + 0x24);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun mutex_unlock(&scx200_gpio_config_lock);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun return config;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
scx200_init(void)112*4882a593Smuzhiyun static int __init scx200_init(void)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun pr_info("NatSemi SCx200 Driver\n");
115*4882a593Smuzhiyun return pci_register_driver(&scx200_pci_driver);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
scx200_cleanup(void)118*4882a593Smuzhiyun static void __exit scx200_cleanup(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun pci_unregister_driver(&scx200_pci_driver);
121*4882a593Smuzhiyun release_region(scx200_gpio_base, SCx200_GPIO_SIZE);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun module_init(scx200_init);
125*4882a593Smuzhiyun module_exit(scx200_cleanup);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun EXPORT_SYMBOL(scx200_gpio_base);
128*4882a593Smuzhiyun EXPORT_SYMBOL(scx200_gpio_shadow);
129*4882a593Smuzhiyun EXPORT_SYMBOL(scx200_gpio_configure);
130*4882a593Smuzhiyun EXPORT_SYMBOL(scx200_cb_base);
131