1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include <linux/kernel.h>
3*4882a593Smuzhiyun #include <linux/pci.h>
4*4882a593Smuzhiyun #include <asm/pci-direct.h>
5*4882a593Smuzhiyun #include <asm/io.h>
6*4882a593Smuzhiyun #include <asm/pci_x86.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /* Direct PCI access. This is used for PCI accesses in early boot before
9*4882a593Smuzhiyun the PCI subsystem works. */
10*4882a593Smuzhiyun
read_pci_config(u8 bus,u8 slot,u8 func,u8 offset)11*4882a593Smuzhiyun u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset)
12*4882a593Smuzhiyun {
13*4882a593Smuzhiyun u32 v;
14*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
15*4882a593Smuzhiyun v = inl(0xcfc);
16*4882a593Smuzhiyun return v;
17*4882a593Smuzhiyun }
18*4882a593Smuzhiyun
read_pci_config_byte(u8 bus,u8 slot,u8 func,u8 offset)19*4882a593Smuzhiyun u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun u8 v;
22*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
23*4882a593Smuzhiyun v = inb(0xcfc + (offset&3));
24*4882a593Smuzhiyun return v;
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
read_pci_config_16(u8 bus,u8 slot,u8 func,u8 offset)27*4882a593Smuzhiyun u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun u16 v;
30*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
31*4882a593Smuzhiyun v = inw(0xcfc + (offset&2));
32*4882a593Smuzhiyun return v;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
write_pci_config(u8 bus,u8 slot,u8 func,u8 offset,u32 val)35*4882a593Smuzhiyun void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset,
36*4882a593Smuzhiyun u32 val)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
39*4882a593Smuzhiyun outl(val, 0xcfc);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
write_pci_config_byte(u8 bus,u8 slot,u8 func,u8 offset,u8 val)42*4882a593Smuzhiyun void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
45*4882a593Smuzhiyun outb(val, 0xcfc + (offset&3));
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
write_pci_config_16(u8 bus,u8 slot,u8 func,u8 offset,u16 val)48*4882a593Smuzhiyun void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
51*4882a593Smuzhiyun outw(val, 0xcfc + (offset&2));
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
early_pci_allowed(void)54*4882a593Smuzhiyun int early_pci_allowed(void)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) ==
57*4882a593Smuzhiyun PCI_PROBE_CONF1;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
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