1*4882a593Smuzhiyun /** 2*4882a593Smuzhiyun * @file op_x86_model.h 3*4882a593Smuzhiyun * interface to x86 model-specific MSR operations 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * @remark Copyright 2002 OProfile authors 6*4882a593Smuzhiyun * @remark Read the file COPYING 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * @author Graydon Hoare 9*4882a593Smuzhiyun * @author Robert Richter <robert.richter@amd.com> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef OP_X86_MODEL_H 13*4882a593Smuzhiyun #define OP_X86_MODEL_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <asm/types.h> 16*4882a593Smuzhiyun #include <asm/perf_event.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct op_msr { 19*4882a593Smuzhiyun unsigned long addr; 20*4882a593Smuzhiyun u64 saved; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun struct op_msrs { 24*4882a593Smuzhiyun struct op_msr *counters; 25*4882a593Smuzhiyun struct op_msr *controls; 26*4882a593Smuzhiyun struct op_msr *multiplex; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun struct pt_regs; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun struct oprofile_operations; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* The model vtable abstracts the differences between 34*4882a593Smuzhiyun * various x86 CPU models' perfctr support. 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun struct op_x86_model_spec { 37*4882a593Smuzhiyun unsigned int num_counters; 38*4882a593Smuzhiyun unsigned int num_controls; 39*4882a593Smuzhiyun unsigned int num_virt_counters; 40*4882a593Smuzhiyun u64 reserved; 41*4882a593Smuzhiyun u16 event_mask; 42*4882a593Smuzhiyun int (*init)(struct oprofile_operations *ops); 43*4882a593Smuzhiyun int (*fill_in_addresses)(struct op_msrs * const msrs); 44*4882a593Smuzhiyun void (*setup_ctrs)(struct op_x86_model_spec const *model, 45*4882a593Smuzhiyun struct op_msrs const * const msrs); 46*4882a593Smuzhiyun int (*check_ctrs)(struct pt_regs * const regs, 47*4882a593Smuzhiyun struct op_msrs const * const msrs); 48*4882a593Smuzhiyun void (*start)(struct op_msrs const * const msrs); 49*4882a593Smuzhiyun void (*stop)(struct op_msrs const * const msrs); 50*4882a593Smuzhiyun void (*shutdown)(struct op_msrs const * const msrs); 51*4882a593Smuzhiyun #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX 52*4882a593Smuzhiyun void (*switch_ctrl)(struct op_x86_model_spec const *model, 53*4882a593Smuzhiyun struct op_msrs const * const msrs); 54*4882a593Smuzhiyun #endif 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun struct op_counter_config; 58*4882a593Smuzhiyun op_x86_warn_in_use(int counter)59*4882a593Smuzhiyunstatic inline void op_x86_warn_in_use(int counter) 60*4882a593Smuzhiyun { 61*4882a593Smuzhiyun /* 62*4882a593Smuzhiyun * The warning indicates an already running counter. If 63*4882a593Smuzhiyun * oprofile doesn't collect data, then try using a different 64*4882a593Smuzhiyun * performance counter on your platform to monitor the desired 65*4882a593Smuzhiyun * event. Delete counter #%d from the desired event by editing 66*4882a593Smuzhiyun * the /usr/share/oprofile/%s/<cpu>/events file. If the event 67*4882a593Smuzhiyun * cannot be monitored by any other counter, contact your 68*4882a593Smuzhiyun * hardware or BIOS vendor. 69*4882a593Smuzhiyun */ 70*4882a593Smuzhiyun pr_warn("oprofile: counter #%d on cpu #%d may already be used\n", 71*4882a593Smuzhiyun counter, smp_processor_id()); 72*4882a593Smuzhiyun } 73*4882a593Smuzhiyun op_x86_warn_reserved(int counter)74*4882a593Smuzhiyunstatic inline void op_x86_warn_reserved(int counter) 75*4882a593Smuzhiyun { 76*4882a593Smuzhiyun pr_warn("oprofile: counter #%d is already reserved\n", counter); 77*4882a593Smuzhiyun } 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun extern u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, 80*4882a593Smuzhiyun struct op_counter_config *counter_config); 81*4882a593Smuzhiyun extern int op_x86_phys_to_virt(int phys); 82*4882a593Smuzhiyun extern int op_x86_virt_to_phys(int virt); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun extern struct op_x86_model_spec op_ppro_spec; 85*4882a593Smuzhiyun extern struct op_x86_model_spec op_p4_spec; 86*4882a593Smuzhiyun extern struct op_x86_model_spec op_p4_ht2_spec; 87*4882a593Smuzhiyun extern struct op_x86_model_spec op_amd_spec; 88*4882a593Smuzhiyun extern struct op_x86_model_spec op_arch_perfmon_spec; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #endif /* OP_X86_MODEL_H */ 91