1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Re-map IO memory to kernel address space so that we can access it.
4*4882a593Smuzhiyun * This is needed for high PCI addresses that aren't mapped in the
5*4882a593Smuzhiyun * 640k-1MB IO memory area on PC's
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * (C) Copyright 1995 1996 Linus Torvalds
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/memblock.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/ioport.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/vmalloc.h>
16*4882a593Smuzhiyun #include <linux/mmiotrace.h>
17*4882a593Smuzhiyun #include <linux/mem_encrypt.h>
18*4882a593Smuzhiyun #include <linux/efi.h>
19*4882a593Smuzhiyun #include <linux/pgtable.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/set_memory.h>
22*4882a593Smuzhiyun #include <asm/e820/api.h>
23*4882a593Smuzhiyun #include <asm/efi.h>
24*4882a593Smuzhiyun #include <asm/fixmap.h>
25*4882a593Smuzhiyun #include <asm/tlbflush.h>
26*4882a593Smuzhiyun #include <asm/pgalloc.h>
27*4882a593Smuzhiyun #include <asm/memtype.h>
28*4882a593Smuzhiyun #include <asm/setup.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include "physaddr.h"
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun * Descriptor controlling ioremap() behavior.
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun struct ioremap_desc {
36*4882a593Smuzhiyun unsigned int flags;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * Fix up the linear direct mapping of the kernel to avoid cache attribute
41*4882a593Smuzhiyun * conflicts.
42*4882a593Smuzhiyun */
ioremap_change_attr(unsigned long vaddr,unsigned long size,enum page_cache_mode pcm)43*4882a593Smuzhiyun int ioremap_change_attr(unsigned long vaddr, unsigned long size,
44*4882a593Smuzhiyun enum page_cache_mode pcm)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun unsigned long nrpages = size >> PAGE_SHIFT;
47*4882a593Smuzhiyun int err;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun switch (pcm) {
50*4882a593Smuzhiyun case _PAGE_CACHE_MODE_UC:
51*4882a593Smuzhiyun default:
52*4882a593Smuzhiyun err = _set_memory_uc(vaddr, nrpages);
53*4882a593Smuzhiyun break;
54*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WC:
55*4882a593Smuzhiyun err = _set_memory_wc(vaddr, nrpages);
56*4882a593Smuzhiyun break;
57*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WT:
58*4882a593Smuzhiyun err = _set_memory_wt(vaddr, nrpages);
59*4882a593Smuzhiyun break;
60*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WB:
61*4882a593Smuzhiyun err = _set_memory_wb(vaddr, nrpages);
62*4882a593Smuzhiyun break;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return err;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Does the range (or a subset of) contain normal RAM? */
__ioremap_check_ram(struct resource * res)69*4882a593Smuzhiyun static unsigned int __ioremap_check_ram(struct resource *res)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun unsigned long start_pfn, stop_pfn;
72*4882a593Smuzhiyun unsigned long i;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if ((res->flags & IORESOURCE_SYSTEM_RAM) != IORESOURCE_SYSTEM_RAM)
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun start_pfn = (res->start + PAGE_SIZE - 1) >> PAGE_SHIFT;
78*4882a593Smuzhiyun stop_pfn = (res->end + 1) >> PAGE_SHIFT;
79*4882a593Smuzhiyun if (stop_pfn > start_pfn) {
80*4882a593Smuzhiyun for (i = 0; i < (stop_pfn - start_pfn); ++i)
81*4882a593Smuzhiyun if (pfn_valid(start_pfn + i) &&
82*4882a593Smuzhiyun !PageReserved(pfn_to_page(start_pfn + i)))
83*4882a593Smuzhiyun return IORES_MAP_SYSTEM_RAM;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /*
90*4882a593Smuzhiyun * In a SEV guest, NONE and RESERVED should not be mapped encrypted because
91*4882a593Smuzhiyun * there the whole memory is already encrypted.
92*4882a593Smuzhiyun */
__ioremap_check_encrypted(struct resource * res)93*4882a593Smuzhiyun static unsigned int __ioremap_check_encrypted(struct resource *res)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun if (!sev_active())
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun switch (res->desc) {
99*4882a593Smuzhiyun case IORES_DESC_NONE:
100*4882a593Smuzhiyun case IORES_DESC_RESERVED:
101*4882a593Smuzhiyun break;
102*4882a593Smuzhiyun default:
103*4882a593Smuzhiyun return IORES_MAP_ENCRYPTED;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /*
110*4882a593Smuzhiyun * The EFI runtime services data area is not covered by walk_mem_res(), but must
111*4882a593Smuzhiyun * be mapped encrypted when SEV is active.
112*4882a593Smuzhiyun */
__ioremap_check_other(resource_size_t addr,struct ioremap_desc * desc)113*4882a593Smuzhiyun static void __ioremap_check_other(resource_size_t addr, struct ioremap_desc *desc)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun if (!sev_active())
116*4882a593Smuzhiyun return;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (!IS_ENABLED(CONFIG_EFI))
119*4882a593Smuzhiyun return;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (efi_mem_type(addr) == EFI_RUNTIME_SERVICES_DATA ||
122*4882a593Smuzhiyun (efi_mem_type(addr) == EFI_BOOT_SERVICES_DATA &&
123*4882a593Smuzhiyun efi_mem_attributes(addr) & EFI_MEMORY_RUNTIME))
124*4882a593Smuzhiyun desc->flags |= IORES_MAP_ENCRYPTED;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
__ioremap_collect_map_flags(struct resource * res,void * arg)127*4882a593Smuzhiyun static int __ioremap_collect_map_flags(struct resource *res, void *arg)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct ioremap_desc *desc = arg;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (!(desc->flags & IORES_MAP_SYSTEM_RAM))
132*4882a593Smuzhiyun desc->flags |= __ioremap_check_ram(res);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (!(desc->flags & IORES_MAP_ENCRYPTED))
135*4882a593Smuzhiyun desc->flags |= __ioremap_check_encrypted(res);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun return ((desc->flags & (IORES_MAP_SYSTEM_RAM | IORES_MAP_ENCRYPTED)) ==
138*4882a593Smuzhiyun (IORES_MAP_SYSTEM_RAM | IORES_MAP_ENCRYPTED));
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * To avoid multiple resource walks, this function walks resources marked as
143*4882a593Smuzhiyun * IORESOURCE_MEM and IORESOURCE_BUSY and looking for system RAM and/or a
144*4882a593Smuzhiyun * resource described not as IORES_DESC_NONE (e.g. IORES_DESC_ACPI_TABLES).
145*4882a593Smuzhiyun *
146*4882a593Smuzhiyun * After that, deal with misc other ranges in __ioremap_check_other() which do
147*4882a593Smuzhiyun * not fall into the above category.
148*4882a593Smuzhiyun */
__ioremap_check_mem(resource_size_t addr,unsigned long size,struct ioremap_desc * desc)149*4882a593Smuzhiyun static void __ioremap_check_mem(resource_size_t addr, unsigned long size,
150*4882a593Smuzhiyun struct ioremap_desc *desc)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun u64 start, end;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun start = (u64)addr;
155*4882a593Smuzhiyun end = start + size - 1;
156*4882a593Smuzhiyun memset(desc, 0, sizeof(struct ioremap_desc));
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun walk_mem_res(start, end, desc, __ioremap_collect_map_flags);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun __ioremap_check_other(addr, desc);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /*
164*4882a593Smuzhiyun * Remap an arbitrary physical address space into the kernel virtual
165*4882a593Smuzhiyun * address space. It transparently creates kernel huge I/O mapping when
166*4882a593Smuzhiyun * the physical address is aligned by a huge page size (1GB or 2MB) and
167*4882a593Smuzhiyun * the requested size is at least the huge page size.
168*4882a593Smuzhiyun *
169*4882a593Smuzhiyun * NOTE: MTRRs can override PAT memory types with a 4KB granularity.
170*4882a593Smuzhiyun * Therefore, the mapping code falls back to use a smaller page toward 4KB
171*4882a593Smuzhiyun * when a mapping range is covered by non-WB type of MTRRs.
172*4882a593Smuzhiyun *
173*4882a593Smuzhiyun * NOTE! We need to allow non-page-aligned mappings too: we will obviously
174*4882a593Smuzhiyun * have to convert them into an offset in a page-aligned mapping, but the
175*4882a593Smuzhiyun * caller shouldn't need to know that small detail.
176*4882a593Smuzhiyun */
177*4882a593Smuzhiyun static void __iomem *
__ioremap_caller(resource_size_t phys_addr,unsigned long size,enum page_cache_mode pcm,void * caller,bool encrypted)178*4882a593Smuzhiyun __ioremap_caller(resource_size_t phys_addr, unsigned long size,
179*4882a593Smuzhiyun enum page_cache_mode pcm, void *caller, bool encrypted)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun unsigned long offset, vaddr;
182*4882a593Smuzhiyun resource_size_t last_addr;
183*4882a593Smuzhiyun const resource_size_t unaligned_phys_addr = phys_addr;
184*4882a593Smuzhiyun const unsigned long unaligned_size = size;
185*4882a593Smuzhiyun struct ioremap_desc io_desc;
186*4882a593Smuzhiyun struct vm_struct *area;
187*4882a593Smuzhiyun enum page_cache_mode new_pcm;
188*4882a593Smuzhiyun pgprot_t prot;
189*4882a593Smuzhiyun int retval;
190*4882a593Smuzhiyun void __iomem *ret_addr;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* Don't allow wraparound or zero size */
193*4882a593Smuzhiyun last_addr = phys_addr + size - 1;
194*4882a593Smuzhiyun if (!size || last_addr < phys_addr)
195*4882a593Smuzhiyun return NULL;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (!phys_addr_valid(phys_addr)) {
198*4882a593Smuzhiyun printk(KERN_WARNING "ioremap: invalid physical address %llx\n",
199*4882a593Smuzhiyun (unsigned long long)phys_addr);
200*4882a593Smuzhiyun WARN_ON_ONCE(1);
201*4882a593Smuzhiyun return NULL;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun __ioremap_check_mem(phys_addr, size, &io_desc);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun * Don't allow anybody to remap normal RAM that we're using..
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun if (io_desc.flags & IORES_MAP_SYSTEM_RAM) {
210*4882a593Smuzhiyun WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n",
211*4882a593Smuzhiyun &phys_addr, &last_addr);
212*4882a593Smuzhiyun return NULL;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /*
216*4882a593Smuzhiyun * Mappings have to be page-aligned
217*4882a593Smuzhiyun */
218*4882a593Smuzhiyun offset = phys_addr & ~PAGE_MASK;
219*4882a593Smuzhiyun phys_addr &= PAGE_MASK;
220*4882a593Smuzhiyun size = PAGE_ALIGN(last_addr+1) - phys_addr;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /*
223*4882a593Smuzhiyun * Mask out any bits not part of the actual physical
224*4882a593Smuzhiyun * address, like memory encryption bits.
225*4882a593Smuzhiyun */
226*4882a593Smuzhiyun phys_addr &= PHYSICAL_PAGE_MASK;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun retval = memtype_reserve(phys_addr, (u64)phys_addr + size,
229*4882a593Smuzhiyun pcm, &new_pcm);
230*4882a593Smuzhiyun if (retval) {
231*4882a593Smuzhiyun printk(KERN_ERR "ioremap memtype_reserve failed %d\n", retval);
232*4882a593Smuzhiyun return NULL;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (pcm != new_pcm) {
236*4882a593Smuzhiyun if (!is_new_memtype_allowed(phys_addr, size, pcm, new_pcm)) {
237*4882a593Smuzhiyun printk(KERN_ERR
238*4882a593Smuzhiyun "ioremap error for 0x%llx-0x%llx, requested 0x%x, got 0x%x\n",
239*4882a593Smuzhiyun (unsigned long long)phys_addr,
240*4882a593Smuzhiyun (unsigned long long)(phys_addr + size),
241*4882a593Smuzhiyun pcm, new_pcm);
242*4882a593Smuzhiyun goto err_free_memtype;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun pcm = new_pcm;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /*
248*4882a593Smuzhiyun * If the page being mapped is in memory and SEV is active then
249*4882a593Smuzhiyun * make sure the memory encryption attribute is enabled in the
250*4882a593Smuzhiyun * resulting mapping.
251*4882a593Smuzhiyun */
252*4882a593Smuzhiyun prot = PAGE_KERNEL_IO;
253*4882a593Smuzhiyun if ((io_desc.flags & IORES_MAP_ENCRYPTED) || encrypted)
254*4882a593Smuzhiyun prot = pgprot_encrypted(prot);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun switch (pcm) {
257*4882a593Smuzhiyun case _PAGE_CACHE_MODE_UC:
258*4882a593Smuzhiyun default:
259*4882a593Smuzhiyun prot = __pgprot(pgprot_val(prot) |
260*4882a593Smuzhiyun cachemode2protval(_PAGE_CACHE_MODE_UC));
261*4882a593Smuzhiyun break;
262*4882a593Smuzhiyun case _PAGE_CACHE_MODE_UC_MINUS:
263*4882a593Smuzhiyun prot = __pgprot(pgprot_val(prot) |
264*4882a593Smuzhiyun cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS));
265*4882a593Smuzhiyun break;
266*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WC:
267*4882a593Smuzhiyun prot = __pgprot(pgprot_val(prot) |
268*4882a593Smuzhiyun cachemode2protval(_PAGE_CACHE_MODE_WC));
269*4882a593Smuzhiyun break;
270*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WT:
271*4882a593Smuzhiyun prot = __pgprot(pgprot_val(prot) |
272*4882a593Smuzhiyun cachemode2protval(_PAGE_CACHE_MODE_WT));
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun case _PAGE_CACHE_MODE_WB:
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /*
279*4882a593Smuzhiyun * Ok, go for it..
280*4882a593Smuzhiyun */
281*4882a593Smuzhiyun area = get_vm_area_caller(size, VM_IOREMAP, caller);
282*4882a593Smuzhiyun if (!area)
283*4882a593Smuzhiyun goto err_free_memtype;
284*4882a593Smuzhiyun area->phys_addr = phys_addr;
285*4882a593Smuzhiyun vaddr = (unsigned long) area->addr;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (memtype_kernel_map_sync(phys_addr, size, pcm))
288*4882a593Smuzhiyun goto err_free_area;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot))
291*4882a593Smuzhiyun goto err_free_area;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun ret_addr = (void __iomem *) (vaddr + offset);
294*4882a593Smuzhiyun mmiotrace_ioremap(unaligned_phys_addr, unaligned_size, ret_addr);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun * Check if the request spans more than any BAR in the iomem resource
298*4882a593Smuzhiyun * tree.
299*4882a593Smuzhiyun */
300*4882a593Smuzhiyun if (iomem_map_sanity_check(unaligned_phys_addr, unaligned_size))
301*4882a593Smuzhiyun pr_warn("caller %pS mapping multiple BARs\n", caller);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun return ret_addr;
304*4882a593Smuzhiyun err_free_area:
305*4882a593Smuzhiyun free_vm_area(area);
306*4882a593Smuzhiyun err_free_memtype:
307*4882a593Smuzhiyun memtype_free(phys_addr, phys_addr + size);
308*4882a593Smuzhiyun return NULL;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /**
312*4882a593Smuzhiyun * ioremap - map bus memory into CPU space
313*4882a593Smuzhiyun * @phys_addr: bus address of the memory
314*4882a593Smuzhiyun * @size: size of the resource to map
315*4882a593Smuzhiyun *
316*4882a593Smuzhiyun * ioremap performs a platform specific sequence of operations to
317*4882a593Smuzhiyun * make bus memory CPU accessible via the readb/readw/readl/writeb/
318*4882a593Smuzhiyun * writew/writel functions and the other mmio helpers. The returned
319*4882a593Smuzhiyun * address is not guaranteed to be usable directly as a virtual
320*4882a593Smuzhiyun * address.
321*4882a593Smuzhiyun *
322*4882a593Smuzhiyun * This version of ioremap ensures that the memory is marked uncachable
323*4882a593Smuzhiyun * on the CPU as well as honouring existing caching rules from things like
324*4882a593Smuzhiyun * the PCI bus. Note that there are other caches and buffers on many
325*4882a593Smuzhiyun * busses. In particular driver authors should read up on PCI writes
326*4882a593Smuzhiyun *
327*4882a593Smuzhiyun * It's useful if some control registers are in such an area and
328*4882a593Smuzhiyun * write combining or read caching is not desirable:
329*4882a593Smuzhiyun *
330*4882a593Smuzhiyun * Must be freed with iounmap.
331*4882a593Smuzhiyun */
ioremap(resource_size_t phys_addr,unsigned long size)332*4882a593Smuzhiyun void __iomem *ioremap(resource_size_t phys_addr, unsigned long size)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun /*
335*4882a593Smuzhiyun * Ideally, this should be:
336*4882a593Smuzhiyun * pat_enabled() ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS;
337*4882a593Smuzhiyun *
338*4882a593Smuzhiyun * Till we fix all X drivers to use ioremap_wc(), we will use
339*4882a593Smuzhiyun * UC MINUS. Drivers that are certain they need or can already
340*4882a593Smuzhiyun * be converted over to strong UC can use ioremap_uc().
341*4882a593Smuzhiyun */
342*4882a593Smuzhiyun enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_MINUS;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, pcm,
345*4882a593Smuzhiyun __builtin_return_address(0), false);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /**
350*4882a593Smuzhiyun * ioremap_uc - map bus memory into CPU space as strongly uncachable
351*4882a593Smuzhiyun * @phys_addr: bus address of the memory
352*4882a593Smuzhiyun * @size: size of the resource to map
353*4882a593Smuzhiyun *
354*4882a593Smuzhiyun * ioremap_uc performs a platform specific sequence of operations to
355*4882a593Smuzhiyun * make bus memory CPU accessible via the readb/readw/readl/writeb/
356*4882a593Smuzhiyun * writew/writel functions and the other mmio helpers. The returned
357*4882a593Smuzhiyun * address is not guaranteed to be usable directly as a virtual
358*4882a593Smuzhiyun * address.
359*4882a593Smuzhiyun *
360*4882a593Smuzhiyun * This version of ioremap ensures that the memory is marked with a strong
361*4882a593Smuzhiyun * preference as completely uncachable on the CPU when possible. For non-PAT
362*4882a593Smuzhiyun * systems this ends up setting page-attribute flags PCD=1, PWT=1. For PAT
363*4882a593Smuzhiyun * systems this will set the PAT entry for the pages as strong UC. This call
364*4882a593Smuzhiyun * will honor existing caching rules from things like the PCI bus. Note that
365*4882a593Smuzhiyun * there are other caches and buffers on many busses. In particular driver
366*4882a593Smuzhiyun * authors should read up on PCI writes.
367*4882a593Smuzhiyun *
368*4882a593Smuzhiyun * It's useful if some control registers are in such an area and
369*4882a593Smuzhiyun * write combining or read caching is not desirable:
370*4882a593Smuzhiyun *
371*4882a593Smuzhiyun * Must be freed with iounmap.
372*4882a593Smuzhiyun */
ioremap_uc(resource_size_t phys_addr,unsigned long size)373*4882a593Smuzhiyun void __iomem *ioremap_uc(resource_size_t phys_addr, unsigned long size)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, pcm,
378*4882a593Smuzhiyun __builtin_return_address(0), false);
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ioremap_uc);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /**
383*4882a593Smuzhiyun * ioremap_wc - map memory into CPU space write combined
384*4882a593Smuzhiyun * @phys_addr: bus address of the memory
385*4882a593Smuzhiyun * @size: size of the resource to map
386*4882a593Smuzhiyun *
387*4882a593Smuzhiyun * This version of ioremap ensures that the memory is marked write combining.
388*4882a593Smuzhiyun * Write combining allows faster writes to some hardware devices.
389*4882a593Smuzhiyun *
390*4882a593Smuzhiyun * Must be freed with iounmap.
391*4882a593Smuzhiyun */
ioremap_wc(resource_size_t phys_addr,unsigned long size)392*4882a593Smuzhiyun void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
393*4882a593Smuzhiyun {
394*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WC,
395*4882a593Smuzhiyun __builtin_return_address(0), false);
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap_wc);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /**
400*4882a593Smuzhiyun * ioremap_wt - map memory into CPU space write through
401*4882a593Smuzhiyun * @phys_addr: bus address of the memory
402*4882a593Smuzhiyun * @size: size of the resource to map
403*4882a593Smuzhiyun *
404*4882a593Smuzhiyun * This version of ioremap ensures that the memory is marked write through.
405*4882a593Smuzhiyun * Write through stores data into memory while keeping the cache up-to-date.
406*4882a593Smuzhiyun *
407*4882a593Smuzhiyun * Must be freed with iounmap.
408*4882a593Smuzhiyun */
ioremap_wt(resource_size_t phys_addr,unsigned long size)409*4882a593Smuzhiyun void __iomem *ioremap_wt(resource_size_t phys_addr, unsigned long size)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WT,
412*4882a593Smuzhiyun __builtin_return_address(0), false);
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap_wt);
415*4882a593Smuzhiyun
ioremap_encrypted(resource_size_t phys_addr,unsigned long size)416*4882a593Smuzhiyun void __iomem *ioremap_encrypted(resource_size_t phys_addr, unsigned long size)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB,
419*4882a593Smuzhiyun __builtin_return_address(0), true);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap_encrypted);
422*4882a593Smuzhiyun
ioremap_cache(resource_size_t phys_addr,unsigned long size)423*4882a593Smuzhiyun void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB,
426*4882a593Smuzhiyun __builtin_return_address(0), false);
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap_cache);
429*4882a593Smuzhiyun
ioremap_prot(resource_size_t phys_addr,unsigned long size,unsigned long prot_val)430*4882a593Smuzhiyun void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
431*4882a593Smuzhiyun unsigned long prot_val)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun return __ioremap_caller(phys_addr, size,
434*4882a593Smuzhiyun pgprot2cachemode(__pgprot(prot_val)),
435*4882a593Smuzhiyun __builtin_return_address(0), false);
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun EXPORT_SYMBOL(ioremap_prot);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun /**
440*4882a593Smuzhiyun * iounmap - Free a IO remapping
441*4882a593Smuzhiyun * @addr: virtual address from ioremap_*
442*4882a593Smuzhiyun *
443*4882a593Smuzhiyun * Caller must ensure there is only one unmapping for the same pointer.
444*4882a593Smuzhiyun */
iounmap(volatile void __iomem * addr)445*4882a593Smuzhiyun void iounmap(volatile void __iomem *addr)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun struct vm_struct *p, *o;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun if ((void __force *)addr <= high_memory)
450*4882a593Smuzhiyun return;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /*
453*4882a593Smuzhiyun * The PCI/ISA range special-casing was removed from __ioremap()
454*4882a593Smuzhiyun * so this check, in theory, can be removed. However, there are
455*4882a593Smuzhiyun * cases where iounmap() is called for addresses not obtained via
456*4882a593Smuzhiyun * ioremap() (vga16fb for example). Add a warning so that these
457*4882a593Smuzhiyun * cases can be caught and fixed.
458*4882a593Smuzhiyun */
459*4882a593Smuzhiyun if ((void __force *)addr >= phys_to_virt(ISA_START_ADDRESS) &&
460*4882a593Smuzhiyun (void __force *)addr < phys_to_virt(ISA_END_ADDRESS)) {
461*4882a593Smuzhiyun WARN(1, "iounmap() called for ISA range not obtained using ioremap()\n");
462*4882a593Smuzhiyun return;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun mmiotrace_iounmap(addr);
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun addr = (volatile void __iomem *)
468*4882a593Smuzhiyun (PAGE_MASK & (unsigned long __force)addr);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun /* Use the vm area unlocked, assuming the caller
471*4882a593Smuzhiyun ensures there isn't another iounmap for the same address
472*4882a593Smuzhiyun in parallel. Reuse of the virtual address is prevented by
473*4882a593Smuzhiyun leaving it in the global lists until we're done with it.
474*4882a593Smuzhiyun cpa takes care of the direct mappings. */
475*4882a593Smuzhiyun p = find_vm_area((void __force *)addr);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun if (!p) {
478*4882a593Smuzhiyun printk(KERN_ERR "iounmap: bad address %p\n", addr);
479*4882a593Smuzhiyun dump_stack();
480*4882a593Smuzhiyun return;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun memtype_free(p->phys_addr, p->phys_addr + get_vm_area_size(p));
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun /* Finally remove it */
486*4882a593Smuzhiyun o = remove_vm_area((void __force *)addr);
487*4882a593Smuzhiyun BUG_ON(p != o || o == NULL);
488*4882a593Smuzhiyun kfree(p);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun EXPORT_SYMBOL(iounmap);
491*4882a593Smuzhiyun
arch_ioremap_p4d_supported(void)492*4882a593Smuzhiyun int __init arch_ioremap_p4d_supported(void)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
arch_ioremap_pud_supported(void)497*4882a593Smuzhiyun int __init arch_ioremap_pud_supported(void)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun #ifdef CONFIG_X86_64
500*4882a593Smuzhiyun return boot_cpu_has(X86_FEATURE_GBPAGES);
501*4882a593Smuzhiyun #else
502*4882a593Smuzhiyun return 0;
503*4882a593Smuzhiyun #endif
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
arch_ioremap_pmd_supported(void)506*4882a593Smuzhiyun int __init arch_ioremap_pmd_supported(void)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun return boot_cpu_has(X86_FEATURE_PSE);
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /*
512*4882a593Smuzhiyun * Convert a physical pointer to a virtual kernel pointer for /dev/mem
513*4882a593Smuzhiyun * access
514*4882a593Smuzhiyun */
xlate_dev_mem_ptr(phys_addr_t phys)515*4882a593Smuzhiyun void *xlate_dev_mem_ptr(phys_addr_t phys)
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun unsigned long start = phys & PAGE_MASK;
518*4882a593Smuzhiyun unsigned long offset = phys & ~PAGE_MASK;
519*4882a593Smuzhiyun void *vaddr;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun /* memremap() maps if RAM, otherwise falls back to ioremap() */
522*4882a593Smuzhiyun vaddr = memremap(start, PAGE_SIZE, MEMREMAP_WB);
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun /* Only add the offset on success and return NULL if memremap() failed */
525*4882a593Smuzhiyun if (vaddr)
526*4882a593Smuzhiyun vaddr += offset;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun return vaddr;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
unxlate_dev_mem_ptr(phys_addr_t phys,void * addr)531*4882a593Smuzhiyun void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun memunmap((void *)((unsigned long)addr & PAGE_MASK));
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /*
537*4882a593Smuzhiyun * Examine the physical address to determine if it is an area of memory
538*4882a593Smuzhiyun * that should be mapped decrypted. If the memory is not part of the
539*4882a593Smuzhiyun * kernel usable area it was accessed and created decrypted, so these
540*4882a593Smuzhiyun * areas should be mapped decrypted. And since the encryption key can
541*4882a593Smuzhiyun * change across reboots, persistent memory should also be mapped
542*4882a593Smuzhiyun * decrypted.
543*4882a593Smuzhiyun *
544*4882a593Smuzhiyun * If SEV is active, that implies that BIOS/UEFI also ran encrypted so
545*4882a593Smuzhiyun * only persistent memory should be mapped decrypted.
546*4882a593Smuzhiyun */
memremap_should_map_decrypted(resource_size_t phys_addr,unsigned long size)547*4882a593Smuzhiyun static bool memremap_should_map_decrypted(resource_size_t phys_addr,
548*4882a593Smuzhiyun unsigned long size)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun int is_pmem;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * Check if the address is part of a persistent memory region.
554*4882a593Smuzhiyun * This check covers areas added by E820, EFI and ACPI.
555*4882a593Smuzhiyun */
556*4882a593Smuzhiyun is_pmem = region_intersects(phys_addr, size, IORESOURCE_MEM,
557*4882a593Smuzhiyun IORES_DESC_PERSISTENT_MEMORY);
558*4882a593Smuzhiyun if (is_pmem != REGION_DISJOINT)
559*4882a593Smuzhiyun return true;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun /*
562*4882a593Smuzhiyun * Check if the non-volatile attribute is set for an EFI
563*4882a593Smuzhiyun * reserved area.
564*4882a593Smuzhiyun */
565*4882a593Smuzhiyun if (efi_enabled(EFI_BOOT)) {
566*4882a593Smuzhiyun switch (efi_mem_type(phys_addr)) {
567*4882a593Smuzhiyun case EFI_RESERVED_TYPE:
568*4882a593Smuzhiyun if (efi_mem_attributes(phys_addr) & EFI_MEMORY_NV)
569*4882a593Smuzhiyun return true;
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun default:
572*4882a593Smuzhiyun break;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun /* Check if the address is outside kernel usable area */
577*4882a593Smuzhiyun switch (e820__get_entry_type(phys_addr, phys_addr + size - 1)) {
578*4882a593Smuzhiyun case E820_TYPE_RESERVED:
579*4882a593Smuzhiyun case E820_TYPE_ACPI:
580*4882a593Smuzhiyun case E820_TYPE_NVS:
581*4882a593Smuzhiyun case E820_TYPE_UNUSABLE:
582*4882a593Smuzhiyun /* For SEV, these areas are encrypted */
583*4882a593Smuzhiyun if (sev_active())
584*4882a593Smuzhiyun break;
585*4882a593Smuzhiyun fallthrough;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun case E820_TYPE_PRAM:
588*4882a593Smuzhiyun return true;
589*4882a593Smuzhiyun default:
590*4882a593Smuzhiyun break;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun return false;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun /*
597*4882a593Smuzhiyun * Examine the physical address to determine if it is EFI data. Check
598*4882a593Smuzhiyun * it against the boot params structure and EFI tables and memory types.
599*4882a593Smuzhiyun */
memremap_is_efi_data(resource_size_t phys_addr,unsigned long size)600*4882a593Smuzhiyun static bool memremap_is_efi_data(resource_size_t phys_addr,
601*4882a593Smuzhiyun unsigned long size)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun u64 paddr;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun /* Check if the address is part of EFI boot/runtime data */
606*4882a593Smuzhiyun if (!efi_enabled(EFI_BOOT))
607*4882a593Smuzhiyun return false;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun paddr = boot_params.efi_info.efi_memmap_hi;
610*4882a593Smuzhiyun paddr <<= 32;
611*4882a593Smuzhiyun paddr |= boot_params.efi_info.efi_memmap;
612*4882a593Smuzhiyun if (phys_addr == paddr)
613*4882a593Smuzhiyun return true;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun paddr = boot_params.efi_info.efi_systab_hi;
616*4882a593Smuzhiyun paddr <<= 32;
617*4882a593Smuzhiyun paddr |= boot_params.efi_info.efi_systab;
618*4882a593Smuzhiyun if (phys_addr == paddr)
619*4882a593Smuzhiyun return true;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun if (efi_is_table_address(phys_addr))
622*4882a593Smuzhiyun return true;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun switch (efi_mem_type(phys_addr)) {
625*4882a593Smuzhiyun case EFI_BOOT_SERVICES_DATA:
626*4882a593Smuzhiyun case EFI_RUNTIME_SERVICES_DATA:
627*4882a593Smuzhiyun return true;
628*4882a593Smuzhiyun default:
629*4882a593Smuzhiyun break;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun return false;
633*4882a593Smuzhiyun }
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun /*
636*4882a593Smuzhiyun * Examine the physical address to determine if it is boot data by checking
637*4882a593Smuzhiyun * it against the boot params setup_data chain.
638*4882a593Smuzhiyun */
memremap_is_setup_data(resource_size_t phys_addr,unsigned long size)639*4882a593Smuzhiyun static bool memremap_is_setup_data(resource_size_t phys_addr,
640*4882a593Smuzhiyun unsigned long size)
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun struct setup_indirect *indirect;
643*4882a593Smuzhiyun struct setup_data *data;
644*4882a593Smuzhiyun u64 paddr, paddr_next;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun paddr = boot_params.hdr.setup_data;
647*4882a593Smuzhiyun while (paddr) {
648*4882a593Smuzhiyun unsigned int len;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun if (phys_addr == paddr)
651*4882a593Smuzhiyun return true;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun data = memremap(paddr, sizeof(*data),
654*4882a593Smuzhiyun MEMREMAP_WB | MEMREMAP_DEC);
655*4882a593Smuzhiyun if (!data) {
656*4882a593Smuzhiyun pr_warn("failed to memremap setup_data entry\n");
657*4882a593Smuzhiyun return false;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun paddr_next = data->next;
661*4882a593Smuzhiyun len = data->len;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun if ((phys_addr > paddr) && (phys_addr < (paddr + len))) {
664*4882a593Smuzhiyun memunmap(data);
665*4882a593Smuzhiyun return true;
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun if (data->type == SETUP_INDIRECT) {
669*4882a593Smuzhiyun memunmap(data);
670*4882a593Smuzhiyun data = memremap(paddr, sizeof(*data) + len,
671*4882a593Smuzhiyun MEMREMAP_WB | MEMREMAP_DEC);
672*4882a593Smuzhiyun if (!data) {
673*4882a593Smuzhiyun pr_warn("failed to memremap indirect setup_data\n");
674*4882a593Smuzhiyun return false;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun indirect = (struct setup_indirect *)data->data;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun if (indirect->type != SETUP_INDIRECT) {
680*4882a593Smuzhiyun paddr = indirect->addr;
681*4882a593Smuzhiyun len = indirect->len;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun memunmap(data);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun if ((phys_addr > paddr) && (phys_addr < (paddr + len)))
688*4882a593Smuzhiyun return true;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun paddr = paddr_next;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun return false;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /*
697*4882a593Smuzhiyun * Examine the physical address to determine if it is boot data by checking
698*4882a593Smuzhiyun * it against the boot params setup_data chain (early boot version).
699*4882a593Smuzhiyun */
early_memremap_is_setup_data(resource_size_t phys_addr,unsigned long size)700*4882a593Smuzhiyun static bool __init early_memremap_is_setup_data(resource_size_t phys_addr,
701*4882a593Smuzhiyun unsigned long size)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun struct setup_indirect *indirect;
704*4882a593Smuzhiyun struct setup_data *data;
705*4882a593Smuzhiyun u64 paddr, paddr_next;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun paddr = boot_params.hdr.setup_data;
708*4882a593Smuzhiyun while (paddr) {
709*4882a593Smuzhiyun unsigned int len, size;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun if (phys_addr == paddr)
712*4882a593Smuzhiyun return true;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun data = early_memremap_decrypted(paddr, sizeof(*data));
715*4882a593Smuzhiyun if (!data) {
716*4882a593Smuzhiyun pr_warn("failed to early memremap setup_data entry\n");
717*4882a593Smuzhiyun return false;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun size = sizeof(*data);
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun paddr_next = data->next;
723*4882a593Smuzhiyun len = data->len;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun if ((phys_addr > paddr) && (phys_addr < (paddr + len))) {
726*4882a593Smuzhiyun early_memunmap(data, sizeof(*data));
727*4882a593Smuzhiyun return true;
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun if (data->type == SETUP_INDIRECT) {
731*4882a593Smuzhiyun size += len;
732*4882a593Smuzhiyun early_memunmap(data, sizeof(*data));
733*4882a593Smuzhiyun data = early_memremap_decrypted(paddr, size);
734*4882a593Smuzhiyun if (!data) {
735*4882a593Smuzhiyun pr_warn("failed to early memremap indirect setup_data\n");
736*4882a593Smuzhiyun return false;
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun indirect = (struct setup_indirect *)data->data;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun if (indirect->type != SETUP_INDIRECT) {
742*4882a593Smuzhiyun paddr = indirect->addr;
743*4882a593Smuzhiyun len = indirect->len;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun early_memunmap(data, size);
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun if ((phys_addr > paddr) && (phys_addr < (paddr + len)))
750*4882a593Smuzhiyun return true;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun paddr = paddr_next;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun return false;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun /*
759*4882a593Smuzhiyun * Architecture function to determine if RAM remap is allowed. By default, a
760*4882a593Smuzhiyun * RAM remap will map the data as encrypted. Determine if a RAM remap should
761*4882a593Smuzhiyun * not be done so that the data will be mapped decrypted.
762*4882a593Smuzhiyun */
arch_memremap_can_ram_remap(resource_size_t phys_addr,unsigned long size,unsigned long flags)763*4882a593Smuzhiyun bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size,
764*4882a593Smuzhiyun unsigned long flags)
765*4882a593Smuzhiyun {
766*4882a593Smuzhiyun if (!mem_encrypt_active())
767*4882a593Smuzhiyun return true;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun if (flags & MEMREMAP_ENC)
770*4882a593Smuzhiyun return true;
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun if (flags & MEMREMAP_DEC)
773*4882a593Smuzhiyun return false;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun if (sme_active()) {
776*4882a593Smuzhiyun if (memremap_is_setup_data(phys_addr, size) ||
777*4882a593Smuzhiyun memremap_is_efi_data(phys_addr, size))
778*4882a593Smuzhiyun return false;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun return !memremap_should_map_decrypted(phys_addr, size);
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun /*
785*4882a593Smuzhiyun * Architecture override of __weak function to adjust the protection attributes
786*4882a593Smuzhiyun * used when remapping memory. By default, early_memremap() will map the data
787*4882a593Smuzhiyun * as encrypted. Determine if an encrypted mapping should not be done and set
788*4882a593Smuzhiyun * the appropriate protection attributes.
789*4882a593Smuzhiyun */
early_memremap_pgprot_adjust(resource_size_t phys_addr,unsigned long size,pgprot_t prot)790*4882a593Smuzhiyun pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr,
791*4882a593Smuzhiyun unsigned long size,
792*4882a593Smuzhiyun pgprot_t prot)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun bool encrypted_prot;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun if (!mem_encrypt_active())
797*4882a593Smuzhiyun return prot;
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun encrypted_prot = true;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun if (sme_active()) {
802*4882a593Smuzhiyun if (early_memremap_is_setup_data(phys_addr, size) ||
803*4882a593Smuzhiyun memremap_is_efi_data(phys_addr, size))
804*4882a593Smuzhiyun encrypted_prot = false;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun if (encrypted_prot && memremap_should_map_decrypted(phys_addr, size))
808*4882a593Smuzhiyun encrypted_prot = false;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun return encrypted_prot ? pgprot_encrypted(prot)
811*4882a593Smuzhiyun : pgprot_decrypted(prot);
812*4882a593Smuzhiyun }
813*4882a593Smuzhiyun
phys_mem_access_encrypted(unsigned long phys_addr,unsigned long size)814*4882a593Smuzhiyun bool phys_mem_access_encrypted(unsigned long phys_addr, unsigned long size)
815*4882a593Smuzhiyun {
816*4882a593Smuzhiyun return arch_memremap_can_ram_remap(phys_addr, size, 0);
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun #ifdef CONFIG_AMD_MEM_ENCRYPT
820*4882a593Smuzhiyun /* Remap memory with encryption */
early_memremap_encrypted(resource_size_t phys_addr,unsigned long size)821*4882a593Smuzhiyun void __init *early_memremap_encrypted(resource_size_t phys_addr,
822*4882a593Smuzhiyun unsigned long size)
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC);
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun /*
828*4882a593Smuzhiyun * Remap memory with encryption and write-protected - cannot be called
829*4882a593Smuzhiyun * before pat_init() is called
830*4882a593Smuzhiyun */
early_memremap_encrypted_wp(resource_size_t phys_addr,unsigned long size)831*4882a593Smuzhiyun void __init *early_memremap_encrypted_wp(resource_size_t phys_addr,
832*4882a593Smuzhiyun unsigned long size)
833*4882a593Smuzhiyun {
834*4882a593Smuzhiyun if (!x86_has_pat_wp())
835*4882a593Smuzhiyun return NULL;
836*4882a593Smuzhiyun return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP);
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun /* Remap memory without encryption */
early_memremap_decrypted(resource_size_t phys_addr,unsigned long size)840*4882a593Smuzhiyun void __init *early_memremap_decrypted(resource_size_t phys_addr,
841*4882a593Smuzhiyun unsigned long size)
842*4882a593Smuzhiyun {
843*4882a593Smuzhiyun return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC);
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun /*
847*4882a593Smuzhiyun * Remap memory without encryption and write-protected - cannot be called
848*4882a593Smuzhiyun * before pat_init() is called
849*4882a593Smuzhiyun */
early_memremap_decrypted_wp(resource_size_t phys_addr,unsigned long size)850*4882a593Smuzhiyun void __init *early_memremap_decrypted_wp(resource_size_t phys_addr,
851*4882a593Smuzhiyun unsigned long size)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun if (!x86_has_pat_wp())
854*4882a593Smuzhiyun return NULL;
855*4882a593Smuzhiyun return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP);
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun #endif /* CONFIG_AMD_MEM_ENCRYPT */
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] __page_aligned_bss;
860*4882a593Smuzhiyun
early_ioremap_pmd(unsigned long addr)861*4882a593Smuzhiyun static inline pmd_t * __init early_ioremap_pmd(unsigned long addr)
862*4882a593Smuzhiyun {
863*4882a593Smuzhiyun /* Don't assume we're using swapper_pg_dir at this point */
864*4882a593Smuzhiyun pgd_t *base = __va(read_cr3_pa());
865*4882a593Smuzhiyun pgd_t *pgd = &base[pgd_index(addr)];
866*4882a593Smuzhiyun p4d_t *p4d = p4d_offset(pgd, addr);
867*4882a593Smuzhiyun pud_t *pud = pud_offset(p4d, addr);
868*4882a593Smuzhiyun pmd_t *pmd = pmd_offset(pud, addr);
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun return pmd;
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun
early_ioremap_pte(unsigned long addr)873*4882a593Smuzhiyun static inline pte_t * __init early_ioremap_pte(unsigned long addr)
874*4882a593Smuzhiyun {
875*4882a593Smuzhiyun return &bm_pte[pte_index(addr)];
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun
is_early_ioremap_ptep(pte_t * ptep)878*4882a593Smuzhiyun bool __init is_early_ioremap_ptep(pte_t *ptep)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun return ptep >= &bm_pte[0] && ptep < &bm_pte[PAGE_SIZE/sizeof(pte_t)];
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun
early_ioremap_init(void)883*4882a593Smuzhiyun void __init early_ioremap_init(void)
884*4882a593Smuzhiyun {
885*4882a593Smuzhiyun pmd_t *pmd;
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun #ifdef CONFIG_X86_64
888*4882a593Smuzhiyun BUILD_BUG_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1));
889*4882a593Smuzhiyun #else
890*4882a593Smuzhiyun WARN_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1));
891*4882a593Smuzhiyun #endif
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun early_ioremap_setup();
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
896*4882a593Smuzhiyun memset(bm_pte, 0, sizeof(bm_pte));
897*4882a593Smuzhiyun pmd_populate_kernel(&init_mm, pmd, bm_pte);
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun /*
900*4882a593Smuzhiyun * The boot-ioremap range spans multiple pmds, for which
901*4882a593Smuzhiyun * we are not prepared:
902*4882a593Smuzhiyun */
903*4882a593Smuzhiyun #define __FIXADDR_TOP (-PAGE_SIZE)
904*4882a593Smuzhiyun BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
905*4882a593Smuzhiyun != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
906*4882a593Smuzhiyun #undef __FIXADDR_TOP
907*4882a593Smuzhiyun if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) {
908*4882a593Smuzhiyun WARN_ON(1);
909*4882a593Smuzhiyun printk(KERN_WARNING "pmd %p != %p\n",
910*4882a593Smuzhiyun pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END)));
911*4882a593Smuzhiyun printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
912*4882a593Smuzhiyun fix_to_virt(FIX_BTMAP_BEGIN));
913*4882a593Smuzhiyun printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n",
914*4882a593Smuzhiyun fix_to_virt(FIX_BTMAP_END));
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
917*4882a593Smuzhiyun printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n",
918*4882a593Smuzhiyun FIX_BTMAP_BEGIN);
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
__early_set_fixmap(enum fixed_addresses idx,phys_addr_t phys,pgprot_t flags)922*4882a593Smuzhiyun void __init __early_set_fixmap(enum fixed_addresses idx,
923*4882a593Smuzhiyun phys_addr_t phys, pgprot_t flags)
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun unsigned long addr = __fix_to_virt(idx);
926*4882a593Smuzhiyun pte_t *pte;
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun if (idx >= __end_of_fixed_addresses) {
929*4882a593Smuzhiyun BUG();
930*4882a593Smuzhiyun return;
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun pte = early_ioremap_pte(addr);
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun /* Sanitize 'prot' against any unsupported bits: */
935*4882a593Smuzhiyun pgprot_val(flags) &= __supported_pte_mask;
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun if (pgprot_val(flags))
938*4882a593Smuzhiyun set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
939*4882a593Smuzhiyun else
940*4882a593Smuzhiyun pte_clear(&init_mm, addr, pte);
941*4882a593Smuzhiyun flush_tlb_one_kernel(addr);
942*4882a593Smuzhiyun }
943