xref: /OK3568_Linux_fs/kernel/arch/x86/mm/amdtopology.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * AMD NUMA support.
4*4882a593Smuzhiyun  * Discover the memory map and associated nodes.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This version reads it directly from the AMD northbridge.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright 2002,2003 Andi Kleen, SuSE Labs.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/string.h>
13*4882a593Smuzhiyun #include <linux/nodemask.h>
14*4882a593Smuzhiyun #include <linux/memblock.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/io.h>
17*4882a593Smuzhiyun #include <linux/pci_ids.h>
18*4882a593Smuzhiyun #include <linux/acpi.h>
19*4882a593Smuzhiyun #include <asm/types.h>
20*4882a593Smuzhiyun #include <asm/mmzone.h>
21*4882a593Smuzhiyun #include <asm/proto.h>
22*4882a593Smuzhiyun #include <asm/e820/api.h>
23*4882a593Smuzhiyun #include <asm/pci-direct.h>
24*4882a593Smuzhiyun #include <asm/numa.h>
25*4882a593Smuzhiyun #include <asm/mpspec.h>
26*4882a593Smuzhiyun #include <asm/apic.h>
27*4882a593Smuzhiyun #include <asm/amd_nb.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static unsigned char __initdata nodeids[8];
30*4882a593Smuzhiyun 
find_northbridge(void)31*4882a593Smuzhiyun static __init int find_northbridge(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	int num;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	for (num = 0; num < 32; num++) {
36*4882a593Smuzhiyun 		u32 header;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 		header = read_pci_config(0, num, 0, 0x00);
39*4882a593Smuzhiyun 		if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
40*4882a593Smuzhiyun 			header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
41*4882a593Smuzhiyun 			header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
42*4882a593Smuzhiyun 			continue;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 		header = read_pci_config(0, num, 1, 0x00);
45*4882a593Smuzhiyun 		if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
46*4882a593Smuzhiyun 			header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
47*4882a593Smuzhiyun 			header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
48*4882a593Smuzhiyun 			continue;
49*4882a593Smuzhiyun 		return num;
50*4882a593Smuzhiyun 	}
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	return -ENOENT;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
amd_numa_init(void)55*4882a593Smuzhiyun int __init amd_numa_init(void)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	u64 start = PFN_PHYS(0);
58*4882a593Smuzhiyun 	u64 end = PFN_PHYS(max_pfn);
59*4882a593Smuzhiyun 	unsigned numnodes;
60*4882a593Smuzhiyun 	u64 prevbase;
61*4882a593Smuzhiyun 	int i, j, nb;
62*4882a593Smuzhiyun 	u32 nodeid, reg;
63*4882a593Smuzhiyun 	unsigned int bits, cores, apicid_base;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	if (!early_pci_allowed())
66*4882a593Smuzhiyun 		return -EINVAL;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	nb = find_northbridge();
69*4882a593Smuzhiyun 	if (nb < 0)
70*4882a593Smuzhiyun 		return nb;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	reg = read_pci_config(0, nb, 0, 0x60);
75*4882a593Smuzhiyun 	numnodes = ((reg >> 4) & 0xF) + 1;
76*4882a593Smuzhiyun 	if (numnodes <= 1)
77*4882a593Smuzhiyun 		return -ENOENT;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	pr_info("Number of physical nodes %d\n", numnodes);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	prevbase = 0;
82*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
83*4882a593Smuzhiyun 		u64 base, limit;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 		base = read_pci_config(0, nb, 1, 0x40 + i*8);
86*4882a593Smuzhiyun 		limit = read_pci_config(0, nb, 1, 0x44 + i*8);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 		nodeids[i] = nodeid = limit & 7;
89*4882a593Smuzhiyun 		if ((base & 3) == 0) {
90*4882a593Smuzhiyun 			if (i < numnodes)
91*4882a593Smuzhiyun 				pr_info("Skipping disabled node %d\n", i);
92*4882a593Smuzhiyun 			continue;
93*4882a593Smuzhiyun 		}
94*4882a593Smuzhiyun 		if (nodeid >= numnodes) {
95*4882a593Smuzhiyun 			pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
96*4882a593Smuzhiyun 				base, limit);
97*4882a593Smuzhiyun 			continue;
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 		if (!limit) {
101*4882a593Smuzhiyun 			pr_info("Skipping node entry %d (base %Lx)\n",
102*4882a593Smuzhiyun 				i, base);
103*4882a593Smuzhiyun 			continue;
104*4882a593Smuzhiyun 		}
105*4882a593Smuzhiyun 		if ((base >> 8) & 3 || (limit >> 8) & 3) {
106*4882a593Smuzhiyun 			pr_err("Node %d using interleaving mode %Lx/%Lx\n",
107*4882a593Smuzhiyun 			       nodeid, (base >> 8) & 3, (limit >> 8) & 3);
108*4882a593Smuzhiyun 			return -EINVAL;
109*4882a593Smuzhiyun 		}
110*4882a593Smuzhiyun 		if (node_isset(nodeid, numa_nodes_parsed)) {
111*4882a593Smuzhiyun 			pr_info("Node %d already present, skipping\n",
112*4882a593Smuzhiyun 				nodeid);
113*4882a593Smuzhiyun 			continue;
114*4882a593Smuzhiyun 		}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 		limit >>= 16;
117*4882a593Smuzhiyun 		limit++;
118*4882a593Smuzhiyun 		limit <<= 24;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 		if (limit > end)
121*4882a593Smuzhiyun 			limit = end;
122*4882a593Smuzhiyun 		if (limit <= base)
123*4882a593Smuzhiyun 			continue;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 		base >>= 16;
126*4882a593Smuzhiyun 		base <<= 24;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 		if (base < start)
129*4882a593Smuzhiyun 			base = start;
130*4882a593Smuzhiyun 		if (limit > end)
131*4882a593Smuzhiyun 			limit = end;
132*4882a593Smuzhiyun 		if (limit == base) {
133*4882a593Smuzhiyun 			pr_err("Empty node %d\n", nodeid);
134*4882a593Smuzhiyun 			continue;
135*4882a593Smuzhiyun 		}
136*4882a593Smuzhiyun 		if (limit < base) {
137*4882a593Smuzhiyun 			pr_err("Node %d bogus settings %Lx-%Lx.\n",
138*4882a593Smuzhiyun 			       nodeid, base, limit);
139*4882a593Smuzhiyun 			continue;
140*4882a593Smuzhiyun 		}
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		/* Could sort here, but pun for now. Should not happen anyroads. */
143*4882a593Smuzhiyun 		if (prevbase > base) {
144*4882a593Smuzhiyun 			pr_err("Node map not sorted %Lx,%Lx\n",
145*4882a593Smuzhiyun 			       prevbase, base);
146*4882a593Smuzhiyun 			return -EINVAL;
147*4882a593Smuzhiyun 		}
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 		pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
150*4882a593Smuzhiyun 			nodeid, base, limit);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 		prevbase = base;
153*4882a593Smuzhiyun 		numa_add_memblk(nodeid, base, limit);
154*4882a593Smuzhiyun 		node_set(nodeid, numa_nodes_parsed);
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	if (!nodes_weight(numa_nodes_parsed))
158*4882a593Smuzhiyun 		return -ENOENT;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/*
161*4882a593Smuzhiyun 	 * We seem to have valid NUMA configuration.  Map apicids to nodes
162*4882a593Smuzhiyun 	 * using the coreid bits from early_identify_cpu.
163*4882a593Smuzhiyun 	 */
164*4882a593Smuzhiyun 	bits = boot_cpu_data.x86_coreid_bits;
165*4882a593Smuzhiyun 	cores = 1 << bits;
166*4882a593Smuzhiyun 	apicid_base = 0;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/*
169*4882a593Smuzhiyun 	 * get boot-time SMP configuration:
170*4882a593Smuzhiyun 	 */
171*4882a593Smuzhiyun 	early_get_smp_config();
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (boot_cpu_physical_apicid > 0) {
174*4882a593Smuzhiyun 		pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
175*4882a593Smuzhiyun 		apicid_base = boot_cpu_physical_apicid;
176*4882a593Smuzhiyun 	}
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	for_each_node_mask(i, numa_nodes_parsed)
179*4882a593Smuzhiyun 		for (j = apicid_base; j < cores + apicid_base; j++)
180*4882a593Smuzhiyun 			set_apicid_to_node((i << bits) + j, i);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	return 0;
183*4882a593Smuzhiyun }
184