1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun .file "reg_u_sub.S" 3*4882a593Smuzhiyun/*---------------------------------------------------------------------------+ 4*4882a593Smuzhiyun | reg_u_sub.S | 5*4882a593Smuzhiyun | | 6*4882a593Smuzhiyun | Core floating point subtraction routine. | 7*4882a593Smuzhiyun | | 8*4882a593Smuzhiyun | Copyright (C) 1992,1993,1995,1997 | 9*4882a593Smuzhiyun | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia | 10*4882a593Smuzhiyun | E-mail billm@suburbia.net | 11*4882a593Smuzhiyun | | 12*4882a593Smuzhiyun | Call from C as: | 13*4882a593Smuzhiyun | int FPU_u_sub(FPU_REG *arg1, FPU_REG *arg2, FPU_REG *answ, | 14*4882a593Smuzhiyun | int control_w) | 15*4882a593Smuzhiyun | Return value is the tag of the answer, or-ed with FPU_Exception if | 16*4882a593Smuzhiyun | one was raised, or -1 on internal error. | 17*4882a593Smuzhiyun | | 18*4882a593Smuzhiyun +---------------------------------------------------------------------------*/ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun/* 21*4882a593Smuzhiyun | Kernel subtraction routine FPU_u_sub(reg *arg1, reg *arg2, reg *answ). 22*4882a593Smuzhiyun | Takes two valid reg f.p. numbers (TAG_Valid), which are 23*4882a593Smuzhiyun | treated as unsigned numbers, 24*4882a593Smuzhiyun | and returns their difference as a TAG_Valid or TAG_Zero f.p. 25*4882a593Smuzhiyun | number. 26*4882a593Smuzhiyun | The first number (arg1) must be the larger. 27*4882a593Smuzhiyun | The returned number is normalized. 28*4882a593Smuzhiyun | Basic checks are performed if PARANOID is defined. 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun#include "exception.h" 32*4882a593Smuzhiyun#include "fpu_emu.h" 33*4882a593Smuzhiyun#include "control_w.h" 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun.text 36*4882a593SmuzhiyunSYM_FUNC_START(FPU_u_sub) 37*4882a593Smuzhiyun pushl %ebp 38*4882a593Smuzhiyun movl %esp,%ebp 39*4882a593Smuzhiyun pushl %esi 40*4882a593Smuzhiyun pushl %edi 41*4882a593Smuzhiyun pushl %ebx 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun movl PARAM1,%esi /* source 1 */ 44*4882a593Smuzhiyun movl PARAM2,%edi /* source 2 */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun movl PARAM6,%ecx 47*4882a593Smuzhiyun subl PARAM7,%ecx /* exp1 - exp2 */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun#ifdef PARANOID 50*4882a593Smuzhiyun /* source 2 is always smaller than source 1 */ 51*4882a593Smuzhiyun js L_bugged_1 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun testl $0x80000000,SIGH(%edi) /* The args are assumed to be be normalized */ 54*4882a593Smuzhiyun je L_bugged_2 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun testl $0x80000000,SIGH(%esi) 57*4882a593Smuzhiyun je L_bugged_2 58*4882a593Smuzhiyun#endif /* PARANOID */ 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun/*--------------------------------------+ 61*4882a593Smuzhiyun | Form a register holding the | 62*4882a593Smuzhiyun | smaller number | 63*4882a593Smuzhiyun +--------------------------------------*/ 64*4882a593Smuzhiyun movl SIGH(%edi),%eax /* register ms word */ 65*4882a593Smuzhiyun movl SIGL(%edi),%ebx /* register ls word */ 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun movl PARAM3,%edi /* destination */ 68*4882a593Smuzhiyun movl PARAM6,%edx 69*4882a593Smuzhiyun movw %dx,EXP(%edi) /* Copy exponent to destination */ 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun xorl %edx,%edx /* register extension */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun/*--------------------------------------+ 74*4882a593Smuzhiyun | Shift the temporary register | 75*4882a593Smuzhiyun | right the required number of | 76*4882a593Smuzhiyun | places. | 77*4882a593Smuzhiyun +--------------------------------------*/ 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun cmpw $32,%cx /* shrd only works for 0..31 bits */ 80*4882a593Smuzhiyun jnc L_more_than_31 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun/* less than 32 bits */ 83*4882a593Smuzhiyun shrd %cl,%ebx,%edx 84*4882a593Smuzhiyun shrd %cl,%eax,%ebx 85*4882a593Smuzhiyun shr %cl,%eax 86*4882a593Smuzhiyun jmp L_shift_done 87*4882a593Smuzhiyun 88*4882a593SmuzhiyunL_more_than_31: 89*4882a593Smuzhiyun cmpw $64,%cx 90*4882a593Smuzhiyun jnc L_more_than_63 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun subb $32,%cl 93*4882a593Smuzhiyun jz L_exactly_32 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun shrd %cl,%eax,%edx 96*4882a593Smuzhiyun shr %cl,%eax 97*4882a593Smuzhiyun orl %ebx,%ebx 98*4882a593Smuzhiyun jz L_more_31_no_low /* none of the lowest bits is set */ 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun orl $1,%edx /* record the fact in the extension */ 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunL_more_31_no_low: 103*4882a593Smuzhiyun movl %eax,%ebx 104*4882a593Smuzhiyun xorl %eax,%eax 105*4882a593Smuzhiyun jmp L_shift_done 106*4882a593Smuzhiyun 107*4882a593SmuzhiyunL_exactly_32: 108*4882a593Smuzhiyun movl %ebx,%edx 109*4882a593Smuzhiyun movl %eax,%ebx 110*4882a593Smuzhiyun xorl %eax,%eax 111*4882a593Smuzhiyun jmp L_shift_done 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunL_more_than_63: 114*4882a593Smuzhiyun cmpw $65,%cx 115*4882a593Smuzhiyun jnc L_more_than_64 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* Shift right by 64 bits */ 118*4882a593Smuzhiyun movl %eax,%edx 119*4882a593Smuzhiyun orl %ebx,%ebx 120*4882a593Smuzhiyun jz L_more_63_no_low 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun orl $1,%edx 123*4882a593Smuzhiyun jmp L_more_63_no_low 124*4882a593Smuzhiyun 125*4882a593SmuzhiyunL_more_than_64: 126*4882a593Smuzhiyun jne L_more_than_65 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* Shift right by 65 bits */ 129*4882a593Smuzhiyun /* Carry is clear if we get here */ 130*4882a593Smuzhiyun movl %eax,%edx 131*4882a593Smuzhiyun rcrl %edx 132*4882a593Smuzhiyun jnc L_shift_65_nc 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun orl $1,%edx 135*4882a593Smuzhiyun jmp L_more_63_no_low 136*4882a593Smuzhiyun 137*4882a593SmuzhiyunL_shift_65_nc: 138*4882a593Smuzhiyun orl %ebx,%ebx 139*4882a593Smuzhiyun jz L_more_63_no_low 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun orl $1,%edx 142*4882a593Smuzhiyun jmp L_more_63_no_low 143*4882a593Smuzhiyun 144*4882a593SmuzhiyunL_more_than_65: 145*4882a593Smuzhiyun movl $1,%edx /* The shifted nr always at least one '1' */ 146*4882a593Smuzhiyun 147*4882a593SmuzhiyunL_more_63_no_low: 148*4882a593Smuzhiyun xorl %ebx,%ebx 149*4882a593Smuzhiyun xorl %eax,%eax 150*4882a593Smuzhiyun 151*4882a593SmuzhiyunL_shift_done: 152*4882a593SmuzhiyunL_subtr: 153*4882a593Smuzhiyun/*------------------------------+ 154*4882a593Smuzhiyun | Do the subtraction | 155*4882a593Smuzhiyun +------------------------------*/ 156*4882a593Smuzhiyun xorl %ecx,%ecx 157*4882a593Smuzhiyun subl %edx,%ecx 158*4882a593Smuzhiyun movl %ecx,%edx 159*4882a593Smuzhiyun movl SIGL(%esi),%ecx 160*4882a593Smuzhiyun sbbl %ebx,%ecx 161*4882a593Smuzhiyun movl %ecx,%ebx 162*4882a593Smuzhiyun movl SIGH(%esi),%ecx 163*4882a593Smuzhiyun sbbl %eax,%ecx 164*4882a593Smuzhiyun movl %ecx,%eax 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun#ifdef PARANOID 167*4882a593Smuzhiyun /* We can never get a borrow */ 168*4882a593Smuzhiyun jc L_bugged 169*4882a593Smuzhiyun#endif /* PARANOID */ 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun/*--------------------------------------+ 172*4882a593Smuzhiyun | Normalize the result | 173*4882a593Smuzhiyun +--------------------------------------*/ 174*4882a593Smuzhiyun testl $0x80000000,%eax 175*4882a593Smuzhiyun jnz L_round /* no shifting needed */ 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun orl %eax,%eax 178*4882a593Smuzhiyun jnz L_shift_1 /* shift left 1 - 31 bits */ 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun orl %ebx,%ebx 181*4882a593Smuzhiyun jnz L_shift_32 /* shift left 32 - 63 bits */ 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun/* 184*4882a593Smuzhiyun * A rare case, the only one which is non-zero if we got here 185*4882a593Smuzhiyun * is: 1000000 .... 0000 186*4882a593Smuzhiyun * -0111111 .... 1111 1 187*4882a593Smuzhiyun * -------------------- 188*4882a593Smuzhiyun * 0000000 .... 0000 1 189*4882a593Smuzhiyun */ 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun cmpl $0x80000000,%edx 192*4882a593Smuzhiyun jnz L_must_be_zero 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* Shift left 64 bits */ 195*4882a593Smuzhiyun subw $64,EXP(%edi) 196*4882a593Smuzhiyun xchg %edx,%eax 197*4882a593Smuzhiyun jmp fpu_reg_round 198*4882a593Smuzhiyun 199*4882a593SmuzhiyunL_must_be_zero: 200*4882a593Smuzhiyun#ifdef PARANOID 201*4882a593Smuzhiyun orl %edx,%edx 202*4882a593Smuzhiyun jnz L_bugged_3 203*4882a593Smuzhiyun#endif /* PARANOID */ 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun /* The result is zero */ 206*4882a593Smuzhiyun movw $0,EXP(%edi) /* exponent */ 207*4882a593Smuzhiyun movl $0,SIGL(%edi) 208*4882a593Smuzhiyun movl $0,SIGH(%edi) 209*4882a593Smuzhiyun movl TAG_Zero,%eax 210*4882a593Smuzhiyun jmp L_exit 211*4882a593Smuzhiyun 212*4882a593SmuzhiyunL_shift_32: 213*4882a593Smuzhiyun movl %ebx,%eax 214*4882a593Smuzhiyun movl %edx,%ebx 215*4882a593Smuzhiyun movl $0,%edx 216*4882a593Smuzhiyun subw $32,EXP(%edi) /* Can get underflow here */ 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun/* We need to shift left by 1 - 31 bits */ 219*4882a593SmuzhiyunL_shift_1: 220*4882a593Smuzhiyun bsrl %eax,%ecx /* get the required shift in %ecx */ 221*4882a593Smuzhiyun subl $31,%ecx 222*4882a593Smuzhiyun negl %ecx 223*4882a593Smuzhiyun shld %cl,%ebx,%eax 224*4882a593Smuzhiyun shld %cl,%edx,%ebx 225*4882a593Smuzhiyun shl %cl,%edx 226*4882a593Smuzhiyun subw %cx,EXP(%edi) /* Can get underflow here */ 227*4882a593Smuzhiyun 228*4882a593SmuzhiyunL_round: 229*4882a593Smuzhiyun jmp fpu_reg_round /* Round the result */ 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun#ifdef PARANOID 233*4882a593SmuzhiyunL_bugged_1: 234*4882a593Smuzhiyun pushl EX_INTERNAL|0x206 235*4882a593Smuzhiyun call EXCEPTION 236*4882a593Smuzhiyun pop %ebx 237*4882a593Smuzhiyun jmp L_error_exit 238*4882a593Smuzhiyun 239*4882a593SmuzhiyunL_bugged_2: 240*4882a593Smuzhiyun pushl EX_INTERNAL|0x209 241*4882a593Smuzhiyun call EXCEPTION 242*4882a593Smuzhiyun pop %ebx 243*4882a593Smuzhiyun jmp L_error_exit 244*4882a593Smuzhiyun 245*4882a593SmuzhiyunL_bugged_3: 246*4882a593Smuzhiyun pushl EX_INTERNAL|0x210 247*4882a593Smuzhiyun call EXCEPTION 248*4882a593Smuzhiyun pop %ebx 249*4882a593Smuzhiyun jmp L_error_exit 250*4882a593Smuzhiyun 251*4882a593SmuzhiyunL_bugged_4: 252*4882a593Smuzhiyun pushl EX_INTERNAL|0x211 253*4882a593Smuzhiyun call EXCEPTION 254*4882a593Smuzhiyun pop %ebx 255*4882a593Smuzhiyun jmp L_error_exit 256*4882a593Smuzhiyun 257*4882a593SmuzhiyunL_bugged: 258*4882a593Smuzhiyun pushl EX_INTERNAL|0x212 259*4882a593Smuzhiyun call EXCEPTION 260*4882a593Smuzhiyun pop %ebx 261*4882a593Smuzhiyun jmp L_error_exit 262*4882a593Smuzhiyun 263*4882a593SmuzhiyunL_error_exit: 264*4882a593Smuzhiyun movl $-1,%eax 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun#endif /* PARANOID */ 267*4882a593Smuzhiyun 268*4882a593SmuzhiyunL_exit: 269*4882a593Smuzhiyun popl %ebx 270*4882a593Smuzhiyun popl %edi 271*4882a593Smuzhiyun popl %esi 272*4882a593Smuzhiyun leave 273*4882a593Smuzhiyun RET 274*4882a593SmuzhiyunSYM_FUNC_END(FPU_u_sub) 275