1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * atomic64_t for 386/486 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright © 2010 Luca Barbieri 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <linux/linkage.h> 9*4882a593Smuzhiyun#include <asm/alternative.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/* if you want SMP support, implement these with real spinlocks */ 12*4882a593Smuzhiyun.macro IRQ_SAVE reg 13*4882a593Smuzhiyun pushfl 14*4882a593Smuzhiyun cli 15*4882a593Smuzhiyun.endm 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun.macro IRQ_RESTORE reg 18*4882a593Smuzhiyun popfl 19*4882a593Smuzhiyun.endm 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun#define BEGIN_IRQ_SAVE(op) \ 22*4882a593Smuzhiyun.macro endp; \ 23*4882a593SmuzhiyunSYM_FUNC_END(atomic64_##op##_386); \ 24*4882a593Smuzhiyun.purgem endp; \ 25*4882a593Smuzhiyun.endm; \ 26*4882a593SmuzhiyunSYM_FUNC_START(atomic64_##op##_386); \ 27*4882a593Smuzhiyun IRQ_SAVE v; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun#define ENDP endp 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun#define RET_IRQ_RESTORE \ 32*4882a593Smuzhiyun IRQ_RESTORE v; \ 33*4882a593Smuzhiyun RET 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun#define v %ecx 36*4882a593SmuzhiyunBEGIN_IRQ_SAVE(read) 37*4882a593Smuzhiyun movl (v), %eax 38*4882a593Smuzhiyun movl 4(v), %edx 39*4882a593Smuzhiyun RET_IRQ_RESTORE 40*4882a593SmuzhiyunENDP 41*4882a593Smuzhiyun#undef v 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun#define v %esi 44*4882a593SmuzhiyunBEGIN_IRQ_SAVE(set) 45*4882a593Smuzhiyun movl %ebx, (v) 46*4882a593Smuzhiyun movl %ecx, 4(v) 47*4882a593Smuzhiyun RET_IRQ_RESTORE 48*4882a593SmuzhiyunENDP 49*4882a593Smuzhiyun#undef v 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun#define v %esi 52*4882a593SmuzhiyunBEGIN_IRQ_SAVE(xchg) 53*4882a593Smuzhiyun movl (v), %eax 54*4882a593Smuzhiyun movl 4(v), %edx 55*4882a593Smuzhiyun movl %ebx, (v) 56*4882a593Smuzhiyun movl %ecx, 4(v) 57*4882a593Smuzhiyun RET_IRQ_RESTORE 58*4882a593SmuzhiyunENDP 59*4882a593Smuzhiyun#undef v 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun#define v %ecx 62*4882a593SmuzhiyunBEGIN_IRQ_SAVE(add) 63*4882a593Smuzhiyun addl %eax, (v) 64*4882a593Smuzhiyun adcl %edx, 4(v) 65*4882a593Smuzhiyun RET_IRQ_RESTORE 66*4882a593SmuzhiyunENDP 67*4882a593Smuzhiyun#undef v 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun#define v %ecx 70*4882a593SmuzhiyunBEGIN_IRQ_SAVE(add_return) 71*4882a593Smuzhiyun addl (v), %eax 72*4882a593Smuzhiyun adcl 4(v), %edx 73*4882a593Smuzhiyun movl %eax, (v) 74*4882a593Smuzhiyun movl %edx, 4(v) 75*4882a593Smuzhiyun RET_IRQ_RESTORE 76*4882a593SmuzhiyunENDP 77*4882a593Smuzhiyun#undef v 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun#define v %ecx 80*4882a593SmuzhiyunBEGIN_IRQ_SAVE(sub) 81*4882a593Smuzhiyun subl %eax, (v) 82*4882a593Smuzhiyun sbbl %edx, 4(v) 83*4882a593Smuzhiyun RET_IRQ_RESTORE 84*4882a593SmuzhiyunENDP 85*4882a593Smuzhiyun#undef v 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun#define v %ecx 88*4882a593SmuzhiyunBEGIN_IRQ_SAVE(sub_return) 89*4882a593Smuzhiyun negl %edx 90*4882a593Smuzhiyun negl %eax 91*4882a593Smuzhiyun sbbl $0, %edx 92*4882a593Smuzhiyun addl (v), %eax 93*4882a593Smuzhiyun adcl 4(v), %edx 94*4882a593Smuzhiyun movl %eax, (v) 95*4882a593Smuzhiyun movl %edx, 4(v) 96*4882a593Smuzhiyun RET_IRQ_RESTORE 97*4882a593SmuzhiyunENDP 98*4882a593Smuzhiyun#undef v 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun#define v %esi 101*4882a593SmuzhiyunBEGIN_IRQ_SAVE(inc) 102*4882a593Smuzhiyun addl $1, (v) 103*4882a593Smuzhiyun adcl $0, 4(v) 104*4882a593Smuzhiyun RET_IRQ_RESTORE 105*4882a593SmuzhiyunENDP 106*4882a593Smuzhiyun#undef v 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun#define v %esi 109*4882a593SmuzhiyunBEGIN_IRQ_SAVE(inc_return) 110*4882a593Smuzhiyun movl (v), %eax 111*4882a593Smuzhiyun movl 4(v), %edx 112*4882a593Smuzhiyun addl $1, %eax 113*4882a593Smuzhiyun adcl $0, %edx 114*4882a593Smuzhiyun movl %eax, (v) 115*4882a593Smuzhiyun movl %edx, 4(v) 116*4882a593Smuzhiyun RET_IRQ_RESTORE 117*4882a593SmuzhiyunENDP 118*4882a593Smuzhiyun#undef v 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun#define v %esi 121*4882a593SmuzhiyunBEGIN_IRQ_SAVE(dec) 122*4882a593Smuzhiyun subl $1, (v) 123*4882a593Smuzhiyun sbbl $0, 4(v) 124*4882a593Smuzhiyun RET_IRQ_RESTORE 125*4882a593SmuzhiyunENDP 126*4882a593Smuzhiyun#undef v 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun#define v %esi 129*4882a593SmuzhiyunBEGIN_IRQ_SAVE(dec_return) 130*4882a593Smuzhiyun movl (v), %eax 131*4882a593Smuzhiyun movl 4(v), %edx 132*4882a593Smuzhiyun subl $1, %eax 133*4882a593Smuzhiyun sbbl $0, %edx 134*4882a593Smuzhiyun movl %eax, (v) 135*4882a593Smuzhiyun movl %edx, 4(v) 136*4882a593Smuzhiyun RET_IRQ_RESTORE 137*4882a593SmuzhiyunENDP 138*4882a593Smuzhiyun#undef v 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun#define v %esi 141*4882a593SmuzhiyunBEGIN_IRQ_SAVE(add_unless) 142*4882a593Smuzhiyun addl %eax, %ecx 143*4882a593Smuzhiyun adcl %edx, %edi 144*4882a593Smuzhiyun addl (v), %eax 145*4882a593Smuzhiyun adcl 4(v), %edx 146*4882a593Smuzhiyun cmpl %eax, %ecx 147*4882a593Smuzhiyun je 3f 148*4882a593Smuzhiyun1: 149*4882a593Smuzhiyun movl %eax, (v) 150*4882a593Smuzhiyun movl %edx, 4(v) 151*4882a593Smuzhiyun movl $1, %eax 152*4882a593Smuzhiyun2: 153*4882a593Smuzhiyun RET_IRQ_RESTORE 154*4882a593Smuzhiyun3: 155*4882a593Smuzhiyun cmpl %edx, %edi 156*4882a593Smuzhiyun jne 1b 157*4882a593Smuzhiyun xorl %eax, %eax 158*4882a593Smuzhiyun jmp 2b 159*4882a593SmuzhiyunENDP 160*4882a593Smuzhiyun#undef v 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun#define v %esi 163*4882a593SmuzhiyunBEGIN_IRQ_SAVE(inc_not_zero) 164*4882a593Smuzhiyun movl (v), %eax 165*4882a593Smuzhiyun movl 4(v), %edx 166*4882a593Smuzhiyun testl %eax, %eax 167*4882a593Smuzhiyun je 3f 168*4882a593Smuzhiyun1: 169*4882a593Smuzhiyun addl $1, %eax 170*4882a593Smuzhiyun adcl $0, %edx 171*4882a593Smuzhiyun movl %eax, (v) 172*4882a593Smuzhiyun movl %edx, 4(v) 173*4882a593Smuzhiyun movl $1, %eax 174*4882a593Smuzhiyun2: 175*4882a593Smuzhiyun RET_IRQ_RESTORE 176*4882a593Smuzhiyun3: 177*4882a593Smuzhiyun testl %edx, %edx 178*4882a593Smuzhiyun jne 1b 179*4882a593Smuzhiyun jmp 2b 180*4882a593SmuzhiyunENDP 181*4882a593Smuzhiyun#undef v 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun#define v %esi 184*4882a593SmuzhiyunBEGIN_IRQ_SAVE(dec_if_positive) 185*4882a593Smuzhiyun movl (v), %eax 186*4882a593Smuzhiyun movl 4(v), %edx 187*4882a593Smuzhiyun subl $1, %eax 188*4882a593Smuzhiyun sbbl $0, %edx 189*4882a593Smuzhiyun js 1f 190*4882a593Smuzhiyun movl %eax, (v) 191*4882a593Smuzhiyun movl %edx, 4(v) 192*4882a593Smuzhiyun1: 193*4882a593Smuzhiyun RET_IRQ_RESTORE 194*4882a593SmuzhiyunENDP 195*4882a593Smuzhiyun#undef v 196