1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __KVM_X86_VMX_POSTED_INTR_H
3*4882a593Smuzhiyun #define __KVM_X86_VMX_POSTED_INTR_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #define POSTED_INTR_ON 0
6*4882a593Smuzhiyun #define POSTED_INTR_SN 1
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /* Posted-Interrupt Descriptor */
9*4882a593Smuzhiyun struct pi_desc {
10*4882a593Smuzhiyun u32 pir[8]; /* Posted interrupt requested */
11*4882a593Smuzhiyun union {
12*4882a593Smuzhiyun struct {
13*4882a593Smuzhiyun /* bit 256 - Outstanding Notification */
14*4882a593Smuzhiyun u16 on : 1,
15*4882a593Smuzhiyun /* bit 257 - Suppress Notification */
16*4882a593Smuzhiyun sn : 1,
17*4882a593Smuzhiyun /* bit 271:258 - Reserved */
18*4882a593Smuzhiyun rsvd_1 : 14;
19*4882a593Smuzhiyun /* bit 279:272 - Notification Vector */
20*4882a593Smuzhiyun u8 nv;
21*4882a593Smuzhiyun /* bit 287:280 - Reserved */
22*4882a593Smuzhiyun u8 rsvd_2;
23*4882a593Smuzhiyun /* bit 319:288 - Notification Destination */
24*4882a593Smuzhiyun u32 ndst;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun u64 control;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun u32 rsvd[6];
29*4882a593Smuzhiyun } __aligned(64);
30*4882a593Smuzhiyun
pi_test_and_set_on(struct pi_desc * pi_desc)31*4882a593Smuzhiyun static inline bool pi_test_and_set_on(struct pi_desc *pi_desc)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun return test_and_set_bit(POSTED_INTR_ON,
34*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
pi_test_and_clear_on(struct pi_desc * pi_desc)37*4882a593Smuzhiyun static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun return test_and_clear_bit(POSTED_INTR_ON,
40*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
pi_test_and_set_pir(int vector,struct pi_desc * pi_desc)43*4882a593Smuzhiyun static inline int pi_test_and_set_pir(int vector, struct pi_desc *pi_desc)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return test_and_set_bit(vector, (unsigned long *)pi_desc->pir);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
pi_is_pir_empty(struct pi_desc * pi_desc)48*4882a593Smuzhiyun static inline bool pi_is_pir_empty(struct pi_desc *pi_desc)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
pi_set_sn(struct pi_desc * pi_desc)53*4882a593Smuzhiyun static inline void pi_set_sn(struct pi_desc *pi_desc)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun set_bit(POSTED_INTR_SN,
56*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
pi_set_on(struct pi_desc * pi_desc)59*4882a593Smuzhiyun static inline void pi_set_on(struct pi_desc *pi_desc)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun set_bit(POSTED_INTR_ON,
62*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
pi_clear_on(struct pi_desc * pi_desc)65*4882a593Smuzhiyun static inline void pi_clear_on(struct pi_desc *pi_desc)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun clear_bit(POSTED_INTR_ON,
68*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
pi_clear_sn(struct pi_desc * pi_desc)71*4882a593Smuzhiyun static inline void pi_clear_sn(struct pi_desc *pi_desc)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun clear_bit(POSTED_INTR_SN,
74*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
pi_test_on(struct pi_desc * pi_desc)77*4882a593Smuzhiyun static inline int pi_test_on(struct pi_desc *pi_desc)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun return test_bit(POSTED_INTR_ON,
80*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
pi_test_sn(struct pi_desc * pi_desc)83*4882a593Smuzhiyun static inline int pi_test_sn(struct pi_desc *pi_desc)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun return test_bit(POSTED_INTR_SN,
86*4882a593Smuzhiyun (unsigned long *)&pi_desc->control);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu);
90*4882a593Smuzhiyun void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu);
91*4882a593Smuzhiyun int pi_pre_block(struct kvm_vcpu *vcpu);
92*4882a593Smuzhiyun void pi_post_block(struct kvm_vcpu *vcpu);
93*4882a593Smuzhiyun void pi_wakeup_handler(void);
94*4882a593Smuzhiyun void __init pi_init_cpu(int cpu);
95*4882a593Smuzhiyun bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu);
96*4882a593Smuzhiyun int pi_update_irte(struct kvm *kvm, unsigned int host_irq, uint32_t guest_irq,
97*4882a593Smuzhiyun bool set);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #endif /* __KVM_X86_VMX_POSTED_INTR_H */
100