xref: /OK3568_Linux_fs/kernel/arch/x86/kvm/vmx/evmcs.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun #include <linux/errno.h>
4*4882a593Smuzhiyun #include <linux/smp.h>
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include "../hyperv.h"
7*4882a593Smuzhiyun #include "../cpuid.h"
8*4882a593Smuzhiyun #include "evmcs.h"
9*4882a593Smuzhiyun #include "vmcs.h"
10*4882a593Smuzhiyun #include "vmx.h"
11*4882a593Smuzhiyun #include "trace.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun DEFINE_STATIC_KEY_FALSE(enable_evmcs);
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_HYPERV)
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))))
18*4882a593Smuzhiyun #define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x)
19*4882a593Smuzhiyun #define EVMCS1_FIELD(number, name, clean_field)[ROL16(number, 6)] = \
20*4882a593Smuzhiyun 		{EVMCS1_OFFSET(name), clean_field}
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun const struct evmcs_field vmcs_field_to_evmcs_1[] = {
23*4882a593Smuzhiyun 	/* 64 bit rw */
24*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_RIP, guest_rip,
25*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
26*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_RSP, guest_rsp,
27*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC),
28*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_RFLAGS, guest_rflags,
29*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC),
30*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IA32_PAT, host_ia32_pat,
31*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
32*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IA32_EFER, host_ia32_efer,
33*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
34*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_CR0, host_cr0,
35*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
36*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_CR3, host_cr3,
37*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
38*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_CR4, host_cr4,
39*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
40*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IA32_SYSENTER_ESP, host_ia32_sysenter_esp,
41*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
42*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IA32_SYSENTER_EIP, host_ia32_sysenter_eip,
43*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
44*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_RIP, host_rip,
45*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
46*4882a593Smuzhiyun 	EVMCS1_FIELD(IO_BITMAP_A, io_bitmap_a,
47*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP),
48*4882a593Smuzhiyun 	EVMCS1_FIELD(IO_BITMAP_B, io_bitmap_b,
49*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP),
50*4882a593Smuzhiyun 	EVMCS1_FIELD(MSR_BITMAP, msr_bitmap,
51*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_MSR_BITMAP),
52*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_ES_BASE, guest_es_base,
53*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
54*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CS_BASE, guest_cs_base,
55*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
56*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SS_BASE, guest_ss_base,
57*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
58*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_DS_BASE, guest_ds_base,
59*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
60*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_FS_BASE, guest_fs_base,
61*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
62*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GS_BASE, guest_gs_base,
63*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
64*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_LDTR_BASE, guest_ldtr_base,
65*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
66*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_TR_BASE, guest_tr_base,
67*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
68*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GDTR_BASE, guest_gdtr_base,
69*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
70*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_IDTR_BASE, guest_idtr_base,
71*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
72*4882a593Smuzhiyun 	EVMCS1_FIELD(TSC_OFFSET, tsc_offset,
73*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2),
74*4882a593Smuzhiyun 	EVMCS1_FIELD(VIRTUAL_APIC_PAGE_ADDR, virtual_apic_page_addr,
75*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2),
76*4882a593Smuzhiyun 	EVMCS1_FIELD(VMCS_LINK_POINTER, vmcs_link_pointer,
77*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
78*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_IA32_DEBUGCTL, guest_ia32_debugctl,
79*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
80*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_IA32_PAT, guest_ia32_pat,
81*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
82*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_IA32_EFER, guest_ia32_efer,
83*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
84*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PDPTR0, guest_pdptr0,
85*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
86*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PDPTR1, guest_pdptr1,
87*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
88*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PDPTR2, guest_pdptr2,
89*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
90*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PDPTR3, guest_pdptr3,
91*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
92*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PENDING_DBG_EXCEPTIONS, guest_pending_dbg_exceptions,
93*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
94*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SYSENTER_ESP, guest_sysenter_esp,
95*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
96*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SYSENTER_EIP, guest_sysenter_eip,
97*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
98*4882a593Smuzhiyun 	EVMCS1_FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask,
99*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
100*4882a593Smuzhiyun 	EVMCS1_FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask,
101*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
102*4882a593Smuzhiyun 	EVMCS1_FIELD(CR0_READ_SHADOW, cr0_read_shadow,
103*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
104*4882a593Smuzhiyun 	EVMCS1_FIELD(CR4_READ_SHADOW, cr4_read_shadow,
105*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
106*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CR0, guest_cr0,
107*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
108*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CR3, guest_cr3,
109*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
110*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CR4, guest_cr4,
111*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
112*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_DR7, guest_dr7,
113*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR),
114*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_FS_BASE, host_fs_base,
115*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
116*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_GS_BASE, host_gs_base,
117*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
118*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_TR_BASE, host_tr_base,
119*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
120*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_GDTR_BASE, host_gdtr_base,
121*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
122*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IDTR_BASE, host_idtr_base,
123*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
124*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_RSP, host_rsp,
125*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER),
126*4882a593Smuzhiyun 	EVMCS1_FIELD(EPT_POINTER, ept_pointer,
127*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT),
128*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_BNDCFGS, guest_bndcfgs,
129*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
130*4882a593Smuzhiyun 	EVMCS1_FIELD(XSS_EXIT_BITMAP, xss_exit_bitmap,
131*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2),
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	/* 64 bit read only */
134*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_PHYSICAL_ADDRESS, guest_physical_address,
135*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
136*4882a593Smuzhiyun 	EVMCS1_FIELD(EXIT_QUALIFICATION, exit_qualification,
137*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
138*4882a593Smuzhiyun 	/*
139*4882a593Smuzhiyun 	 * Not defined in KVM:
140*4882a593Smuzhiyun 	 *
141*4882a593Smuzhiyun 	 * EVMCS1_FIELD(0x00006402, exit_io_instruction_ecx,
142*4882a593Smuzhiyun 	 *		HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE);
143*4882a593Smuzhiyun 	 * EVMCS1_FIELD(0x00006404, exit_io_instruction_esi,
144*4882a593Smuzhiyun 	 *		HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE);
145*4882a593Smuzhiyun 	 * EVMCS1_FIELD(0x00006406, exit_io_instruction_esi,
146*4882a593Smuzhiyun 	 *		HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE);
147*4882a593Smuzhiyun 	 * EVMCS1_FIELD(0x00006408, exit_io_instruction_eip,
148*4882a593Smuzhiyun 	 *		HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE);
149*4882a593Smuzhiyun 	 */
150*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_LINEAR_ADDRESS, guest_linear_address,
151*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	/*
154*4882a593Smuzhiyun 	 * No mask defined in the spec as Hyper-V doesn't currently support
155*4882a593Smuzhiyun 	 * these. Future proof by resetting the whole clean field mask on
156*4882a593Smuzhiyun 	 * access.
157*4882a593Smuzhiyun 	 */
158*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_MSR_STORE_ADDR, vm_exit_msr_store_addr,
159*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
160*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_MSR_LOAD_ADDR, vm_exit_msr_load_addr,
161*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
162*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_MSR_LOAD_ADDR, vm_entry_msr_load_addr,
163*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* 32 bit rw */
166*4882a593Smuzhiyun 	EVMCS1_FIELD(TPR_THRESHOLD, tpr_threshold,
167*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
168*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_INTERRUPTIBILITY_INFO, guest_interruptibility_info,
169*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC),
170*4882a593Smuzhiyun 	EVMCS1_FIELD(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control,
171*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_PROC),
172*4882a593Smuzhiyun 	EVMCS1_FIELD(EXCEPTION_BITMAP, exception_bitmap,
173*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EXCPN),
174*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_CONTROLS, vm_entry_controls,
175*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_ENTRY),
176*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_INTR_INFO_FIELD, vm_entry_intr_info_field,
177*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT),
178*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_EXCEPTION_ERROR_CODE,
179*4882a593Smuzhiyun 		     vm_entry_exception_error_code,
180*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT),
181*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_INSTRUCTION_LEN, vm_entry_instruction_len,
182*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT),
183*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs,
184*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
185*4882a593Smuzhiyun 	EVMCS1_FIELD(PIN_BASED_VM_EXEC_CONTROL, pin_based_vm_exec_control,
186*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1),
187*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_CONTROLS, vm_exit_controls,
188*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1),
189*4882a593Smuzhiyun 	EVMCS1_FIELD(SECONDARY_VM_EXEC_CONTROL, secondary_vm_exec_control,
190*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1),
191*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_ES_LIMIT, guest_es_limit,
192*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
193*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CS_LIMIT, guest_cs_limit,
194*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
195*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SS_LIMIT, guest_ss_limit,
196*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
197*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_DS_LIMIT, guest_ds_limit,
198*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
199*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_FS_LIMIT, guest_fs_limit,
200*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
201*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GS_LIMIT, guest_gs_limit,
202*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
203*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_LDTR_LIMIT, guest_ldtr_limit,
204*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
205*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_TR_LIMIT, guest_tr_limit,
206*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
207*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GDTR_LIMIT, guest_gdtr_limit,
208*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
209*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_IDTR_LIMIT, guest_idtr_limit,
210*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
211*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_ES_AR_BYTES, guest_es_ar_bytes,
212*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
213*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CS_AR_BYTES, guest_cs_ar_bytes,
214*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
215*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SS_AR_BYTES, guest_ss_ar_bytes,
216*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
217*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_DS_AR_BYTES, guest_ds_ar_bytes,
218*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
219*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_FS_AR_BYTES, guest_fs_ar_bytes,
220*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
221*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GS_AR_BYTES, guest_gs_ar_bytes,
222*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
223*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_LDTR_AR_BYTES, guest_ldtr_ar_bytes,
224*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
225*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_TR_AR_BYTES, guest_tr_ar_bytes,
226*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
227*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_ACTIVITY_STATE, guest_activity_state,
228*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
229*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs,
230*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1),
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	/* 32 bit read only */
233*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_INSTRUCTION_ERROR, vm_instruction_error,
234*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
235*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_REASON, vm_exit_reason,
236*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
237*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_INTR_INFO, vm_exit_intr_info,
238*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
239*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_INTR_ERROR_CODE, vm_exit_intr_error_code,
240*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
241*4882a593Smuzhiyun 	EVMCS1_FIELD(IDT_VECTORING_INFO_FIELD, idt_vectoring_info_field,
242*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
243*4882a593Smuzhiyun 	EVMCS1_FIELD(IDT_VECTORING_ERROR_CODE, idt_vectoring_error_code,
244*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
245*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_INSTRUCTION_LEN, vm_exit_instruction_len,
246*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
247*4882a593Smuzhiyun 	EVMCS1_FIELD(VMX_INSTRUCTION_INFO, vmx_instruction_info,
248*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE),
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	/* No mask defined in the spec (not used) */
251*4882a593Smuzhiyun 	EVMCS1_FIELD(PAGE_FAULT_ERROR_CODE_MASK, page_fault_error_code_mask,
252*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
253*4882a593Smuzhiyun 	EVMCS1_FIELD(PAGE_FAULT_ERROR_CODE_MATCH, page_fault_error_code_match,
254*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
255*4882a593Smuzhiyun 	EVMCS1_FIELD(CR3_TARGET_COUNT, cr3_target_count,
256*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
257*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_MSR_STORE_COUNT, vm_exit_msr_store_count,
258*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
259*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_EXIT_MSR_LOAD_COUNT, vm_exit_msr_load_count,
260*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
261*4882a593Smuzhiyun 	EVMCS1_FIELD(VM_ENTRY_MSR_LOAD_COUNT, vm_entry_msr_load_count,
262*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL),
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* 16 bit rw */
265*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_ES_SELECTOR, host_es_selector,
266*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
267*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_CS_SELECTOR, host_cs_selector,
268*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
269*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_SS_SELECTOR, host_ss_selector,
270*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
271*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_DS_SELECTOR, host_ds_selector,
272*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
273*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_FS_SELECTOR, host_fs_selector,
274*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
275*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_GS_SELECTOR, host_gs_selector,
276*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
277*4882a593Smuzhiyun 	EVMCS1_FIELD(HOST_TR_SELECTOR, host_tr_selector,
278*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1),
279*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_ES_SELECTOR, guest_es_selector,
280*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
281*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_CS_SELECTOR, guest_cs_selector,
282*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
283*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_SS_SELECTOR, guest_ss_selector,
284*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
285*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_DS_SELECTOR, guest_ds_selector,
286*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
287*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_FS_SELECTOR, guest_fs_selector,
288*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
289*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_GS_SELECTOR, guest_gs_selector,
290*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
291*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_LDTR_SELECTOR, guest_ldtr_selector,
292*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
293*4882a593Smuzhiyun 	EVMCS1_FIELD(GUEST_TR_SELECTOR, guest_tr_selector,
294*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2),
295*4882a593Smuzhiyun 	EVMCS1_FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id,
296*4882a593Smuzhiyun 		     HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT),
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun const unsigned int nr_evmcs_1_fields = ARRAY_SIZE(vmcs_field_to_evmcs_1);
299*4882a593Smuzhiyun 
evmcs_sanitize_exec_ctrls(struct vmcs_config * vmcs_conf)300*4882a593Smuzhiyun __init void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL;
303*4882a593Smuzhiyun 	vmcs_conf->cpu_based_2nd_exec_ctrl &= ~EVMCS1_UNSUPPORTED_2NDEXEC;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	vmcs_conf->vmexit_ctrl &= ~EVMCS1_UNSUPPORTED_VMEXIT_CTRL;
306*4882a593Smuzhiyun 	vmcs_conf->vmentry_ctrl &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun #endif
309*4882a593Smuzhiyun 
nested_enlightened_vmentry(struct kvm_vcpu * vcpu,u64 * evmcs_gpa)310*4882a593Smuzhiyun bool nested_enlightened_vmentry(struct kvm_vcpu *vcpu, u64 *evmcs_gpa)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	struct hv_vp_assist_page assist_page;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	*evmcs_gpa = -1ull;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	if (unlikely(!kvm_hv_get_assist_page(vcpu, &assist_page)))
317*4882a593Smuzhiyun 		return false;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	if (unlikely(!assist_page.enlighten_vmentry))
320*4882a593Smuzhiyun 		return false;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	*evmcs_gpa = assist_page.current_nested_vmcs;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	return true;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun 
nested_get_evmcs_version(struct kvm_vcpu * vcpu)327*4882a593Smuzhiyun uint16_t nested_get_evmcs_version(struct kvm_vcpu *vcpu)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	struct vcpu_vmx *vmx = to_vmx(vcpu);
330*4882a593Smuzhiyun 	/*
331*4882a593Smuzhiyun 	 * vmcs_version represents the range of supported Enlightened VMCS
332*4882a593Smuzhiyun 	 * versions: lower 8 bits is the minimal version, higher 8 bits is the
333*4882a593Smuzhiyun 	 * maximum supported version. KVM supports versions from 1 to
334*4882a593Smuzhiyun 	 * KVM_EVMCS_VERSION.
335*4882a593Smuzhiyun 	 */
336*4882a593Smuzhiyun 	if (kvm_cpu_cap_get(X86_FEATURE_VMX) &&
337*4882a593Smuzhiyun 	    vmx->nested.enlightened_vmcs_enabled)
338*4882a593Smuzhiyun 		return (KVM_EVMCS_VERSION << 8) | 1;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun 
nested_evmcs_filter_control_msr(u32 msr_index,u64 * pdata)343*4882a593Smuzhiyun void nested_evmcs_filter_control_msr(u32 msr_index, u64 *pdata)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun 	u32 ctl_low = (u32)*pdata;
346*4882a593Smuzhiyun 	u32 ctl_high = (u32)(*pdata >> 32);
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	/*
349*4882a593Smuzhiyun 	 * Hyper-V 2016 and 2019 try using these features even when eVMCS
350*4882a593Smuzhiyun 	 * is enabled but there are no corresponding fields.
351*4882a593Smuzhiyun 	 */
352*4882a593Smuzhiyun 	switch (msr_index) {
353*4882a593Smuzhiyun 	case MSR_IA32_VMX_EXIT_CTLS:
354*4882a593Smuzhiyun 	case MSR_IA32_VMX_TRUE_EXIT_CTLS:
355*4882a593Smuzhiyun 		ctl_high &= ~EVMCS1_UNSUPPORTED_VMEXIT_CTRL;
356*4882a593Smuzhiyun 		break;
357*4882a593Smuzhiyun 	case MSR_IA32_VMX_ENTRY_CTLS:
358*4882a593Smuzhiyun 	case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
359*4882a593Smuzhiyun 		ctl_high &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL;
360*4882a593Smuzhiyun 		break;
361*4882a593Smuzhiyun 	case MSR_IA32_VMX_PROCBASED_CTLS2:
362*4882a593Smuzhiyun 		ctl_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC;
363*4882a593Smuzhiyun 		break;
364*4882a593Smuzhiyun 	case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
365*4882a593Smuzhiyun 	case MSR_IA32_VMX_PINBASED_CTLS:
366*4882a593Smuzhiyun 		ctl_high &= ~EVMCS1_UNSUPPORTED_PINCTRL;
367*4882a593Smuzhiyun 		break;
368*4882a593Smuzhiyun 	case MSR_IA32_VMX_VMFUNC:
369*4882a593Smuzhiyun 		ctl_low &= ~EVMCS1_UNSUPPORTED_VMFUNC;
370*4882a593Smuzhiyun 		break;
371*4882a593Smuzhiyun 	}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	*pdata = ctl_low | ((u64)ctl_high << 32);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
nested_evmcs_check_controls(struct vmcs12 * vmcs12)376*4882a593Smuzhiyun int nested_evmcs_check_controls(struct vmcs12 *vmcs12)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	int ret = 0;
379*4882a593Smuzhiyun 	u32 unsupp_ctl;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	unsupp_ctl = vmcs12->pin_based_vm_exec_control &
382*4882a593Smuzhiyun 		EVMCS1_UNSUPPORTED_PINCTRL;
383*4882a593Smuzhiyun 	if (unsupp_ctl) {
384*4882a593Smuzhiyun 		trace_kvm_nested_vmenter_failed(
385*4882a593Smuzhiyun 			"eVMCS: unsupported pin-based VM-execution controls",
386*4882a593Smuzhiyun 			unsupp_ctl);
387*4882a593Smuzhiyun 		ret = -EINVAL;
388*4882a593Smuzhiyun 	}
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	unsupp_ctl = vmcs12->secondary_vm_exec_control &
391*4882a593Smuzhiyun 		EVMCS1_UNSUPPORTED_2NDEXEC;
392*4882a593Smuzhiyun 	if (unsupp_ctl) {
393*4882a593Smuzhiyun 		trace_kvm_nested_vmenter_failed(
394*4882a593Smuzhiyun 			"eVMCS: unsupported secondary VM-execution controls",
395*4882a593Smuzhiyun 			unsupp_ctl);
396*4882a593Smuzhiyun 		ret = -EINVAL;
397*4882a593Smuzhiyun 	}
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	unsupp_ctl = vmcs12->vm_exit_controls &
400*4882a593Smuzhiyun 		EVMCS1_UNSUPPORTED_VMEXIT_CTRL;
401*4882a593Smuzhiyun 	if (unsupp_ctl) {
402*4882a593Smuzhiyun 		trace_kvm_nested_vmenter_failed(
403*4882a593Smuzhiyun 			"eVMCS: unsupported VM-exit controls",
404*4882a593Smuzhiyun 			unsupp_ctl);
405*4882a593Smuzhiyun 		ret = -EINVAL;
406*4882a593Smuzhiyun 	}
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	unsupp_ctl = vmcs12->vm_entry_controls &
409*4882a593Smuzhiyun 		EVMCS1_UNSUPPORTED_VMENTRY_CTRL;
410*4882a593Smuzhiyun 	if (unsupp_ctl) {
411*4882a593Smuzhiyun 		trace_kvm_nested_vmenter_failed(
412*4882a593Smuzhiyun 			"eVMCS: unsupported VM-entry controls",
413*4882a593Smuzhiyun 			unsupp_ctl);
414*4882a593Smuzhiyun 		ret = -EINVAL;
415*4882a593Smuzhiyun 	}
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	unsupp_ctl = vmcs12->vm_function_control & EVMCS1_UNSUPPORTED_VMFUNC;
418*4882a593Smuzhiyun 	if (unsupp_ctl) {
419*4882a593Smuzhiyun 		trace_kvm_nested_vmenter_failed(
420*4882a593Smuzhiyun 			"eVMCS: unsupported VM-function controls",
421*4882a593Smuzhiyun 			unsupp_ctl);
422*4882a593Smuzhiyun 		ret = -EINVAL;
423*4882a593Smuzhiyun 	}
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	return ret;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun 
nested_enable_evmcs(struct kvm_vcpu * vcpu,uint16_t * vmcs_version)428*4882a593Smuzhiyun int nested_enable_evmcs(struct kvm_vcpu *vcpu,
429*4882a593Smuzhiyun 			uint16_t *vmcs_version)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	struct vcpu_vmx *vmx = to_vmx(vcpu);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	vmx->nested.enlightened_vmcs_enabled = true;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	if (vmcs_version)
436*4882a593Smuzhiyun 		*vmcs_version = nested_get_evmcs_version(vcpu);
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	return 0;
439*4882a593Smuzhiyun }
440