1*4882a593Smuzhiyun /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* Generic MTRR (Memory Type Range Register) ioctls. 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun Copyright (C) 1997-1999 Richard Gooch 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun This library is free software; you can redistribute it and/or 7*4882a593Smuzhiyun modify it under the terms of the GNU Library General Public 8*4882a593Smuzhiyun License as published by the Free Software Foundation; either 9*4882a593Smuzhiyun version 2 of the License, or (at your option) any later version. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun This library is distributed in the hope that it will be useful, 12*4882a593Smuzhiyun but WITHOUT ANY WARRANTY; without even the implied warranty of 13*4882a593Smuzhiyun MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*4882a593Smuzhiyun Library General Public License for more details. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun You should have received a copy of the GNU Library General Public 17*4882a593Smuzhiyun License along with this library; if not, write to the Free 18*4882a593Smuzhiyun Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun Richard Gooch may be reached by email at rgooch@atnf.csiro.au 21*4882a593Smuzhiyun The postal address is: 22*4882a593Smuzhiyun Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun #ifndef _UAPI_ASM_X86_MTRR_H 25*4882a593Smuzhiyun #define _UAPI_ASM_X86_MTRR_H 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #include <linux/types.h> 28*4882a593Smuzhiyun #include <linux/ioctl.h> 29*4882a593Smuzhiyun #include <linux/errno.h> 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define MTRR_IOCTL_BASE 'M' 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Warning: this structure has a different order from i386 34*4882a593Smuzhiyun on x86-64. The 32bit emulation code takes care of that. 35*4882a593Smuzhiyun But you need to use this for 64bit, otherwise your X server 36*4882a593Smuzhiyun will break. */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifdef __i386__ 39*4882a593Smuzhiyun struct mtrr_sentry { 40*4882a593Smuzhiyun unsigned long base; /* Base address */ 41*4882a593Smuzhiyun unsigned int size; /* Size of region */ 42*4882a593Smuzhiyun unsigned int type; /* Type of region */ 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct mtrr_gentry { 46*4882a593Smuzhiyun unsigned int regnum; /* Register number */ 47*4882a593Smuzhiyun unsigned long base; /* Base address */ 48*4882a593Smuzhiyun unsigned int size; /* Size of region */ 49*4882a593Smuzhiyun unsigned int type; /* Type of region */ 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #else /* __i386__ */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun struct mtrr_sentry { 55*4882a593Smuzhiyun __u64 base; /* Base address */ 56*4882a593Smuzhiyun __u32 size; /* Size of region */ 57*4882a593Smuzhiyun __u32 type; /* Type of region */ 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun struct mtrr_gentry { 61*4882a593Smuzhiyun __u64 base; /* Base address */ 62*4882a593Smuzhiyun __u32 size; /* Size of region */ 63*4882a593Smuzhiyun __u32 regnum; /* Register number */ 64*4882a593Smuzhiyun __u32 type; /* Type of region */ 65*4882a593Smuzhiyun __u32 _pad; /* Unused */ 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #endif /* !__i386__ */ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun struct mtrr_var_range { 71*4882a593Smuzhiyun __u32 base_lo; 72*4882a593Smuzhiyun __u32 base_hi; 73*4882a593Smuzhiyun __u32 mask_lo; 74*4882a593Smuzhiyun __u32 mask_hi; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* In the Intel processor's MTRR interface, the MTRR type is always held in 78*4882a593Smuzhiyun an 8 bit field: */ 79*4882a593Smuzhiyun typedef __u8 mtrr_type; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define MTRR_NUM_FIXED_RANGES 88 82*4882a593Smuzhiyun #define MTRR_MAX_VAR_RANGES 256 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct mtrr_state_type { 85*4882a593Smuzhiyun struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES]; 86*4882a593Smuzhiyun mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES]; 87*4882a593Smuzhiyun unsigned char enabled; 88*4882a593Smuzhiyun unsigned char have_fixed; 89*4882a593Smuzhiyun mtrr_type def_type; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) 93*4882a593Smuzhiyun #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* These are the various ioctls */ 96*4882a593Smuzhiyun #define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry) 97*4882a593Smuzhiyun #define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry) 98*4882a593Smuzhiyun #define MTRRIOC_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry) 99*4882a593Smuzhiyun #define MTRRIOC_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry) 100*4882a593Smuzhiyun #define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry) 101*4882a593Smuzhiyun #define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry) 102*4882a593Smuzhiyun #define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry) 103*4882a593Smuzhiyun #define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry) 104*4882a593Smuzhiyun #define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry) 105*4882a593Smuzhiyun #define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry) 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* MTRR memory types, which are defined in SDM */ 108*4882a593Smuzhiyun #define MTRR_TYPE_UNCACHABLE 0 109*4882a593Smuzhiyun #define MTRR_TYPE_WRCOMB 1 110*4882a593Smuzhiyun /*#define MTRR_TYPE_ 2*/ 111*4882a593Smuzhiyun /*#define MTRR_TYPE_ 3*/ 112*4882a593Smuzhiyun #define MTRR_TYPE_WRTHROUGH 4 113*4882a593Smuzhiyun #define MTRR_TYPE_WRPROT 5 114*4882a593Smuzhiyun #define MTRR_TYPE_WRBACK 6 115*4882a593Smuzhiyun #define MTRR_NUM_TYPES 7 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* 118*4882a593Smuzhiyun * Invalid MTRR memory type. mtrr_type_lookup() returns this value when 119*4882a593Smuzhiyun * MTRRs are disabled. Note, this value is allocated from the reserved 120*4882a593Smuzhiyun * values (0x7-0xff) of the MTRR memory types. 121*4882a593Smuzhiyun */ 122*4882a593Smuzhiyun #define MTRR_TYPE_INVALID 0xff 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #endif /* _UAPI_ASM_X86_MTRR_H */ 125