1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef _UAPI_ASM_X86_KVM_PARA_H 3*4882a593Smuzhiyun #define _UAPI_ASM_X86_KVM_PARA_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/types.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It 8*4882a593Smuzhiyun * should be used to determine that a VM is running under KVM. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #define KVM_CPUID_SIGNATURE 0x40000000 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* This CPUID returns two feature bitmaps in eax, edx. Before enabling 13*4882a593Smuzhiyun * a particular paravirtualization, the appropriate feature bit should 14*4882a593Smuzhiyun * be checked in eax. The performance hint feature bit should be checked 15*4882a593Smuzhiyun * in edx. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun #define KVM_CPUID_FEATURES 0x40000001 18*4882a593Smuzhiyun #define KVM_FEATURE_CLOCKSOURCE 0 19*4882a593Smuzhiyun #define KVM_FEATURE_NOP_IO_DELAY 1 20*4882a593Smuzhiyun #define KVM_FEATURE_MMU_OP 2 21*4882a593Smuzhiyun /* This indicates that the new set of kvmclock msrs 22*4882a593Smuzhiyun * are available. The use of 0x11 and 0x12 is deprecated 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun #define KVM_FEATURE_CLOCKSOURCE2 3 25*4882a593Smuzhiyun #define KVM_FEATURE_ASYNC_PF 4 26*4882a593Smuzhiyun #define KVM_FEATURE_STEAL_TIME 5 27*4882a593Smuzhiyun #define KVM_FEATURE_PV_EOI 6 28*4882a593Smuzhiyun #define KVM_FEATURE_PV_UNHALT 7 29*4882a593Smuzhiyun #define KVM_FEATURE_PV_TLB_FLUSH 9 30*4882a593Smuzhiyun #define KVM_FEATURE_ASYNC_PF_VMEXIT 10 31*4882a593Smuzhiyun #define KVM_FEATURE_PV_SEND_IPI 11 32*4882a593Smuzhiyun #define KVM_FEATURE_POLL_CONTROL 12 33*4882a593Smuzhiyun #define KVM_FEATURE_PV_SCHED_YIELD 13 34*4882a593Smuzhiyun #define KVM_FEATURE_ASYNC_PF_INT 14 35*4882a593Smuzhiyun #define KVM_FEATURE_MSI_EXT_DEST_ID 15 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define KVM_HINTS_REALTIME 0 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* The last 8 bits are used to indicate how to interpret the flags field 40*4882a593Smuzhiyun * in pvclock structure. If no bits are set, all flags are ignored. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define MSR_KVM_WALL_CLOCK 0x11 45*4882a593Smuzhiyun #define MSR_KVM_SYSTEM_TIME 0x12 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define KVM_MSR_ENABLED 1 48*4882a593Smuzhiyun /* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */ 49*4882a593Smuzhiyun #define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00 50*4882a593Smuzhiyun #define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01 51*4882a593Smuzhiyun #define MSR_KVM_ASYNC_PF_EN 0x4b564d02 52*4882a593Smuzhiyun #define MSR_KVM_STEAL_TIME 0x4b564d03 53*4882a593Smuzhiyun #define MSR_KVM_PV_EOI_EN 0x4b564d04 54*4882a593Smuzhiyun #define MSR_KVM_POLL_CONTROL 0x4b564d05 55*4882a593Smuzhiyun #define MSR_KVM_ASYNC_PF_INT 0x4b564d06 56*4882a593Smuzhiyun #define MSR_KVM_ASYNC_PF_ACK 0x4b564d07 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct kvm_steal_time { 59*4882a593Smuzhiyun __u64 steal; 60*4882a593Smuzhiyun __u32 version; 61*4882a593Smuzhiyun __u32 flags; 62*4882a593Smuzhiyun __u8 preempted; 63*4882a593Smuzhiyun __u8 u8_pad[3]; 64*4882a593Smuzhiyun __u32 pad[11]; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define KVM_VCPU_PREEMPTED (1 << 0) 68*4882a593Smuzhiyun #define KVM_VCPU_FLUSH_TLB (1 << 1) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define KVM_CLOCK_PAIRING_WALLCLOCK 0 71*4882a593Smuzhiyun struct kvm_clock_pairing { 72*4882a593Smuzhiyun __s64 sec; 73*4882a593Smuzhiyun __s64 nsec; 74*4882a593Smuzhiyun __u64 tsc; 75*4882a593Smuzhiyun __u32 flags; 76*4882a593Smuzhiyun __u32 pad[9]; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define KVM_STEAL_ALIGNMENT_BITS 5 80*4882a593Smuzhiyun #define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1))) 81*4882a593Smuzhiyun #define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define KVM_MAX_MMU_OP_BATCH 32 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #define KVM_ASYNC_PF_ENABLED (1 << 0) 86*4882a593Smuzhiyun #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1) 87*4882a593Smuzhiyun #define KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT (1 << 2) 88*4882a593Smuzhiyun #define KVM_ASYNC_PF_DELIVERY_AS_INT (1 << 3) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* MSR_KVM_ASYNC_PF_INT */ 91*4882a593Smuzhiyun #define KVM_ASYNC_PF_VEC_MASK GENMASK(7, 0) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* Operations for KVM_HC_MMU_OP */ 95*4882a593Smuzhiyun #define KVM_MMU_OP_WRITE_PTE 1 96*4882a593Smuzhiyun #define KVM_MMU_OP_FLUSH_TLB 2 97*4882a593Smuzhiyun #define KVM_MMU_OP_RELEASE_PT 3 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* Payload for KVM_HC_MMU_OP */ 100*4882a593Smuzhiyun struct kvm_mmu_op_header { 101*4882a593Smuzhiyun __u32 op; 102*4882a593Smuzhiyun __u32 pad; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun struct kvm_mmu_op_write_pte { 106*4882a593Smuzhiyun struct kvm_mmu_op_header header; 107*4882a593Smuzhiyun __u64 pte_phys; 108*4882a593Smuzhiyun __u64 pte_val; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun struct kvm_mmu_op_flush_tlb { 112*4882a593Smuzhiyun struct kvm_mmu_op_header header; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun struct kvm_mmu_op_release_pt { 116*4882a593Smuzhiyun struct kvm_mmu_op_header header; 117*4882a593Smuzhiyun __u64 pt_phys; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define KVM_PV_REASON_PAGE_NOT_PRESENT 1 121*4882a593Smuzhiyun #define KVM_PV_REASON_PAGE_READY 2 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun struct kvm_vcpu_pv_apf_data { 124*4882a593Smuzhiyun /* Used for 'page not present' events delivered via #PF */ 125*4882a593Smuzhiyun __u32 flags; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* Used for 'page ready' events delivered via interrupt notification */ 128*4882a593Smuzhiyun __u32 token; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun __u8 pad[56]; 131*4882a593Smuzhiyun __u32 enabled; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define KVM_PV_EOI_BIT 0 135*4882a593Smuzhiyun #define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT) 136*4882a593Smuzhiyun #define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK 137*4882a593Smuzhiyun #define KVM_PV_EOI_DISABLED 0x0 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #endif /* _UAPI_ASM_X86_KVM_PARA_H */ 140