1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /****************************************************************************** 3*4882a593Smuzhiyun * arch-x86_32.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Guest OS interface to x86 32-bit Xen. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2004, K A Fraser 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _ASM_X86_XEN_INTERFACE_32_H 11*4882a593Smuzhiyun #define _ASM_X86_XEN_INTERFACE_32_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* 15*4882a593Smuzhiyun * These flat segments are in the Xen-private section of every GDT. Since these 16*4882a593Smuzhiyun * are also present in the initial GDT, many OSes will be able to avoid 17*4882a593Smuzhiyun * installing their own GDT. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ 20*4882a593Smuzhiyun #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ 21*4882a593Smuzhiyun #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ 22*4882a593Smuzhiyun #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ 23*4882a593Smuzhiyun #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ 24*4882a593Smuzhiyun #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define FLAT_KERNEL_CS FLAT_RING1_CS 27*4882a593Smuzhiyun #define FLAT_KERNEL_DS FLAT_RING1_DS 28*4882a593Smuzhiyun #define FLAT_KERNEL_SS FLAT_RING1_SS 29*4882a593Smuzhiyun #define FLAT_USER_CS FLAT_RING3_CS 30*4882a593Smuzhiyun #define FLAT_USER_DS FLAT_RING3_DS 31*4882a593Smuzhiyun #define FLAT_USER_SS FLAT_RING3_SS 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* And the trap vector is... */ 34*4882a593Smuzhiyun #define TRAP_INSTR "int $0x82" 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define __MACH2PHYS_VIRT_START 0xF5800000 37*4882a593Smuzhiyun #define __MACH2PHYS_VIRT_END 0xF6800000 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define __MACH2PHYS_SHIFT 2 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * Virtual addresses beyond this are not modifiable by guest OSes. The 43*4882a593Smuzhiyun * machine->physical mapping table starts at this address, read-only. 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun #define __HYPERVISOR_VIRT_START 0xF5800000 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun struct cpu_user_regs { 50*4882a593Smuzhiyun uint32_t ebx; 51*4882a593Smuzhiyun uint32_t ecx; 52*4882a593Smuzhiyun uint32_t edx; 53*4882a593Smuzhiyun uint32_t esi; 54*4882a593Smuzhiyun uint32_t edi; 55*4882a593Smuzhiyun uint32_t ebp; 56*4882a593Smuzhiyun uint32_t eax; 57*4882a593Smuzhiyun uint16_t error_code; /* private */ 58*4882a593Smuzhiyun uint16_t entry_vector; /* private */ 59*4882a593Smuzhiyun uint32_t eip; 60*4882a593Smuzhiyun uint16_t cs; 61*4882a593Smuzhiyun uint8_t saved_upcall_mask; 62*4882a593Smuzhiyun uint8_t _pad0; 63*4882a593Smuzhiyun uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ 64*4882a593Smuzhiyun uint32_t esp; 65*4882a593Smuzhiyun uint16_t ss, _pad1; 66*4882a593Smuzhiyun uint16_t es, _pad2; 67*4882a593Smuzhiyun uint16_t ds, _pad3; 68*4882a593Smuzhiyun uint16_t fs, _pad4; 69*4882a593Smuzhiyun uint16_t gs, _pad5; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun struct arch_vcpu_info { 76*4882a593Smuzhiyun unsigned long cr2; 77*4882a593Smuzhiyun unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun struct xen_callback { 81*4882a593Smuzhiyun unsigned long cs; 82*4882a593Smuzhiyun unsigned long eip; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun typedef struct xen_callback xen_callback_t; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define XEN_CALLBACK(__cs, __eip) \ 87*4882a593Smuzhiyun ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) }) 88*4882a593Smuzhiyun #endif /* !__ASSEMBLY__ */ 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* 92*4882a593Smuzhiyun * Page-directory addresses above 4GB do not fit into architectural %cr3. 93*4882a593Smuzhiyun * When accessing %cr3, or equivalent field in vcpu_guest_context, guests 94*4882a593Smuzhiyun * must use the following accessor macros to pack/unpack valid MFNs. 95*4882a593Smuzhiyun * 96*4882a593Smuzhiyun * Note that Xen is using the fact that the pagetable base is always 97*4882a593Smuzhiyun * page-aligned, and putting the 12 MSB of the address into the 12 LSB 98*4882a593Smuzhiyun * of cr3. 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) 101*4882a593Smuzhiyun #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #endif /* _ASM_X86_XEN_INTERFACE_32_H */ 104