1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _ASM_X86_PLATFORM_H 3*4882a593Smuzhiyun #define _ASM_X86_PLATFORM_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <asm/bootparam.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun struct ghcb; 8*4882a593Smuzhiyun struct mpc_bus; 9*4882a593Smuzhiyun struct mpc_cpu; 10*4882a593Smuzhiyun struct pt_regs; 11*4882a593Smuzhiyun struct mpc_table; 12*4882a593Smuzhiyun struct cpuinfo_x86; 13*4882a593Smuzhiyun struct irq_domain; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /** 16*4882a593Smuzhiyun * struct x86_init_mpparse - platform specific mpparse ops 17*4882a593Smuzhiyun * @setup_ioapic_ids: platform specific ioapic id override 18*4882a593Smuzhiyun * @find_smp_config: find the smp configuration 19*4882a593Smuzhiyun * @get_smp_config: get the smp configuration 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun struct x86_init_mpparse { 22*4882a593Smuzhiyun void (*setup_ioapic_ids)(void); 23*4882a593Smuzhiyun void (*find_smp_config)(void); 24*4882a593Smuzhiyun void (*get_smp_config)(unsigned int early); 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /** 28*4882a593Smuzhiyun * struct x86_init_resources - platform specific resource related ops 29*4882a593Smuzhiyun * @probe_roms: probe BIOS roms 30*4882a593Smuzhiyun * @reserve_resources: reserve the standard resources for the 31*4882a593Smuzhiyun * platform 32*4882a593Smuzhiyun * @memory_setup: platform specific memory setup 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun struct x86_init_resources { 36*4882a593Smuzhiyun void (*probe_roms)(void); 37*4882a593Smuzhiyun void (*reserve_resources)(void); 38*4882a593Smuzhiyun char *(*memory_setup)(void); 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /** 42*4882a593Smuzhiyun * struct x86_init_irqs - platform specific interrupt setup 43*4882a593Smuzhiyun * @pre_vector_init: init code to run before interrupt vectors 44*4882a593Smuzhiyun * are set up. 45*4882a593Smuzhiyun * @intr_init: interrupt init code 46*4882a593Smuzhiyun * @intr_mode_select: interrupt delivery mode selection 47*4882a593Smuzhiyun * @intr_mode_init: interrupt delivery mode setup 48*4882a593Smuzhiyun * @create_pci_msi_domain: Create the PCI/MSI interrupt domain 49*4882a593Smuzhiyun */ 50*4882a593Smuzhiyun struct x86_init_irqs { 51*4882a593Smuzhiyun void (*pre_vector_init)(void); 52*4882a593Smuzhiyun void (*intr_init)(void); 53*4882a593Smuzhiyun void (*intr_mode_select)(void); 54*4882a593Smuzhiyun void (*intr_mode_init)(void); 55*4882a593Smuzhiyun struct irq_domain *(*create_pci_msi_domain)(void); 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /** 59*4882a593Smuzhiyun * struct x86_init_oem - oem platform specific customizing functions 60*4882a593Smuzhiyun * @arch_setup: platform specific architecture setup 61*4882a593Smuzhiyun * @banner: print a platform specific banner 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun struct x86_init_oem { 64*4882a593Smuzhiyun void (*arch_setup)(void); 65*4882a593Smuzhiyun void (*banner)(void); 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /** 69*4882a593Smuzhiyun * struct x86_init_paging - platform specific paging functions 70*4882a593Smuzhiyun * @pagetable_init: platform specific paging initialization call to setup 71*4882a593Smuzhiyun * the kernel pagetables and prepare accessors functions. 72*4882a593Smuzhiyun * Callback must call paging_init(). Called once after the 73*4882a593Smuzhiyun * direct mapping for phys memory is available. 74*4882a593Smuzhiyun */ 75*4882a593Smuzhiyun struct x86_init_paging { 76*4882a593Smuzhiyun void (*pagetable_init)(void); 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /** 80*4882a593Smuzhiyun * struct x86_init_timers - platform specific timer setup 81*4882a593Smuzhiyun * @setup_perpcu_clockev: set up the per cpu clock event device for the 82*4882a593Smuzhiyun * boot cpu 83*4882a593Smuzhiyun * @timer_init: initialize the platform timer (default PIT/HPET) 84*4882a593Smuzhiyun * @wallclock_init: init the wallclock device 85*4882a593Smuzhiyun */ 86*4882a593Smuzhiyun struct x86_init_timers { 87*4882a593Smuzhiyun void (*setup_percpu_clockev)(void); 88*4882a593Smuzhiyun void (*timer_init)(void); 89*4882a593Smuzhiyun void (*wallclock_init)(void); 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /** 93*4882a593Smuzhiyun * struct x86_init_iommu - platform specific iommu setup 94*4882a593Smuzhiyun * @iommu_init: platform specific iommu setup 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun struct x86_init_iommu { 97*4882a593Smuzhiyun int (*iommu_init)(void); 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /** 101*4882a593Smuzhiyun * struct x86_init_pci - platform specific pci init functions 102*4882a593Smuzhiyun * @arch_init: platform specific pci arch init call 103*4882a593Smuzhiyun * @init: platform specific pci subsystem init 104*4882a593Smuzhiyun * @init_irq: platform specific pci irq init 105*4882a593Smuzhiyun * @fixup_irqs: platform specific pci irq fixup 106*4882a593Smuzhiyun */ 107*4882a593Smuzhiyun struct x86_init_pci { 108*4882a593Smuzhiyun int (*arch_init)(void); 109*4882a593Smuzhiyun int (*init)(void); 110*4882a593Smuzhiyun void (*init_irq)(void); 111*4882a593Smuzhiyun void (*fixup_irqs)(void); 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /** 115*4882a593Smuzhiyun * struct x86_hyper_init - x86 hypervisor init functions 116*4882a593Smuzhiyun * @init_platform: platform setup 117*4882a593Smuzhiyun * @guest_late_init: guest late init 118*4882a593Smuzhiyun * @x2apic_available: X2APIC detection 119*4882a593Smuzhiyun * @init_mem_mapping: setup early mappings during init_mem_mapping() 120*4882a593Smuzhiyun * @init_after_bootmem: guest init after boot allocator is finished 121*4882a593Smuzhiyun */ 122*4882a593Smuzhiyun struct x86_hyper_init { 123*4882a593Smuzhiyun void (*init_platform)(void); 124*4882a593Smuzhiyun void (*guest_late_init)(void); 125*4882a593Smuzhiyun bool (*x2apic_available)(void); 126*4882a593Smuzhiyun void (*init_mem_mapping)(void); 127*4882a593Smuzhiyun void (*init_after_bootmem)(void); 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /** 131*4882a593Smuzhiyun * struct x86_init_acpi - x86 ACPI init functions 132*4882a593Smuzhiyun * @set_root_poitner: set RSDP address 133*4882a593Smuzhiyun * @get_root_pointer: get RSDP address 134*4882a593Smuzhiyun * @reduced_hw_early_init: hardware reduced platform early init 135*4882a593Smuzhiyun */ 136*4882a593Smuzhiyun struct x86_init_acpi { 137*4882a593Smuzhiyun void (*set_root_pointer)(u64 addr); 138*4882a593Smuzhiyun u64 (*get_root_pointer)(void); 139*4882a593Smuzhiyun void (*reduced_hw_early_init)(void); 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun /** 143*4882a593Smuzhiyun * struct x86_init_ops - functions for platform specific setup 144*4882a593Smuzhiyun * 145*4882a593Smuzhiyun */ 146*4882a593Smuzhiyun struct x86_init_ops { 147*4882a593Smuzhiyun struct x86_init_resources resources; 148*4882a593Smuzhiyun struct x86_init_mpparse mpparse; 149*4882a593Smuzhiyun struct x86_init_irqs irqs; 150*4882a593Smuzhiyun struct x86_init_oem oem; 151*4882a593Smuzhiyun struct x86_init_paging paging; 152*4882a593Smuzhiyun struct x86_init_timers timers; 153*4882a593Smuzhiyun struct x86_init_iommu iommu; 154*4882a593Smuzhiyun struct x86_init_pci pci; 155*4882a593Smuzhiyun struct x86_hyper_init hyper; 156*4882a593Smuzhiyun struct x86_init_acpi acpi; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /** 160*4882a593Smuzhiyun * struct x86_cpuinit_ops - platform specific cpu hotplug setups 161*4882a593Smuzhiyun * @setup_percpu_clockev: set up the per cpu clock event device 162*4882a593Smuzhiyun * @early_percpu_clock_init: early init of the per cpu clock event device 163*4882a593Smuzhiyun */ 164*4882a593Smuzhiyun struct x86_cpuinit_ops { 165*4882a593Smuzhiyun void (*setup_percpu_clockev)(void); 166*4882a593Smuzhiyun void (*early_percpu_clock_init)(void); 167*4882a593Smuzhiyun void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun struct timespec64; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /** 173*4882a593Smuzhiyun * struct x86_legacy_devices - legacy x86 devices 174*4882a593Smuzhiyun * 175*4882a593Smuzhiyun * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform 176*4882a593Smuzhiyun * is known to never have a PNPBIOS. 177*4882a593Smuzhiyun * 178*4882a593Smuzhiyun * These are devices known to require LPC or ISA bus. The definition of legacy 179*4882a593Smuzhiyun * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag 180*4882a593Smuzhiyun * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on 181*4882a593Smuzhiyun * the LPC or ISA bus. User visible devices are devices that have end-user 182*4882a593Smuzhiyun * accessible connectors (for example, LPT parallel port). Legacy devices on 183*4882a593Smuzhiyun * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard 184*4882a593Smuzhiyun * / mouse, and the floppy disk controller. A system that lacks all known 185*4882a593Smuzhiyun * legacy devices can assume all devices can be detected exclusively via 186*4882a593Smuzhiyun * standard device enumeration mechanisms including the ACPI namespace. 187*4882a593Smuzhiyun * 188*4882a593Smuzhiyun * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not 189*4882a593Smuzhiyun * have any of the legacy devices enumerated below present. 190*4882a593Smuzhiyun */ 191*4882a593Smuzhiyun struct x86_legacy_devices { 192*4882a593Smuzhiyun int pnpbios; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun /** 196*4882a593Smuzhiyun * enum x86_legacy_i8042_state - i8042 keyboard controller state 197*4882a593Smuzhiyun * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on 198*4882a593Smuzhiyun * given platform/subarch. 199*4882a593Smuzhiyun * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller 200*4882a593Smuzhiyun * is absent. 201*4882a593Smuzhiyun * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be 202*4882a593Smuzhiyun * present, the i8042 driver should probe for controller existence. 203*4882a593Smuzhiyun */ 204*4882a593Smuzhiyun enum x86_legacy_i8042_state { 205*4882a593Smuzhiyun X86_LEGACY_I8042_PLATFORM_ABSENT, 206*4882a593Smuzhiyun X86_LEGACY_I8042_FIRMWARE_ABSENT, 207*4882a593Smuzhiyun X86_LEGACY_I8042_EXPECTED_PRESENT, 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun /** 211*4882a593Smuzhiyun * struct x86_legacy_features - legacy x86 features 212*4882a593Smuzhiyun * 213*4882a593Smuzhiyun * @i8042: indicated if we expect the device to have i8042 controller 214*4882a593Smuzhiyun * present. 215*4882a593Smuzhiyun * @rtc: this device has a CMOS real-time clock present 216*4882a593Smuzhiyun * @reserve_bios_regions: boot code will search for the EBDA address and the 217*4882a593Smuzhiyun * start of the 640k - 1M BIOS region. If false, the platform must 218*4882a593Smuzhiyun * ensure that its memory map correctly reserves sub-1MB regions as needed. 219*4882a593Smuzhiyun * @devices: legacy x86 devices, refer to struct x86_legacy_devices 220*4882a593Smuzhiyun * documentation for further details. 221*4882a593Smuzhiyun */ 222*4882a593Smuzhiyun struct x86_legacy_features { 223*4882a593Smuzhiyun enum x86_legacy_i8042_state i8042; 224*4882a593Smuzhiyun int rtc; 225*4882a593Smuzhiyun int warm_reset; 226*4882a593Smuzhiyun int no_vga; 227*4882a593Smuzhiyun int reserve_bios_regions; 228*4882a593Smuzhiyun struct x86_legacy_devices devices; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun /** 232*4882a593Smuzhiyun * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks 233*4882a593Smuzhiyun * 234*4882a593Smuzhiyun * @pin_vcpu: pin current vcpu to specified physical 235*4882a593Smuzhiyun * cpu (run rarely) 236*4882a593Smuzhiyun * @sev_es_hcall_prepare: Load additional hypervisor-specific 237*4882a593Smuzhiyun * state into the GHCB when doing a VMMCALL under 238*4882a593Smuzhiyun * SEV-ES. Called from the #VC exception handler. 239*4882a593Smuzhiyun * @sev_es_hcall_finish: Copies state from the GHCB back into the 240*4882a593Smuzhiyun * processor (or pt_regs). Also runs checks on the 241*4882a593Smuzhiyun * state returned from the hypervisor after a 242*4882a593Smuzhiyun * VMMCALL under SEV-ES. Needs to return 'false' 243*4882a593Smuzhiyun * if the checks fail. Called from the #VC 244*4882a593Smuzhiyun * exception handler. 245*4882a593Smuzhiyun */ 246*4882a593Smuzhiyun struct x86_hyper_runtime { 247*4882a593Smuzhiyun void (*pin_vcpu)(int cpu); 248*4882a593Smuzhiyun void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs); 249*4882a593Smuzhiyun bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs); 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun /** 253*4882a593Smuzhiyun * struct x86_platform_ops - platform specific runtime functions 254*4882a593Smuzhiyun * @calibrate_cpu: calibrate CPU 255*4882a593Smuzhiyun * @calibrate_tsc: calibrate TSC, if different from CPU 256*4882a593Smuzhiyun * @get_wallclock: get time from HW clock like RTC etc. 257*4882a593Smuzhiyun * @set_wallclock: set time back to HW clock 258*4882a593Smuzhiyun * @is_untracked_pat_range exclude from PAT logic 259*4882a593Smuzhiyun * @nmi_init enable NMI on cpus 260*4882a593Smuzhiyun * @save_sched_clock_state: save state for sched_clock() on suspend 261*4882a593Smuzhiyun * @restore_sched_clock_state: restore state for sched_clock() on resume 262*4882a593Smuzhiyun * @apic_post_init: adjust apic if needed 263*4882a593Smuzhiyun * @legacy: legacy features 264*4882a593Smuzhiyun * @set_legacy_features: override legacy features. Use of this callback 265*4882a593Smuzhiyun * is highly discouraged. You should only need 266*4882a593Smuzhiyun * this if your hardware platform requires further 267*4882a593Smuzhiyun * custom fine tuning far beyond what may be 268*4882a593Smuzhiyun * possible in x86_early_init_platform_quirks() by 269*4882a593Smuzhiyun * only using the current x86_hardware_subarch 270*4882a593Smuzhiyun * semantics. 271*4882a593Smuzhiyun * @hyper: x86 hypervisor specific runtime callbacks 272*4882a593Smuzhiyun */ 273*4882a593Smuzhiyun struct x86_platform_ops { 274*4882a593Smuzhiyun unsigned long (*calibrate_cpu)(void); 275*4882a593Smuzhiyun unsigned long (*calibrate_tsc)(void); 276*4882a593Smuzhiyun void (*get_wallclock)(struct timespec64 *ts); 277*4882a593Smuzhiyun int (*set_wallclock)(const struct timespec64 *ts); 278*4882a593Smuzhiyun void (*iommu_shutdown)(void); 279*4882a593Smuzhiyun bool (*is_untracked_pat_range)(u64 start, u64 end); 280*4882a593Smuzhiyun void (*nmi_init)(void); 281*4882a593Smuzhiyun unsigned char (*get_nmi_reason)(void); 282*4882a593Smuzhiyun void (*save_sched_clock_state)(void); 283*4882a593Smuzhiyun void (*restore_sched_clock_state)(void); 284*4882a593Smuzhiyun void (*apic_post_init)(void); 285*4882a593Smuzhiyun struct x86_legacy_features legacy; 286*4882a593Smuzhiyun void (*set_legacy_features)(void); 287*4882a593Smuzhiyun struct x86_hyper_runtime hyper; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun struct pci_dev; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun struct x86_msi_ops { 293*4882a593Smuzhiyun void (*restore_msi_irqs)(struct pci_dev *dev); 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun struct x86_apic_ops { 297*4882a593Smuzhiyun unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg); 298*4882a593Smuzhiyun void (*restore)(void); 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun extern struct x86_init_ops x86_init; 302*4882a593Smuzhiyun extern struct x86_cpuinit_ops x86_cpuinit; 303*4882a593Smuzhiyun extern struct x86_platform_ops x86_platform; 304*4882a593Smuzhiyun extern struct x86_msi_ops x86_msi; 305*4882a593Smuzhiyun extern struct x86_apic_ops x86_apic_ops; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun extern void x86_early_init_platform_quirks(void); 308*4882a593Smuzhiyun extern void x86_init_noop(void); 309*4882a593Smuzhiyun extern void x86_init_uint_noop(unsigned int unused); 310*4882a593Smuzhiyun extern bool bool_x86_init_noop(void); 311*4882a593Smuzhiyun extern void x86_op_int_noop(int cpu); 312*4882a593Smuzhiyun extern bool x86_pnpbios_disabled(void); 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun #endif 315