xref: /OK3568_Linux_fs/kernel/arch/x86/include/asm/mtrr.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*  Generic MTRR (Memory Type Range Register) ioctls.
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun     Copyright (C) 1997-1999  Richard Gooch
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun     This library is free software; you can redistribute it and/or
6*4882a593Smuzhiyun     modify it under the terms of the GNU Library General Public
7*4882a593Smuzhiyun     License as published by the Free Software Foundation; either
8*4882a593Smuzhiyun     version 2 of the License, or (at your option) any later version.
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun     This library is distributed in the hope that it will be useful,
11*4882a593Smuzhiyun     but WITHOUT ANY WARRANTY; without even the implied warranty of
12*4882a593Smuzhiyun     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13*4882a593Smuzhiyun     Library General Public License for more details.
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun     You should have received a copy of the GNU Library General Public
16*4882a593Smuzhiyun     License along with this library; if not, write to the Free
17*4882a593Smuzhiyun     Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun     Richard Gooch may be reached by email at  rgooch@atnf.csiro.au
20*4882a593Smuzhiyun     The postal address is:
21*4882a593Smuzhiyun       Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun #ifndef _ASM_X86_MTRR_H
24*4882a593Smuzhiyun #define _ASM_X86_MTRR_H
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <uapi/asm/mtrr.h>
27*4882a593Smuzhiyun #include <asm/memtype.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun  * The following functions are for use by other drivers that cannot use
32*4882a593Smuzhiyun  * arch_phys_wc_add and arch_phys_wc_del.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun # ifdef CONFIG_MTRR
35*4882a593Smuzhiyun extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
36*4882a593Smuzhiyun extern void mtrr_save_fixed_ranges(void *);
37*4882a593Smuzhiyun extern void mtrr_save_state(void);
38*4882a593Smuzhiyun extern int mtrr_add(unsigned long base, unsigned long size,
39*4882a593Smuzhiyun 		    unsigned int type, bool increment);
40*4882a593Smuzhiyun extern int mtrr_add_page(unsigned long base, unsigned long size,
41*4882a593Smuzhiyun 			 unsigned int type, bool increment);
42*4882a593Smuzhiyun extern int mtrr_del(int reg, unsigned long base, unsigned long size);
43*4882a593Smuzhiyun extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
44*4882a593Smuzhiyun extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
45*4882a593Smuzhiyun extern void mtrr_ap_init(void);
46*4882a593Smuzhiyun extern void mtrr_bp_init(void);
47*4882a593Smuzhiyun extern void set_mtrr_aps_delayed_init(void);
48*4882a593Smuzhiyun extern void mtrr_aps_init(void);
49*4882a593Smuzhiyun extern void mtrr_bp_restore(void);
50*4882a593Smuzhiyun extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
51*4882a593Smuzhiyun extern int amd_special_default_mtrr(void);
52*4882a593Smuzhiyun #  else
mtrr_type_lookup(u64 addr,u64 end,u8 * uniform)53*4882a593Smuzhiyun static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	/*
56*4882a593Smuzhiyun 	 * Return no-MTRRs:
57*4882a593Smuzhiyun 	 */
58*4882a593Smuzhiyun 	return MTRR_TYPE_INVALID;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun #define mtrr_save_fixed_ranges(arg) do {} while (0)
61*4882a593Smuzhiyun #define mtrr_save_state() do {} while (0)
mtrr_add(unsigned long base,unsigned long size,unsigned int type,bool increment)62*4882a593Smuzhiyun static inline int mtrr_add(unsigned long base, unsigned long size,
63*4882a593Smuzhiyun 			   unsigned int type, bool increment)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun     return -ENODEV;
66*4882a593Smuzhiyun }
mtrr_add_page(unsigned long base,unsigned long size,unsigned int type,bool increment)67*4882a593Smuzhiyun static inline int mtrr_add_page(unsigned long base, unsigned long size,
68*4882a593Smuzhiyun 				unsigned int type, bool increment)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun     return -ENODEV;
71*4882a593Smuzhiyun }
mtrr_del(int reg,unsigned long base,unsigned long size)72*4882a593Smuzhiyun static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun     return -ENODEV;
75*4882a593Smuzhiyun }
mtrr_del_page(int reg,unsigned long base,unsigned long size)76*4882a593Smuzhiyun static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun     return -ENODEV;
79*4882a593Smuzhiyun }
mtrr_trim_uncached_memory(unsigned long end_pfn)80*4882a593Smuzhiyun static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	return 0;
83*4882a593Smuzhiyun }
mtrr_centaur_report_mcr(int mcr,u32 lo,u32 hi)84*4882a593Smuzhiyun static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun }
mtrr_bp_init(void)87*4882a593Smuzhiyun static inline void mtrr_bp_init(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	pat_disable("PAT support disabled because CONFIG_MTRR is disabled in the kernel.");
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define mtrr_ap_init() do {} while (0)
93*4882a593Smuzhiyun #define set_mtrr_aps_delayed_init() do {} while (0)
94*4882a593Smuzhiyun #define mtrr_aps_init() do {} while (0)
95*4882a593Smuzhiyun #define mtrr_bp_restore() do {} while (0)
96*4882a593Smuzhiyun #  endif
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
99*4882a593Smuzhiyun #include <linux/compat.h>
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct mtrr_sentry32 {
102*4882a593Smuzhiyun     compat_ulong_t base;    /*  Base address     */
103*4882a593Smuzhiyun     compat_uint_t size;    /*  Size of region   */
104*4882a593Smuzhiyun     compat_uint_t type;     /*  Type of region   */
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun struct mtrr_gentry32 {
108*4882a593Smuzhiyun     compat_ulong_t regnum;   /*  Register number  */
109*4882a593Smuzhiyun     compat_uint_t base;    /*  Base address     */
110*4882a593Smuzhiyun     compat_uint_t size;    /*  Size of region   */
111*4882a593Smuzhiyun     compat_uint_t type;     /*  Type of region   */
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define MTRR_IOCTL_BASE 'M'
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define MTRRIOC32_ADD_ENTRY      _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry32)
117*4882a593Smuzhiyun #define MTRRIOC32_SET_ENTRY      _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry32)
118*4882a593Smuzhiyun #define MTRRIOC32_DEL_ENTRY      _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry32)
119*4882a593Smuzhiyun #define MTRRIOC32_GET_ENTRY      _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
120*4882a593Smuzhiyun #define MTRRIOC32_KILL_ENTRY     _IOW(MTRR_IOCTL_BASE,  4, struct mtrr_sentry32)
121*4882a593Smuzhiyun #define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  5, struct mtrr_sentry32)
122*4882a593Smuzhiyun #define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  6, struct mtrr_sentry32)
123*4882a593Smuzhiyun #define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  7, struct mtrr_sentry32)
124*4882a593Smuzhiyun #define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
125*4882a593Smuzhiyun #define MTRRIOC32_KILL_PAGE_ENTRY		\
126*4882a593Smuzhiyun 				 _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry32)
127*4882a593Smuzhiyun #endif /* CONFIG_COMPAT */
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun /* Bit fields for enabled in struct mtrr_state_type */
130*4882a593Smuzhiyun #define MTRR_STATE_MTRR_FIXED_ENABLED	0x01
131*4882a593Smuzhiyun #define MTRR_STATE_MTRR_ENABLED		0x02
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun #endif /* _ASM_X86_MTRR_H */
134