xref: /OK3568_Linux_fs/kernel/arch/x86/include/asm/fpu/xcr.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _ASM_X86_FPU_XCR_H
3*4882a593Smuzhiyun #define _ASM_X86_FPU_XCR_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun  * MXCSR and XCR definitions:
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
ldmxcsr(u32 mxcsr)9*4882a593Smuzhiyun static inline void ldmxcsr(u32 mxcsr)
10*4882a593Smuzhiyun {
11*4882a593Smuzhiyun 	asm volatile("ldmxcsr %0" :: "m" (mxcsr));
12*4882a593Smuzhiyun }
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun extern unsigned int mxcsr_feature_mask;
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define XCR_XFEATURE_ENABLED_MASK	0x00000000
17*4882a593Smuzhiyun 
xgetbv(u32 index)18*4882a593Smuzhiyun static inline u64 xgetbv(u32 index)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	u32 eax, edx;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (index));
23*4882a593Smuzhiyun 	return eax + ((u64)edx << 32);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun 
xsetbv(u32 index,u64 value)26*4882a593Smuzhiyun static inline void xsetbv(u32 index, u64 value)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	u32 eax = value;
29*4882a593Smuzhiyun 	u32 edx = value >> 32;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #endif /* _ASM_X86_FPU_XCR_H */
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