xref: /OK3568_Linux_fs/kernel/arch/x86/include/asm/fpu/api.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 1994 Linus Torvalds
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Pentium III FXSR, SSE support
6*4882a593Smuzhiyun  * General FPU state handling cleanups
7*4882a593Smuzhiyun  *	Gareth Hughes <gareth@valinux.com>, May 2000
8*4882a593Smuzhiyun  * x86-64 work by Andi Kleen 2002
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef _ASM_X86_FPU_API_H
12*4882a593Smuzhiyun #define _ASM_X86_FPU_API_H
13*4882a593Smuzhiyun #include <linux/bottom_half.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun  * Use kernel_fpu_begin/end() if you intend to use FPU in kernel context. It
17*4882a593Smuzhiyun  * disables preemption so be careful if you intend to use it for long periods
18*4882a593Smuzhiyun  * of time.
19*4882a593Smuzhiyun  * If you intend to use the FPU in irq/softirq you need to check first with
20*4882a593Smuzhiyun  * irq_fpu_usable() if it is possible.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Kernel FPU states to initialize in kernel_fpu_begin_mask() */
24*4882a593Smuzhiyun #define KFPU_387	_BITUL(0)	/* 387 state will be initialized */
25*4882a593Smuzhiyun #define KFPU_MXCSR	_BITUL(1)	/* MXCSR will be initialized */
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun extern void kernel_fpu_begin_mask(unsigned int kfpu_mask);
28*4882a593Smuzhiyun extern void kernel_fpu_end(void);
29*4882a593Smuzhiyun extern bool irq_fpu_usable(void);
30*4882a593Smuzhiyun extern void fpregs_mark_activate(void);
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* Code that is unaware of kernel_fpu_begin_mask() can use this */
kernel_fpu_begin(void)33*4882a593Smuzhiyun static inline void kernel_fpu_begin(void)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	kernel_fpu_begin_mask(KFPU_387 | KFPU_MXCSR);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * Use fpregs_lock() while editing CPU's FPU registers or fpu->state.
40*4882a593Smuzhiyun  * A context switch will (and softirq might) save CPU's FPU registers to
41*4882a593Smuzhiyun  * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
42*4882a593Smuzhiyun  * a random state.
43*4882a593Smuzhiyun  */
fpregs_lock(void)44*4882a593Smuzhiyun static inline void fpregs_lock(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	preempt_disable();
47*4882a593Smuzhiyun 	local_bh_disable();
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
fpregs_unlock(void)50*4882a593Smuzhiyun static inline void fpregs_unlock(void)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	local_bh_enable();
53*4882a593Smuzhiyun 	preempt_enable();
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #ifdef CONFIG_X86_DEBUG_FPU
57*4882a593Smuzhiyun extern void fpregs_assert_state_consistent(void);
58*4882a593Smuzhiyun #else
fpregs_assert_state_consistent(void)59*4882a593Smuzhiyun static inline void fpregs_assert_state_consistent(void) { }
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /*
63*4882a593Smuzhiyun  * Load the task FPU state before returning to userspace.
64*4882a593Smuzhiyun  */
65*4882a593Smuzhiyun extern void switch_fpu_return(void);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun  * Query the presence of one or more xfeatures. Works on any legacy CPU as well.
69*4882a593Smuzhiyun  *
70*4882a593Smuzhiyun  * If 'feature_name' is set then put a human-readable description of
71*4882a593Smuzhiyun  * the feature there as well - this can be used to print error (or success)
72*4882a593Smuzhiyun  * messages.
73*4882a593Smuzhiyun  */
74*4882a593Smuzhiyun extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * Tasks that are not using SVA have mm->pasid set to zero to note that they
78*4882a593Smuzhiyun  * will not have the valid bit set in MSR_IA32_PASID while they are running.
79*4882a593Smuzhiyun  */
80*4882a593Smuzhiyun #define PASID_DISABLED	0
81*4882a593Smuzhiyun 
update_pasid(void)82*4882a593Smuzhiyun static inline void update_pasid(void) { }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #endif /* _ASM_X86_FPU_API_H */
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