1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun * Hyper-V specific spinlock code.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2018, Intel, Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Author : Yi Sun <yi.y.sun@intel.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define pr_fmt(fmt) "Hyper-V: " fmt
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/spinlock.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <asm/mshyperv.h>
16*4882a593Smuzhiyun #include <asm/paravirt.h>
17*4882a593Smuzhiyun #include <asm/apic.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static bool __initdata hv_pvspin = true;
20*4882a593Smuzhiyun
hv_qlock_kick(int cpu)21*4882a593Smuzhiyun static void hv_qlock_kick(int cpu)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun apic->send_IPI(cpu, X86_PLATFORM_IPI_VECTOR);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
hv_qlock_wait(u8 * byte,u8 val)26*4882a593Smuzhiyun static void hv_qlock_wait(u8 *byte, u8 val)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun unsigned long msr_val;
29*4882a593Smuzhiyun unsigned long flags;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun if (in_nmi())
32*4882a593Smuzhiyun return;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun * Reading HV_X64_MSR_GUEST_IDLE MSR tells the hypervisor that the
36*4882a593Smuzhiyun * vCPU can be put into 'idle' state. This 'idle' state is
37*4882a593Smuzhiyun * terminated by an IPI, usually from hv_qlock_kick(), even if
38*4882a593Smuzhiyun * interrupts are disabled on the vCPU.
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * To prevent a race against the unlock path it is required to
41*4882a593Smuzhiyun * disable interrupts before accessing the HV_X64_MSR_GUEST_IDLE
42*4882a593Smuzhiyun * MSR. Otherwise, if the IPI from hv_qlock_kick() arrives between
43*4882a593Smuzhiyun * the lock value check and the rdmsrl() then the vCPU might be put
44*4882a593Smuzhiyun * into 'idle' state by the hypervisor and kept in that state for
45*4882a593Smuzhiyun * an unspecified amount of time.
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun local_irq_save(flags);
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun * Only issue the rdmsrl() when the lock state has not changed.
50*4882a593Smuzhiyun */
51*4882a593Smuzhiyun if (READ_ONCE(*byte) == val)
52*4882a593Smuzhiyun rdmsrl(HV_X64_MSR_GUEST_IDLE, msr_val);
53*4882a593Smuzhiyun local_irq_restore(flags);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun * Hyper-V does not support this so far.
58*4882a593Smuzhiyun */
hv_vcpu_is_preempted(int vcpu)59*4882a593Smuzhiyun __visible bool hv_vcpu_is_preempted(int vcpu)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun return false;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun PV_CALLEE_SAVE_REGS_THUNK(hv_vcpu_is_preempted);
64*4882a593Smuzhiyun
hv_init_spinlocks(void)65*4882a593Smuzhiyun void __init hv_init_spinlocks(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun if (!hv_pvspin || !apic ||
68*4882a593Smuzhiyun !(ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) ||
69*4882a593Smuzhiyun !(ms_hyperv.features & HV_MSR_GUEST_IDLE_AVAILABLE)) {
70*4882a593Smuzhiyun pr_info("PV spinlocks disabled\n");
71*4882a593Smuzhiyun return;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun pr_info("PV spinlocks enabled\n");
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun __pv_init_lock_hash();
76*4882a593Smuzhiyun pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
77*4882a593Smuzhiyun pv_ops.lock.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);
78*4882a593Smuzhiyun pv_ops.lock.wait = hv_qlock_wait;
79*4882a593Smuzhiyun pv_ops.lock.kick = hv_qlock_kick;
80*4882a593Smuzhiyun pv_ops.lock.vcpu_is_preempted = PV_CALLEE_SAVE(hv_vcpu_is_preempted);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
hv_parse_nopvspin(char * arg)83*4882a593Smuzhiyun static __init int hv_parse_nopvspin(char *arg)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun hv_pvspin = false;
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun early_param("hv_nopvspin", hv_parse_nopvspin);
89