xref: /OK3568_Linux_fs/kernel/arch/x86/boot/video-vga.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* -*- linux-c -*- ------------------------------------------------------- *
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *   Copyright (C) 1991, 1992 Linus Torvalds
5*4882a593Smuzhiyun  *   Copyright 2007 rPath, Inc. - All Rights Reserved
6*4882a593Smuzhiyun  *   Copyright 2009 Intel Corporation; author H. Peter Anvin
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * ----------------------------------------------------------------------- */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun  * Common all-VGA modes
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "boot.h"
15*4882a593Smuzhiyun #include "video.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static struct mode_info vga_modes[] = {
18*4882a593Smuzhiyun 	{ VIDEO_80x25,  80, 25, 0 },
19*4882a593Smuzhiyun 	{ VIDEO_8POINT, 80, 50, 0 },
20*4882a593Smuzhiyun 	{ VIDEO_80x43,  80, 43, 0 },
21*4882a593Smuzhiyun 	{ VIDEO_80x28,  80, 28, 0 },
22*4882a593Smuzhiyun 	{ VIDEO_80x30,  80, 30, 0 },
23*4882a593Smuzhiyun 	{ VIDEO_80x34,  80, 34, 0 },
24*4882a593Smuzhiyun 	{ VIDEO_80x60,  80, 60, 0 },
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static struct mode_info ega_modes[] = {
28*4882a593Smuzhiyun 	{ VIDEO_80x25,  80, 25, 0 },
29*4882a593Smuzhiyun 	{ VIDEO_8POINT, 80, 43, 0 },
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static struct mode_info cga_modes[] = {
33*4882a593Smuzhiyun 	{ VIDEO_80x25,  80, 25, 0 },
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun static __videocard video_vga;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* Set basic 80x25 mode */
vga_set_basic_mode(void)39*4882a593Smuzhiyun static u8 vga_set_basic_mode(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
42*4882a593Smuzhiyun 	u8 mode;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	initregs(&ireg);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	/* Query current mode */
47*4882a593Smuzhiyun 	ireg.ax = 0x0f00;
48*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
49*4882a593Smuzhiyun 	mode = oreg.al;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	if (mode != 3 && mode != 7)
52*4882a593Smuzhiyun 		mode = 3;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Set the mode */
55*4882a593Smuzhiyun 	ireg.ax = mode;		/* AH=0: set mode */
56*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
57*4882a593Smuzhiyun 	do_restore = 1;
58*4882a593Smuzhiyun 	return mode;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
vga_set_8font(void)61*4882a593Smuzhiyun static void vga_set_8font(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	/* Set 8x8 font - 80x43 on EGA, 80x50 on VGA */
64*4882a593Smuzhiyun 	struct biosregs ireg;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	initregs(&ireg);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	/* Set 8x8 font */
69*4882a593Smuzhiyun 	ireg.ax = 0x1112;
70*4882a593Smuzhiyun 	/* ireg.bl = 0; */
71*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* Use alternate print screen */
74*4882a593Smuzhiyun 	ireg.ax = 0x1200;
75*4882a593Smuzhiyun 	ireg.bl = 0x20;
76*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/* Turn off cursor emulation */
79*4882a593Smuzhiyun 	ireg.ax = 0x1201;
80*4882a593Smuzhiyun 	ireg.bl = 0x34;
81*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* Cursor is scan lines 6-7 */
84*4882a593Smuzhiyun 	ireg.ax = 0x0100;
85*4882a593Smuzhiyun 	ireg.cx = 0x0607;
86*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
vga_set_14font(void)89*4882a593Smuzhiyun static void vga_set_14font(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	/* Set 9x14 font - 80x28 on VGA */
92*4882a593Smuzhiyun 	struct biosregs ireg;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	initregs(&ireg);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	/* Set 9x14 font */
97*4882a593Smuzhiyun 	ireg.ax = 0x1111;
98*4882a593Smuzhiyun 	/* ireg.bl = 0; */
99*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	/* Turn off cursor emulation */
102*4882a593Smuzhiyun 	ireg.ax = 0x1201;
103*4882a593Smuzhiyun 	ireg.bl = 0x34;
104*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	/* Cursor is scan lines 11-12 */
107*4882a593Smuzhiyun 	ireg.ax = 0x0100;
108*4882a593Smuzhiyun 	ireg.cx = 0x0b0c;
109*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
vga_set_80x43(void)112*4882a593Smuzhiyun static void vga_set_80x43(void)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	/* Set 80x43 mode on VGA (not EGA) */
115*4882a593Smuzhiyun 	struct biosregs ireg;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	initregs(&ireg);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	/* Set 350 scans */
120*4882a593Smuzhiyun 	ireg.ax = 0x1201;
121*4882a593Smuzhiyun 	ireg.bl = 0x30;
122*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* Reset video mode */
125*4882a593Smuzhiyun 	ireg.ax = 0x0003;
126*4882a593Smuzhiyun 	intcall(0x10, &ireg, NULL);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	vga_set_8font();
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* I/O address of the VGA CRTC */
vga_crtc(void)132*4882a593Smuzhiyun u16 vga_crtc(void)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	return (inb(0x3cc) & 1) ? 0x3d4 : 0x3b4;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
vga_set_480_scanlines(void)137*4882a593Smuzhiyun static void vga_set_480_scanlines(void)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	u16 crtc;		/* CRTC base address */
140*4882a593Smuzhiyun 	u8  csel;		/* CRTC miscellaneous output register */
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	crtc = vga_crtc();
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */
145*4882a593Smuzhiyun 	out_idx(0x0b, crtc, 0x06); /* Vertical total */
146*4882a593Smuzhiyun 	out_idx(0x3e, crtc, 0x07); /* Vertical overflow */
147*4882a593Smuzhiyun 	out_idx(0xea, crtc, 0x10); /* Vertical sync start */
148*4882a593Smuzhiyun 	out_idx(0xdf, crtc, 0x12); /* Vertical display end */
149*4882a593Smuzhiyun 	out_idx(0xe7, crtc, 0x15); /* Vertical blank start */
150*4882a593Smuzhiyun 	out_idx(0x04, crtc, 0x16); /* Vertical blank end */
151*4882a593Smuzhiyun 	csel = inb(0x3cc);
152*4882a593Smuzhiyun 	csel &= 0x0d;
153*4882a593Smuzhiyun 	csel |= 0xe2;
154*4882a593Smuzhiyun 	outb(csel, 0x3c2);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
vga_set_vertical_end(int lines)157*4882a593Smuzhiyun static void vga_set_vertical_end(int lines)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	u16 crtc;		/* CRTC base address */
160*4882a593Smuzhiyun 	u8  ovfw;		/* CRTC overflow register */
161*4882a593Smuzhiyun 	int end = lines-1;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	crtc = vga_crtc();
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	ovfw = 0x3c | ((end >> (8-1)) & 0x02) | ((end >> (9-6)) & 0x40);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	out_idx(ovfw, crtc, 0x07); /* Vertical overflow */
168*4882a593Smuzhiyun 	out_idx(end,  crtc, 0x12); /* Vertical display end */
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
vga_set_80x30(void)171*4882a593Smuzhiyun static void vga_set_80x30(void)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	vga_set_480_scanlines();
174*4882a593Smuzhiyun 	vga_set_vertical_end(30*16);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
vga_set_80x34(void)177*4882a593Smuzhiyun static void vga_set_80x34(void)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	vga_set_480_scanlines();
180*4882a593Smuzhiyun 	vga_set_14font();
181*4882a593Smuzhiyun 	vga_set_vertical_end(34*14);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
vga_set_80x60(void)184*4882a593Smuzhiyun static void vga_set_80x60(void)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	vga_set_480_scanlines();
187*4882a593Smuzhiyun 	vga_set_8font();
188*4882a593Smuzhiyun 	vga_set_vertical_end(60*8);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
vga_set_mode(struct mode_info * mode)191*4882a593Smuzhiyun static int vga_set_mode(struct mode_info *mode)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	/* Set the basic mode */
194*4882a593Smuzhiyun 	vga_set_basic_mode();
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	/* Override a possibly broken BIOS */
197*4882a593Smuzhiyun 	force_x = mode->x;
198*4882a593Smuzhiyun 	force_y = mode->y;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	switch (mode->mode) {
201*4882a593Smuzhiyun 	case VIDEO_80x25:
202*4882a593Smuzhiyun 		break;
203*4882a593Smuzhiyun 	case VIDEO_8POINT:
204*4882a593Smuzhiyun 		vga_set_8font();
205*4882a593Smuzhiyun 		break;
206*4882a593Smuzhiyun 	case VIDEO_80x43:
207*4882a593Smuzhiyun 		vga_set_80x43();
208*4882a593Smuzhiyun 		break;
209*4882a593Smuzhiyun 	case VIDEO_80x28:
210*4882a593Smuzhiyun 		vga_set_14font();
211*4882a593Smuzhiyun 		break;
212*4882a593Smuzhiyun 	case VIDEO_80x30:
213*4882a593Smuzhiyun 		vga_set_80x30();
214*4882a593Smuzhiyun 		break;
215*4882a593Smuzhiyun 	case VIDEO_80x34:
216*4882a593Smuzhiyun 		vga_set_80x34();
217*4882a593Smuzhiyun 		break;
218*4882a593Smuzhiyun 	case VIDEO_80x60:
219*4882a593Smuzhiyun 		vga_set_80x60();
220*4882a593Smuzhiyun 		break;
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	return 0;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun /*
227*4882a593Smuzhiyun  * Note: this probe includes basic information required by all
228*4882a593Smuzhiyun  * systems.  It should be executed first, by making sure
229*4882a593Smuzhiyun  * video-vga.c is listed first in the Makefile.
230*4882a593Smuzhiyun  */
vga_probe(void)231*4882a593Smuzhiyun static int vga_probe(void)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	static const char *card_name[] = {
234*4882a593Smuzhiyun 		"CGA/MDA/HGC", "EGA", "VGA"
235*4882a593Smuzhiyun 	};
236*4882a593Smuzhiyun 	static struct mode_info *mode_lists[] = {
237*4882a593Smuzhiyun 		cga_modes,
238*4882a593Smuzhiyun 		ega_modes,
239*4882a593Smuzhiyun 		vga_modes,
240*4882a593Smuzhiyun 	};
241*4882a593Smuzhiyun 	static int mode_count[] = {
242*4882a593Smuzhiyun 		ARRAY_SIZE(cga_modes),
243*4882a593Smuzhiyun 		ARRAY_SIZE(ega_modes),
244*4882a593Smuzhiyun 		ARRAY_SIZE(vga_modes),
245*4882a593Smuzhiyun 	};
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	initregs(&ireg);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	ireg.ax = 0x1200;
252*4882a593Smuzhiyun 	ireg.bl = 0x10;		/* Check EGA/VGA */
253*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun #ifndef _WAKEUP
256*4882a593Smuzhiyun 	boot_params.screen_info.orig_video_ega_bx = oreg.bx;
257*4882a593Smuzhiyun #endif
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/* If we have MDA/CGA/HGC then BL will be unchanged at 0x10 */
260*4882a593Smuzhiyun 	if (oreg.bl != 0x10) {
261*4882a593Smuzhiyun 		/* EGA/VGA */
262*4882a593Smuzhiyun 		ireg.ax = 0x1a00;
263*4882a593Smuzhiyun 		intcall(0x10, &ireg, &oreg);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 		if (oreg.al == 0x1a) {
266*4882a593Smuzhiyun 			adapter = ADAPTER_VGA;
267*4882a593Smuzhiyun #ifndef _WAKEUP
268*4882a593Smuzhiyun 			boot_params.screen_info.orig_video_isVGA = 1;
269*4882a593Smuzhiyun #endif
270*4882a593Smuzhiyun 		} else {
271*4882a593Smuzhiyun 			adapter = ADAPTER_EGA;
272*4882a593Smuzhiyun 		}
273*4882a593Smuzhiyun 	} else {
274*4882a593Smuzhiyun 		adapter = ADAPTER_CGA;
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	video_vga.modes = mode_lists[adapter];
278*4882a593Smuzhiyun 	video_vga.card_name = card_name[adapter];
279*4882a593Smuzhiyun 	return mode_count[adapter];
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun static __videocard video_vga = {
283*4882a593Smuzhiyun 	.card_name	= "VGA",
284*4882a593Smuzhiyun 	.probe		= vga_probe,
285*4882a593Smuzhiyun 	.set_mode	= vga_set_mode,
286*4882a593Smuzhiyun };
287