xref: /OK3568_Linux_fs/kernel/arch/x86/boot/video-vesa.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* -*- linux-c -*- ------------------------------------------------------- *
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *   Copyright (C) 1991, 1992 Linus Torvalds
5*4882a593Smuzhiyun  *   Copyright 2007 rPath, Inc. - All Rights Reserved
6*4882a593Smuzhiyun  *   Copyright 2009 Intel Corporation; author H. Peter Anvin
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * ----------------------------------------------------------------------- */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun  * VESA text modes
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "boot.h"
15*4882a593Smuzhiyun #include "video.h"
16*4882a593Smuzhiyun #include "vesa.h"
17*4882a593Smuzhiyun #include "string.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* VESA information */
20*4882a593Smuzhiyun static struct vesa_general_info vginfo;
21*4882a593Smuzhiyun static struct vesa_mode_info vminfo;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun static __videocard video_vesa;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #ifndef _WAKEUP
26*4882a593Smuzhiyun static void vesa_store_mode_params_graphics(void);
27*4882a593Smuzhiyun #else /* _WAKEUP */
vesa_store_mode_params_graphics(void)28*4882a593Smuzhiyun static inline void vesa_store_mode_params_graphics(void) {}
29*4882a593Smuzhiyun #endif /* _WAKEUP */
30*4882a593Smuzhiyun 
vesa_probe(void)31*4882a593Smuzhiyun static int vesa_probe(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
34*4882a593Smuzhiyun 	u16 mode;
35*4882a593Smuzhiyun 	addr_t mode_ptr;
36*4882a593Smuzhiyun 	struct mode_info *mi;
37*4882a593Smuzhiyun 	int nmodes = 0;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	video_vesa.modes = GET_HEAP(struct mode_info, 0);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	initregs(&ireg);
42*4882a593Smuzhiyun 	ireg.ax = 0x4f00;
43*4882a593Smuzhiyun 	ireg.di = (size_t)&vginfo;
44*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	if (oreg.ax != 0x004f ||
47*4882a593Smuzhiyun 	    vginfo.signature != VESA_MAGIC ||
48*4882a593Smuzhiyun 	    vginfo.version < 0x0102)
49*4882a593Smuzhiyun 		return 0;	/* Not present */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	set_fs(vginfo.video_mode_ptr.seg);
52*4882a593Smuzhiyun 	mode_ptr = vginfo.video_mode_ptr.off;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	while ((mode = rdfs16(mode_ptr)) != 0xffff) {
55*4882a593Smuzhiyun 		mode_ptr += 2;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 		if (!heap_free(sizeof(struct mode_info)))
58*4882a593Smuzhiyun 			break;	/* Heap full, can't save mode info */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 		if (mode & ~0x1ff)
61*4882a593Smuzhiyun 			continue;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 		memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 		ireg.ax = 0x4f01;
66*4882a593Smuzhiyun 		ireg.cx = mode;
67*4882a593Smuzhiyun 		ireg.di = (size_t)&vminfo;
68*4882a593Smuzhiyun 		intcall(0x10, &ireg, &oreg);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 		if (oreg.ax != 0x004f)
71*4882a593Smuzhiyun 			continue;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 		if ((vminfo.mode_attr & 0x15) == 0x05) {
74*4882a593Smuzhiyun 			/* Text Mode, TTY BIOS supported,
75*4882a593Smuzhiyun 			   supported by hardware */
76*4882a593Smuzhiyun 			mi = GET_HEAP(struct mode_info, 1);
77*4882a593Smuzhiyun 			mi->mode  = mode + VIDEO_FIRST_VESA;
78*4882a593Smuzhiyun 			mi->depth = 0; /* text */
79*4882a593Smuzhiyun 			mi->x     = vminfo.h_res;
80*4882a593Smuzhiyun 			mi->y     = vminfo.v_res;
81*4882a593Smuzhiyun 			nmodes++;
82*4882a593Smuzhiyun 		} else if ((vminfo.mode_attr & 0x99) == 0x99 &&
83*4882a593Smuzhiyun 			   (vminfo.memory_layout == 4 ||
84*4882a593Smuzhiyun 			    vminfo.memory_layout == 6) &&
85*4882a593Smuzhiyun 			   vminfo.memory_planes == 1) {
86*4882a593Smuzhiyun #ifdef CONFIG_FB_BOOT_VESA_SUPPORT
87*4882a593Smuzhiyun 			/* Graphics mode, color, linear frame buffer
88*4882a593Smuzhiyun 			   supported.  Only register the mode if
89*4882a593Smuzhiyun 			   if framebuffer is configured, however,
90*4882a593Smuzhiyun 			   otherwise the user will be left without a screen. */
91*4882a593Smuzhiyun 			mi = GET_HEAP(struct mode_info, 1);
92*4882a593Smuzhiyun 			mi->mode = mode + VIDEO_FIRST_VESA;
93*4882a593Smuzhiyun 			mi->depth = vminfo.bpp;
94*4882a593Smuzhiyun 			mi->x = vminfo.h_res;
95*4882a593Smuzhiyun 			mi->y = vminfo.v_res;
96*4882a593Smuzhiyun 			nmodes++;
97*4882a593Smuzhiyun #endif
98*4882a593Smuzhiyun 		}
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	return nmodes;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
vesa_set_mode(struct mode_info * mode)104*4882a593Smuzhiyun static int vesa_set_mode(struct mode_info *mode)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
107*4882a593Smuzhiyun 	int is_graphic;
108*4882a593Smuzhiyun 	u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	initregs(&ireg);
113*4882a593Smuzhiyun 	ireg.ax = 0x4f01;
114*4882a593Smuzhiyun 	ireg.cx = vesa_mode;
115*4882a593Smuzhiyun 	ireg.di = (size_t)&vminfo;
116*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	if (oreg.ax != 0x004f)
119*4882a593Smuzhiyun 		return -1;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	if ((vminfo.mode_attr & 0x15) == 0x05) {
122*4882a593Smuzhiyun 		/* It's a supported text mode */
123*4882a593Smuzhiyun 		is_graphic = 0;
124*4882a593Smuzhiyun #ifdef CONFIG_FB_BOOT_VESA_SUPPORT
125*4882a593Smuzhiyun 	} else if ((vminfo.mode_attr & 0x99) == 0x99) {
126*4882a593Smuzhiyun 		/* It's a graphics mode with linear frame buffer */
127*4882a593Smuzhiyun 		is_graphic = 1;
128*4882a593Smuzhiyun 		vesa_mode |= 0x4000; /* Request linear frame buffer */
129*4882a593Smuzhiyun #endif
130*4882a593Smuzhiyun 	} else {
131*4882a593Smuzhiyun 		return -1;	/* Invalid mode */
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	initregs(&ireg);
136*4882a593Smuzhiyun 	ireg.ax = 0x4f02;
137*4882a593Smuzhiyun 	ireg.bx = vesa_mode;
138*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	if (oreg.ax != 0x004f)
141*4882a593Smuzhiyun 		return -1;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	graphic_mode = is_graphic;
144*4882a593Smuzhiyun 	if (!is_graphic) {
145*4882a593Smuzhiyun 		/* Text mode */
146*4882a593Smuzhiyun 		force_x = mode->x;
147*4882a593Smuzhiyun 		force_y = mode->y;
148*4882a593Smuzhiyun 		do_restore = 1;
149*4882a593Smuzhiyun 	} else {
150*4882a593Smuzhiyun 		/* Graphics mode */
151*4882a593Smuzhiyun 		vesa_store_mode_params_graphics();
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #ifndef _WAKEUP
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* Switch DAC to 8-bit mode */
vesa_dac_set_8bits(void)161*4882a593Smuzhiyun static void vesa_dac_set_8bits(void)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
164*4882a593Smuzhiyun 	u8 dac_size = 6;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	/* If possible, switch the DAC to 8-bit mode */
167*4882a593Smuzhiyun 	if (vginfo.capabilities & 1) {
168*4882a593Smuzhiyun 		initregs(&ireg);
169*4882a593Smuzhiyun 		ireg.ax = 0x4f08;
170*4882a593Smuzhiyun 		ireg.bh = 0x08;
171*4882a593Smuzhiyun 		intcall(0x10, &ireg, &oreg);
172*4882a593Smuzhiyun 		if (oreg.ax == 0x004f)
173*4882a593Smuzhiyun 			dac_size = oreg.bh;
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	/* Set the color sizes to the DAC size, and offsets to 0 */
177*4882a593Smuzhiyun 	boot_params.screen_info.red_size   = dac_size;
178*4882a593Smuzhiyun 	boot_params.screen_info.green_size = dac_size;
179*4882a593Smuzhiyun 	boot_params.screen_info.blue_size  = dac_size;
180*4882a593Smuzhiyun 	boot_params.screen_info.rsvd_size  = dac_size;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	boot_params.screen_info.red_pos    = 0;
183*4882a593Smuzhiyun 	boot_params.screen_info.green_pos  = 0;
184*4882a593Smuzhiyun 	boot_params.screen_info.blue_pos   = 0;
185*4882a593Smuzhiyun 	boot_params.screen_info.rsvd_pos   = 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /* Save the VESA protected mode info */
vesa_store_pm_info(void)189*4882a593Smuzhiyun static void vesa_store_pm_info(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	initregs(&ireg);
194*4882a593Smuzhiyun 	ireg.ax = 0x4f0a;
195*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	if (oreg.ax != 0x004f)
198*4882a593Smuzhiyun 		return;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	boot_params.screen_info.vesapm_seg = oreg.es;
201*4882a593Smuzhiyun 	boot_params.screen_info.vesapm_off = oreg.di;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun  * Save video mode parameters for graphics mode
206*4882a593Smuzhiyun  */
vesa_store_mode_params_graphics(void)207*4882a593Smuzhiyun static void vesa_store_mode_params_graphics(void)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	/* Tell the kernel we're in VESA graphics mode */
210*4882a593Smuzhiyun 	boot_params.screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	/* Mode parameters */
213*4882a593Smuzhiyun 	boot_params.screen_info.vesa_attributes = vminfo.mode_attr;
214*4882a593Smuzhiyun 	boot_params.screen_info.lfb_linelength = vminfo.logical_scan;
215*4882a593Smuzhiyun 	boot_params.screen_info.lfb_width = vminfo.h_res;
216*4882a593Smuzhiyun 	boot_params.screen_info.lfb_height = vminfo.v_res;
217*4882a593Smuzhiyun 	boot_params.screen_info.lfb_depth = vminfo.bpp;
218*4882a593Smuzhiyun 	boot_params.screen_info.pages = vminfo.image_planes;
219*4882a593Smuzhiyun 	boot_params.screen_info.lfb_base = vminfo.lfb_ptr;
220*4882a593Smuzhiyun 	memcpy(&boot_params.screen_info.red_size,
221*4882a593Smuzhiyun 	       &vminfo.rmask, 8);
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/* General parameters */
224*4882a593Smuzhiyun 	boot_params.screen_info.lfb_size = vginfo.total_memory;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	if (vminfo.bpp <= 8)
227*4882a593Smuzhiyun 		vesa_dac_set_8bits();
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	vesa_store_pm_info();
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun /*
233*4882a593Smuzhiyun  * Save EDID information for the kernel; this is invoked, separately,
234*4882a593Smuzhiyun  * after mode-setting.
235*4882a593Smuzhiyun  */
vesa_store_edid(void)236*4882a593Smuzhiyun void vesa_store_edid(void)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun #ifdef CONFIG_FIRMWARE_EDID
239*4882a593Smuzhiyun 	struct biosregs ireg, oreg;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	/* Apparently used as a nonsense token... */
242*4882a593Smuzhiyun 	memset(&boot_params.edid_info, 0x13, sizeof(boot_params.edid_info));
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	if (vginfo.version < 0x0200)
245*4882a593Smuzhiyun 		return;		/* EDID requires VBE 2.0+ */
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	initregs(&ireg);
248*4882a593Smuzhiyun 	ireg.ax = 0x4f15;		/* VBE DDC */
249*4882a593Smuzhiyun 	/* ireg.bx = 0x0000; */		/* Report DDC capabilities */
250*4882a593Smuzhiyun 	/* ireg.cx = 0;	*/		/* Controller 0 */
251*4882a593Smuzhiyun 	ireg.es = 0;			/* ES:DI must be 0 by spec */
252*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	if (oreg.ax != 0x004f)
255*4882a593Smuzhiyun 		return;		/* No EDID */
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	/* BH = time in seconds to transfer EDD information */
258*4882a593Smuzhiyun 	/* BL = DDC level supported */
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	ireg.ax = 0x4f15;		/* VBE DDC */
261*4882a593Smuzhiyun 	ireg.bx = 0x0001;		/* Read EDID */
262*4882a593Smuzhiyun 	/* ireg.cx = 0; */		/* Controller 0 */
263*4882a593Smuzhiyun 	/* ireg.dx = 0;	*/		/* EDID block number */
264*4882a593Smuzhiyun 	ireg.es = ds();
265*4882a593Smuzhiyun 	ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
266*4882a593Smuzhiyun 	intcall(0x10, &ireg, &oreg);
267*4882a593Smuzhiyun #endif /* CONFIG_FIRMWARE_EDID */
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun #endif /* not _WAKEUP */
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun static __videocard video_vesa =
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	.card_name	= "VESA",
275*4882a593Smuzhiyun 	.probe		= vesa_probe,
276*4882a593Smuzhiyun 	.set_mode	= vesa_set_mode,
277*4882a593Smuzhiyun 	.xmode_first	= VIDEO_FIRST_VESA,
278*4882a593Smuzhiyun 	.xmode_n	= 0x200,
279*4882a593Smuzhiyun };
280