1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * hibernate_asm.S: Hibernaton support specific for sparc64. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Kirill V Tkhai (tkhai@yandex.ru) 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <linux/linkage.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include <asm/asm-offsets.h> 11*4882a593Smuzhiyun#include <asm/cpudata.h> 12*4882a593Smuzhiyun#include <asm/page.h> 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunENTRY(swsusp_arch_suspend) 15*4882a593Smuzhiyun save %sp, -128, %sp 16*4882a593Smuzhiyun save %sp, -128, %sp 17*4882a593Smuzhiyun flushw 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun setuw saved_context, %g3 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Save window regs */ 22*4882a593Smuzhiyun rdpr %cwp, %g2 23*4882a593Smuzhiyun stx %g2, [%g3 + SC_REG_CWP] 24*4882a593Smuzhiyun rdpr %wstate, %g2 25*4882a593Smuzhiyun stx %g2, [%g3 + SC_REG_WSTATE] 26*4882a593Smuzhiyun stx %fp, [%g3 + SC_REG_FP] 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* Save state regs */ 29*4882a593Smuzhiyun rdpr %tick, %g2 30*4882a593Smuzhiyun stx %g2, [%g3 + SC_REG_TICK] 31*4882a593Smuzhiyun rdpr %pstate, %g2 32*4882a593Smuzhiyun stx %g2, [%g3 + SC_REG_PSTATE] 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Save global regs */ 35*4882a593Smuzhiyun stx %g4, [%g3 + SC_REG_G4] 36*4882a593Smuzhiyun stx %g5, [%g3 + SC_REG_G5] 37*4882a593Smuzhiyun stx %g6, [%g3 + SC_REG_G6] 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun call swsusp_save 40*4882a593Smuzhiyun nop 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun mov %o0, %i0 43*4882a593Smuzhiyun restore 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun mov %o0, %i0 46*4882a593Smuzhiyun ret 47*4882a593Smuzhiyun restore 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunENTRY(swsusp_arch_resume) 50*4882a593Smuzhiyun /* Write restore_pblist to %l0 */ 51*4882a593Smuzhiyun sethi %hi(restore_pblist), %l0 52*4882a593Smuzhiyun ldx [%l0 + %lo(restore_pblist)], %l0 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun call __flush_tlb_all 55*4882a593Smuzhiyun nop 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* Write PAGE_OFFSET to %g7 */ 58*4882a593Smuzhiyun sethi %hi(PAGE_OFFSET), %g7 59*4882a593Smuzhiyun ldx [%g7 + %lo(PAGE_OFFSET)], %g7 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun setuw (PAGE_SIZE-8), %g3 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Use MMU Bypass */ 64*4882a593Smuzhiyun rd %asi, %g1 65*4882a593Smuzhiyun wr %g0, ASI_PHYS_USE_EC, %asi 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun ba fill_itlb 68*4882a593Smuzhiyun nop 69*4882a593Smuzhiyun 70*4882a593Smuzhiyunpbe_loop: 71*4882a593Smuzhiyun cmp %l0, %g0 72*4882a593Smuzhiyun be restore_ctx 73*4882a593Smuzhiyun sub %l0, %g7, %l0 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun ldxa [%l0 ] %asi, %l1 /* address */ 76*4882a593Smuzhiyun ldxa [%l0 + 8] %asi, %l2 /* orig_address */ 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* phys addr */ 79*4882a593Smuzhiyun sub %l1, %g7, %l1 80*4882a593Smuzhiyun sub %l2, %g7, %l2 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun mov %g3, %l3 /* PAGE_SIZE-8 */ 83*4882a593Smuzhiyuncopy_loop: 84*4882a593Smuzhiyun ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2 85*4882a593Smuzhiyun stxa %g2, [%l2 + %l3] ASI_PHYS_USE_EC 86*4882a593Smuzhiyun cmp %l3, %g0 87*4882a593Smuzhiyun bne copy_loop 88*4882a593Smuzhiyun sub %l3, 8, %l3 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* next pbe */ 91*4882a593Smuzhiyun ba pbe_loop 92*4882a593Smuzhiyun ldxa [%l0 + 16] %asi, %l0 93*4882a593Smuzhiyun 94*4882a593Smuzhiyunrestore_ctx: 95*4882a593Smuzhiyun setuw saved_context, %g3 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* Restore window regs */ 98*4882a593Smuzhiyun wrpr %g0, 0, %canrestore 99*4882a593Smuzhiyun wrpr %g0, 0, %otherwin 100*4882a593Smuzhiyun wrpr %g0, 6, %cansave 101*4882a593Smuzhiyun wrpr %g0, 0, %cleanwin 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun ldxa [%g3 + SC_REG_CWP] %asi, %g2 104*4882a593Smuzhiyun wrpr %g2, %cwp 105*4882a593Smuzhiyun ldxa [%g3 + SC_REG_WSTATE] %asi, %g2 106*4882a593Smuzhiyun wrpr %g2, %wstate 107*4882a593Smuzhiyun ldxa [%g3 + SC_REG_FP] %asi, %fp 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* Restore state regs */ 110*4882a593Smuzhiyun ldxa [%g3 + SC_REG_PSTATE] %asi, %g2 111*4882a593Smuzhiyun wrpr %g2, %pstate 112*4882a593Smuzhiyun ldxa [%g3 + SC_REG_TICK] %asi, %g2 113*4882a593Smuzhiyun wrpr %g2, %tick 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* Restore global regs */ 116*4882a593Smuzhiyun ldxa [%g3 + SC_REG_G4] %asi, %g4 117*4882a593Smuzhiyun ldxa [%g3 + SC_REG_G5] %asi, %g5 118*4882a593Smuzhiyun ldxa [%g3 + SC_REG_G6] %asi, %g6 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun wr %g1, %g0, %asi 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun restore 123*4882a593Smuzhiyun restore 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun wrpr %g0, 14, %pil 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun retl 128*4882a593Smuzhiyun mov %g0, %o0 129*4882a593Smuzhiyun 130*4882a593Smuzhiyunfill_itlb: 131*4882a593Smuzhiyun ba pbe_loop 132*4882a593Smuzhiyun wrpr %g0, 15, %pil 133