1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun#include <asm/thread_info.h> 3*4882a593Smuzhiyun#include <asm/trap_block.h> 4*4882a593Smuzhiyun#include <asm/spitfire.h> 5*4882a593Smuzhiyun#include <asm/ptrace.h> 6*4882a593Smuzhiyun#include <asm/head.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun .text 9*4882a593Smuzhiyun .align 8 10*4882a593Smuzhiyun .globl user_rtt_fill_fixup_common 11*4882a593Smuzhiyunuser_rtt_fill_fixup_common: 12*4882a593Smuzhiyun rdpr %cwp, %g1 13*4882a593Smuzhiyun add %g1, 1, %g1 14*4882a593Smuzhiyun wrpr %g1, 0x0, %cwp 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun rdpr %wstate, %g2 17*4882a593Smuzhiyun sll %g2, 3, %g2 18*4882a593Smuzhiyun wrpr %g2, 0x0, %wstate 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* We know %canrestore and %otherwin are both zero. */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun sethi %hi(sparc64_kern_pri_context), %g2 23*4882a593Smuzhiyun ldx [%g2 + %lo(sparc64_kern_pri_context)], %g2 24*4882a593Smuzhiyun mov PRIMARY_CONTEXT, %g1 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun661: stxa %g2, [%g1] ASI_DMMU 27*4882a593Smuzhiyun .section .sun4v_1insn_patch, "ax" 28*4882a593Smuzhiyun .word 661b 29*4882a593Smuzhiyun stxa %g2, [%g1] ASI_MMU 30*4882a593Smuzhiyun .previous 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun sethi %hi(KERNBASE), %g1 33*4882a593Smuzhiyun flush %g1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun mov %g4, %l4 36*4882a593Smuzhiyun mov %g5, %l5 37*4882a593Smuzhiyun brnz,pn %g3, 1f 38*4882a593Smuzhiyun mov %g3, %l3 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun or %g4, FAULT_CODE_WINFIXUP, %g4 41*4882a593Smuzhiyun stb %g4, [%g6 + TI_FAULT_CODE] 42*4882a593Smuzhiyun stx %g5, [%g6 + TI_FAULT_ADDR] 43*4882a593Smuzhiyun1: 44*4882a593Smuzhiyun mov %g6, %l1 45*4882a593Smuzhiyun wrpr %g0, 0x0, %tl 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun661: nop 48*4882a593Smuzhiyun .section .sun4v_1insn_patch, "ax" 49*4882a593Smuzhiyun .word 661b 50*4882a593Smuzhiyun SET_GL(0) 51*4882a593Smuzhiyun .previous 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun661: wrpr %g0, RTRAP_PSTATE, %pstate 54*4882a593Smuzhiyun .section .sun_m7_1insn_patch, "ax" 55*4882a593Smuzhiyun .word 661b 56*4882a593Smuzhiyun /* Re-enable PSTATE.mcde to maintain ADI security */ 57*4882a593Smuzhiyun wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate 58*4882a593Smuzhiyun .previous 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun mov %l1, %g6 61*4882a593Smuzhiyun ldx [%g6 + TI_TASK], %g4 62*4882a593Smuzhiyun LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3) 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun brnz,pn %l3, 1f 65*4882a593Smuzhiyun nop 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun call do_sparc64_fault 68*4882a593Smuzhiyun add %sp, PTREGS_OFF, %o0 69*4882a593Smuzhiyun ba,pt %xcc, rtrap 70*4882a593Smuzhiyun nop 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun1: cmp %g3, 2 73*4882a593Smuzhiyun bne,pn %xcc, 2f 74*4882a593Smuzhiyun nop 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun sethi %hi(tlb_type), %g1 77*4882a593Smuzhiyun lduw [%g1 + %lo(tlb_type)], %g1 78*4882a593Smuzhiyun cmp %g1, 3 79*4882a593Smuzhiyun bne,pt %icc, 1f 80*4882a593Smuzhiyun add %sp, PTREGS_OFF, %o0 81*4882a593Smuzhiyun mov %l4, %o2 82*4882a593Smuzhiyun call sun4v_do_mna 83*4882a593Smuzhiyun mov %l5, %o1 84*4882a593Smuzhiyun ba,a,pt %xcc, rtrap 85*4882a593Smuzhiyun1: mov %l4, %o1 86*4882a593Smuzhiyun mov %l5, %o2 87*4882a593Smuzhiyun call mem_address_unaligned 88*4882a593Smuzhiyun nop 89*4882a593Smuzhiyun ba,a,pt %xcc, rtrap 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun2: sethi %hi(tlb_type), %g1 92*4882a593Smuzhiyun mov %l4, %o1 93*4882a593Smuzhiyun lduw [%g1 + %lo(tlb_type)], %g1 94*4882a593Smuzhiyun mov %l5, %o2 95*4882a593Smuzhiyun cmp %g1, 3 96*4882a593Smuzhiyun bne,pt %icc, 1f 97*4882a593Smuzhiyun add %sp, PTREGS_OFF, %o0 98*4882a593Smuzhiyun call sun4v_data_access_exception 99*4882a593Smuzhiyun nop 100*4882a593Smuzhiyun ba,a,pt %xcc, rtrap 101*4882a593Smuzhiyun nop 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun1: call spitfire_data_access_exception 104*4882a593Smuzhiyun nop 105*4882a593Smuzhiyun ba,a,pt %xcc, rtrap 106