1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef _SPARC64_PSRCOMPAT_H 3*4882a593Smuzhiyun #define _SPARC64_PSRCOMPAT_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <asm/pstate.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* Old 32-bit PSR fields for the compatibility conversion code. */ 8*4882a593Smuzhiyun #define PSR_CWP 0x0000001f /* current window pointer */ 9*4882a593Smuzhiyun #define PSR_ET 0x00000020 /* enable traps field */ 10*4882a593Smuzhiyun #define PSR_PS 0x00000040 /* previous privilege level */ 11*4882a593Smuzhiyun #define PSR_S 0x00000080 /* current privilege level */ 12*4882a593Smuzhiyun #define PSR_PIL 0x00000f00 /* processor interrupt level */ 13*4882a593Smuzhiyun #define PSR_EF 0x00001000 /* enable floating point */ 14*4882a593Smuzhiyun #define PSR_EC 0x00002000 /* enable co-processor */ 15*4882a593Smuzhiyun #define PSR_SYSCALL 0x00004000 /* inside of a syscall */ 16*4882a593Smuzhiyun #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ 17*4882a593Smuzhiyun #define PSR_ICC 0x00f00000 /* integer condition codes */ 18*4882a593Smuzhiyun #define PSR_C 0x00100000 /* carry bit */ 19*4882a593Smuzhiyun #define PSR_V 0x00200000 /* overflow bit */ 20*4882a593Smuzhiyun #define PSR_Z 0x00400000 /* zero bit */ 21*4882a593Smuzhiyun #define PSR_N 0x00800000 /* negative bit */ 22*4882a593Smuzhiyun #define PSR_VERS 0x0f000000 /* cpu-version field */ 23*4882a593Smuzhiyun #define PSR_IMPL 0xf0000000 /* cpu-implementation field */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define PSR_V8PLUS 0xff000000 /* fake impl/ver, meaning a 64bit CPU is present */ 26*4882a593Smuzhiyun #define PSR_XCC 0x000f0000 /* if PSR_V8PLUS, this is %xcc */ 27*4882a593Smuzhiyun tstate_to_psr(unsigned long tstate)28*4882a593Smuzhiyunstatic inline unsigned int tstate_to_psr(unsigned long tstate) 29*4882a593Smuzhiyun { 30*4882a593Smuzhiyun return ((tstate & TSTATE_CWP) | 31*4882a593Smuzhiyun PSR_S | 32*4882a593Smuzhiyun ((tstate & TSTATE_ICC) >> 12) | 33*4882a593Smuzhiyun ((tstate & TSTATE_XCC) >> 20) | 34*4882a593Smuzhiyun ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) | 35*4882a593Smuzhiyun PSR_V8PLUS); 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun psr_to_tstate_icc(unsigned int psr)38*4882a593Smuzhiyunstatic inline unsigned long psr_to_tstate_icc(unsigned int psr) 39*4882a593Smuzhiyun { 40*4882a593Smuzhiyun unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; 41*4882a593Smuzhiyun if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) 42*4882a593Smuzhiyun tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; 43*4882a593Smuzhiyun return tstate; 44*4882a593Smuzhiyun } 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif /* !(_SPARC64_PSRCOMPAT_H) */ 47