1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _SPARC64_TLBFLUSH_H
3*4882a593Smuzhiyun #define _SPARC64_TLBFLUSH_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <asm/mmu_context.h>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /* TSB flush operations. */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #define TLB_BATCH_NR 192
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun struct tlb_batch {
12*4882a593Smuzhiyun unsigned int hugepage_shift;
13*4882a593Smuzhiyun struct mm_struct *mm;
14*4882a593Smuzhiyun unsigned long tlb_nr;
15*4882a593Smuzhiyun unsigned long active;
16*4882a593Smuzhiyun unsigned long vaddrs[TLB_BATCH_NR];
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun void flush_tsb_kernel_range(unsigned long start, unsigned long end);
20*4882a593Smuzhiyun void flush_tsb_user(struct tlb_batch *tb);
21*4882a593Smuzhiyun void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr,
22*4882a593Smuzhiyun unsigned int hugepage_shift);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* TLB flush operations. */
25*4882a593Smuzhiyun
flush_tlb_mm(struct mm_struct * mm)26*4882a593Smuzhiyun static inline void flush_tlb_mm(struct mm_struct *mm)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
flush_tlb_page(struct vm_area_struct * vma,unsigned long vmaddr)30*4882a593Smuzhiyun static inline void flush_tlb_page(struct vm_area_struct *vma,
31*4882a593Smuzhiyun unsigned long vmaddr)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)35*4882a593Smuzhiyun static inline void flush_tlb_range(struct vm_area_struct *vma,
36*4882a593Smuzhiyun unsigned long start, unsigned long end)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun void flush_tlb_kernel_range(unsigned long start, unsigned long end);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun void flush_tlb_pending(void);
45*4882a593Smuzhiyun void arch_enter_lazy_mmu_mode(void);
46*4882a593Smuzhiyun void arch_leave_lazy_mmu_mode(void);
47*4882a593Smuzhiyun #define arch_flush_lazy_mmu_mode() do {} while (0)
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* Local cpu only. */
50*4882a593Smuzhiyun void __flush_tlb_all(void);
51*4882a593Smuzhiyun void __flush_tlb_page(unsigned long context, unsigned long vaddr);
52*4882a593Smuzhiyun void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #ifndef CONFIG_SMP
55*4882a593Smuzhiyun
global_flush_tlb_page(struct mm_struct * mm,unsigned long vaddr)56*4882a593Smuzhiyun static inline void global_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun __flush_tlb_page(CTX_HWBITS(mm->context), vaddr);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #else /* CONFIG_SMP */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
64*4882a593Smuzhiyun void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define global_flush_tlb_page(mm, vaddr) \
67*4882a593Smuzhiyun smp_flush_tlb_page(mm, vaddr)
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #endif /* ! CONFIG_SMP */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #endif /* _SPARC64_TLBFLUSH_H */
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